From 9124457bff70686ea804d7e35fb63bea5db5a8a2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Tue, 21 Jun 2016 16:16:15 +0200 Subject: gallium/radeon: add state setup for a separate DCC buffer MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeon/r600_texture.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) (limited to 'src/gallium/drivers/radeon/r600_texture.c') diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index 50f5025..c45c5f2 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -387,6 +387,8 @@ static bool r600_texture_discard_dcc(struct r600_common_screen *rscreen, if (!r600_can_disable_dcc(rtex)) return false; + assert(rtex->dcc_separate_buffer == NULL); + /* Disable DCC. */ rtex->dcc_offset = 0; @@ -564,6 +566,7 @@ static void r600_texture_destroy(struct pipe_screen *screen, r600_resource_reference(&rtex->cmask_buffer, NULL); } pb_reference(&resource->buf, NULL); + r600_resource_reference(&rtex->dcc_separate_buffer, NULL); FREE(rtex); } @@ -1800,12 +1803,21 @@ void vi_dcc_clear_level(struct r600_common_context *rctx, struct r600_texture *rtex, unsigned level, unsigned clear_value) { - struct pipe_resource *dcc_buffer = &rtex->resource.b.b; - uint64_t dcc_offset = rtex->dcc_offset + - rtex->surface.level[level].dcc_offset; + struct pipe_resource *dcc_buffer; + uint64_t dcc_offset; assert(rtex->dcc_offset && rtex->surface.level[level].dcc_enabled); + if (rtex->dcc_separate_buffer) { + dcc_buffer = &rtex->dcc_separate_buffer->b.b; + dcc_offset = 0; + } else { + dcc_buffer = &rtex->resource.b.b; + dcc_offset = rtex->dcc_offset; + } + + dcc_offset += rtex->surface.level[level].dcc_offset; + rctx->clear_buffer(&rctx->b, dcc_buffer, dcc_offset, rtex->surface.level[level].dcc_fast_clear_size, clear_value, R600_COHERENCY_CB_META); -- cgit v1.1