From 7000dfd5c36dcfcc493e149e5aa5b4124d814d8a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nicolai=20H=C3=A4hnle?= Date: Thu, 30 Jun 2016 20:04:54 +0200 Subject: gallium/radeon: add depth/stencil_adjusted output to surface computation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This fixes a rare bug with stencil texturing -- seen on Polaris and Tonga, though it's basically a function of the memory configuration so could affect other parts as well. Fixes piglit "unaligned-blit * stencil downsample" and various "fbo-depth-array *stencil*" tests. Reviewed-by: Marek Olšák --- src/gallium/drivers/radeon/radeon_winsys.h | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'src/gallium/drivers/radeon/radeon_winsys.h') diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h index 0bf6fd9..de25e19 100644 --- a/src/gallium/drivers/radeon/radeon_winsys.h +++ b/src/gallium/drivers/radeon/radeon_winsys.h @@ -401,6 +401,14 @@ struct radeon_surf { uint32_t macro_tile_index; uint32_t micro_tile_mode; /* displayable, thin, depth, rotated */ + /* Whether the depth miptree or stencil miptree as used by the DB are + * adjusted from their TC compatible form to ensure depth/stencil + * compatibility. If either is true, the corresponding plane cannot be + * sampled from. + */ + bool depth_adjusted; + bool stencil_adjusted; + uint64_t dcc_size; uint64_t dcc_alignment; }; -- cgit v1.1