From 8b1f9fd3b3e4b7703314278061d7905a6e780ce7 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nicolai=20H=C3=A4hnle?= Date: Wed, 28 Sep 2016 21:44:55 +0200 Subject: radeonsi: optionally run the LLVM IR verifier pass MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This is enabled automatically if shader printing is enabled, or separately by R600_DEBUG=checkir. Catch mal-formed IR before it crashes in a later pass. Reviewed-by: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.c | 7 +++++++ src/gallium/drivers/radeon/r600_pipe_common.h | 3 +++ src/gallium/drivers/radeon/radeon_llvm.h | 3 ++- src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c | 6 +++++- 4 files changed, 17 insertions(+), 2 deletions(-) (limited to 'src/gallium/drivers/radeon') diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c index ae495b4..9e03aaa 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.c +++ b/src/gallium/drivers/radeon/r600_pipe_common.c @@ -622,6 +622,7 @@ static const struct debug_named_value common_debug_options[] = { { "notgsi", DBG_NO_TGSI, "Don't print the TGSI"}, { "noasm", DBG_NO_ASM, "Don't print disassembled shaders"}, { "preoptir", DBG_PREOPT_IR, "Print the LLVM IR before initial optimizations" }, + { "checkir", DBG_CHECK_IR, "Enable additional sanity checks on shader IR" }, { "testdma", DBG_TEST_DMA, "Invoke SDMA tests and exit." }, @@ -1266,6 +1267,12 @@ bool r600_can_dump_shader(struct r600_common_screen *rscreen, } } +bool r600_extra_shader_checks(struct r600_common_screen *rscreen, unsigned processor) +{ + return (rscreen->debug_flags & DBG_CHECK_IR) || + r600_can_dump_shader(rscreen, processor); +} + void r600_screen_clear_buffer(struct r600_common_screen *rscreen, struct pipe_resource *dst, uint64_t offset, uint64_t size, unsigned value, enum r600_coherency coher) diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index 1614ed2..6d03db6 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -78,6 +78,7 @@ #define DBG_NO_TGSI (1 << 13) #define DBG_NO_ASM (1 << 14) #define DBG_PREOPT_IR (1 << 15) +#define DBG_CHECK_IR (1 << 16) /* gaps */ #define DBG_TEST_DMA (1 << 20) /* Bits 21-31 are reserved for the r600g driver. */ @@ -716,6 +717,8 @@ bool r600_common_context_init(struct r600_common_context *rctx, void r600_common_context_cleanup(struct r600_common_context *rctx); bool r600_can_dump_shader(struct r600_common_screen *rscreen, unsigned processor); +bool r600_extra_shader_checks(struct r600_common_screen *rscreen, + unsigned processor); void r600_screen_clear_buffer(struct r600_common_screen *rscreen, struct pipe_resource *dst, uint64_t offset, uint64_t size, unsigned value, enum r600_coherency coher); diff --git a/src/gallium/drivers/radeon/radeon_llvm.h b/src/gallium/drivers/radeon/radeon_llvm.h index 2f9572a..6010254 100644 --- a/src/gallium/drivers/radeon/radeon_llvm.h +++ b/src/gallium/drivers/radeon/radeon_llvm.h @@ -128,7 +128,8 @@ void radeon_llvm_dispose(struct radeon_llvm_context *ctx); unsigned radeon_llvm_reg_index_soa(unsigned index, unsigned chan); -void radeon_llvm_finalize_module(struct radeon_llvm_context *ctx); +void radeon_llvm_finalize_module(struct radeon_llvm_context *ctx, + bool run_verifier); void build_tgsi_intrinsic_nomem(const struct lp_build_tgsi_action *action, struct lp_build_tgsi_context *bld_base, diff --git a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c index 80e9707..8e364c9 100644 --- a/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c +++ b/src/gallium/drivers/radeon/radeon_setup_tgsi_llvm.c @@ -2114,7 +2114,8 @@ void radeon_llvm_create_func(struct radeon_llvm_context *ctx, LLVMPositionBuilderAtEnd(ctx->gallivm.builder, main_fn_body); } -void radeon_llvm_finalize_module(struct radeon_llvm_context *ctx) +void radeon_llvm_finalize_module(struct radeon_llvm_context *ctx, + bool run_verifier) { struct gallivm_state *gallivm = ctx->soa.bld_base.base.gallivm; const char *triple = LLVMGetTarget(gallivm->module); @@ -2127,6 +2128,9 @@ void radeon_llvm_finalize_module(struct radeon_llvm_context *ctx) target_library_info = gallivm_create_target_library_info(triple); LLVMAddTargetLibraryInfo(target_library_info, gallivm->passmgr); + if (run_verifier) + LLVMAddVerifierPass(gallivm->passmgr); + /* This pass should eliminate all the load and store instructions */ LLVMAddPromoteMemoryToRegisterPass(gallivm->passmgr); -- cgit v1.1