From 2852dedaa0c45e426a53ba0042ecdb0f1b87950f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Nicolai=20H=C3=A4hnle?= Date: Mon, 8 Aug 2016 17:06:22 +0200 Subject: radeonsi: flush TC L2 cache for indirect draw data MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This fixes a bug when indirect draw data is generated by transform feedback. Cc: mesa-stable@lists.freedesktop.org Reviewed-by: Bas Nieuwenhuizen Reviewed-by: Marek Olšák --- src/gallium/drivers/radeonsi/si_state_draw.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'src/gallium/drivers/radeonsi/si_state_draw.c') diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c index a60723d..b559306 100644 --- a/src/gallium/drivers/radeonsi/si_state_draw.c +++ b/src/gallium/drivers/radeonsi/si_state_draw.c @@ -967,6 +967,11 @@ void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info) r600_resource(ib.buffer)->TC_L2_dirty = false; } + if (info->indirect && r600_resource(info->indirect)->TC_L2_dirty) { + sctx->b.flags |= SI_CONTEXT_INV_GLOBAL_L2; + r600_resource(info->indirect)->TC_L2_dirty = false; + } + /* Check flush flags. */ if (sctx->b.flags) si_mark_atom_dirty(sctx, sctx->atoms.s.cache_flush); -- cgit v1.1