From bc7f7e195389e334ae8a5ee7d6f85b9e27983ca4 Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Tue, 31 May 2016 22:19:53 -0700 Subject: anv/pipeline: Unify gen7/8 emit_ds_state Signed-off-by: Jason Ekstrand Reviewed-by: Kenneth Graunke Cc: "12.0" --- src/intel/vulkan/gen7_pipeline.c | 37 +------------------------------------ 1 file changed, 1 insertion(+), 36 deletions(-) (limited to 'src/intel/vulkan/gen7_pipeline.c') diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c index 4097abd..ad45ecb 100644 --- a/src/intel/vulkan/gen7_pipeline.c +++ b/src/intel/vulkan/gen7_pipeline.c @@ -76,41 +76,6 @@ gen7_emit_rs_state(struct anv_pipeline *pipeline, } static void -gen7_emit_ds_state(struct anv_pipeline *pipeline, - const VkPipelineDepthStencilStateCreateInfo *info) -{ - if (info == NULL) { - /* We're going to OR this together with the dynamic state. We need - * to make sure it's initialized to something useful. - */ - memset(pipeline->gen7.depth_stencil_state, 0, - sizeof(pipeline->gen7.depth_stencil_state)); - return; - } - - struct GENX(DEPTH_STENCIL_STATE) state = { - .DepthTestEnable = info->depthTestEnable, - .DepthBufferWriteEnable = info->depthWriteEnable, - .DepthTestFunction = vk_to_gen_compare_op[info->depthCompareOp], - .DoubleSidedStencilEnable = true, - - .StencilTestEnable = info->stencilTestEnable, - .StencilBufferWriteEnable = info->stencilTestEnable, - .StencilFailOp = vk_to_gen_stencil_op[info->front.failOp], - .StencilPassDepthPassOp = vk_to_gen_stencil_op[info->front.passOp], - .StencilPassDepthFailOp = vk_to_gen_stencil_op[info->front.depthFailOp], - .StencilTestFunction = vk_to_gen_compare_op[info->front.compareOp], - - .BackfaceStencilFailOp = vk_to_gen_stencil_op[info->back.failOp], - .BackfaceStencilPassDepthPassOp = vk_to_gen_stencil_op[info->back.passOp], - .BackfaceStencilPassDepthFailOp = vk_to_gen_stencil_op[info->back.depthFailOp], - .BackfaceStencilTestFunction = vk_to_gen_compare_op[info->back.compareOp], - }; - - GENX(DEPTH_STENCIL_STATE_pack)(NULL, &pipeline->gen7.depth_stencil_state, &state); -} - -static void gen7_emit_cb_state(struct anv_pipeline *pipeline, const VkPipelineColorBlendStateCreateInfo *info, const VkPipelineMultisampleStateCreateInfo *ms_info) @@ -213,7 +178,7 @@ genX(graphics_pipeline_create)( assert(pCreateInfo->pRasterizationState); gen7_emit_rs_state(pipeline, pCreateInfo->pRasterizationState, extra); - gen7_emit_ds_state(pipeline, pCreateInfo->pDepthStencilState); + emit_ds_state(pipeline, pCreateInfo->pDepthStencilState); gen7_emit_cb_state(pipeline, pCreateInfo->pColorBlendState, pCreateInfo->pMultisampleState); -- cgit v1.1