From 46cf80fb366cb14827724a7fea004e81400cc602 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Tue, 19 Nov 2013 13:07:12 -0800 Subject: i965/fs: Make the first pre-allocation heuristic be the post heuristic. I recently made us try two different things that tried to reduce register pressure so that we would be more likely to allocate successfully. But now that we have the logic for trying two, we can make the first thing we try be the normal, not-prioritizing-register-pressure heuristic. This means one less scheduling pass in the common case of that heuristic not producing spills, plus the best schedule we know how to produce, if that one happens to succeed. This is important, because our register allocation produces a lot of possibly avoidable dependencies for the post-register-allocation schedule, despite ra_set_allocate_round_robin(). GLB2.7: 1.04127% +/- 0.732461% fps improvement (n=31) nexuiz: No difference (n=5) lightsmark: 0.838512% +/- 0.300147% fps improvement (n=86) minecraft apitrace: No difference (n=15) Reviewed-by: Jordan Justen --- src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp') diff --git a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp index 1050d67..baf67fb 100644 --- a/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp +++ b/src/mesa/drivers/dri/i965/brw_schedule_instructions.cpp @@ -1140,10 +1140,10 @@ fs_instruction_scheduler::choose_instruction_to_schedule() { schedule_node *chosen = NULL; - if (post_reg_alloc) { + if (mode == SCHEDULE_PRE || mode == SCHEDULE_POST) { int chosen_time = 0; - /* Of the instructions closest ready to execute or the closest to + /* Of the instructions ready to execute or the closest to * being ready, choose the oldest one. */ foreach_list(node, &instructions) { -- cgit v1.1