From 6032261682388ced64bd33328a5025f561927a38 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 16 Oct 2013 11:45:06 -0700 Subject: i965: Merge together opcodes for SHADER_OPCODE_GEN4_SCRATCH_READ/WRITE I'm going to be introducing gen7 variants, and the previous naming was going to get confusing. Reviewed-by: Paul Berry --- src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp') diff --git a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp index 807c2f3..387e3c4 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_reg_allocate.cpp @@ -294,8 +294,8 @@ vec4_visitor::evaluate_spill_costs(float *spill_costs, bool *no_spill) loop_scale /= 10; break; - case VS_OPCODE_SCRATCH_READ: - case VS_OPCODE_SCRATCH_WRITE: + case SHADER_OPCODE_GEN4_SCRATCH_READ: + case SHADER_OPCODE_GEN4_SCRATCH_WRITE: for (int i = 0; i < 3; i++) { if (inst->src[i].file == GRF) no_spill[inst->src[i].reg] = true; -- cgit v1.1