From 7b6620faf5b2cb327a749eee35ee20ea68a009fe Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Sun, 30 Nov 2014 01:35:14 -0800 Subject: i965: Store floating point mode choice in brw_stage_prog_data. We use IEEE mode for GLSL programs, but need to use ALT mode for ARB programs so that 0^0 == 1. The choice is based entirely on the shader source language. Previously, our code to determine which mode we wanted was duplicated in 8 different places (VS and FS for Gen4-5, Gen6, Gen7, and Gen8). The ctx->_Shader->CurrentProgram[stage] == NULL check was confusing as well - we use CurrentProgram (non-derived state), but _Shader (derived state). It also relies on knowing that ARB programs don't use gl_shader_program structures today. The compiler already makes this assumption in a few places, but I'd rather keep that assumption out of the state upload code. With this patch, we select the mode at compile time, and store that choice in prog_data. The state upload code simply uses that decision. This eliminates a BRW_NEW_*_PROGRAM dependency in the state upload code. Signed-off-by: Kenneth Graunke Reviewed-by: Ian Romanick Reviewed-by: Matt Turner --- src/mesa/drivers/dri/i965/brw_vs.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/mesa/drivers/dri/i965/brw_vs.c') diff --git a/src/mesa/drivers/dri/i965/brw_vs.c b/src/mesa/drivers/dri/i965/brw_vs.c index 2f628e5..970d86c 100644 --- a/src/mesa/drivers/dri/i965/brw_vs.c +++ b/src/mesa/drivers/dri/i965/brw_vs.c @@ -209,6 +209,10 @@ do_vs_prog(struct brw_context *brw, memcpy(&c.key, key, sizeof(*key)); memset(&prog_data, 0, sizeof(prog_data)); + /* Use ALT floating point mode for ARB programs so that 0^0 == 1. */ + if (!prog) + stage_prog_data->use_alt_mode = true; + mem_ctx = ralloc_context(NULL); c.vp = vp; -- cgit v1.1