From d84a180417d1eabd680554970f1eaaa93abcd41e Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Thu, 17 Nov 2011 14:45:54 -0800 Subject: i965: Base HW depth format setup based on MESA_FORMAT, not bpp. This will make handling new formats (like actually exposing Z32F) easier and more reliable. v2: Remove the check for hiz buffer -- the MESA_FORMAT should really be giving us the value we want even for hiz. Reviewed-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/gen7_sf_state.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mesa/drivers/dri/i965/gen7_sf_state.c') diff --git a/src/mesa/drivers/dri/i965/gen7_sf_state.c b/src/mesa/drivers/dri/i965/gen7_sf_state.c index d3ffbd3..8876722 100644 --- a/src/mesa/drivers/dri/i965/gen7_sf_state.c +++ b/src/mesa/drivers/dri/i965/gen7_sf_state.c @@ -154,7 +154,7 @@ upload_sf_state(struct brw_context *brw) dw1 = GEN6_SF_STATISTICS_ENABLE | GEN6_SF_VIEWPORT_TRANSFORM_ENABLE; /* _NEW_BUFFERS */ - dw1 |= (gen7_depth_format(brw) << GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT); + dw1 |= (brw_depthbuffer_format(brw) << GEN7_SF_DEPTH_BUFFER_SURFACE_FORMAT_SHIFT); /* _NEW_POLYGON */ if ((ctx->Polygon.FrontFace == GL_CCW) ^ render_to_fbo) -- cgit v1.1