From ee4484be3dc827cf15bcf109f5e680dbf1dfbf34 Mon Sep 17 00:00:00 2001 From: Kenneth Graunke Date: Tue, 4 Mar 2014 16:30:28 -0800 Subject: i965: Set Broadwell MOCS values everywhere it's possible. This patch introduces two pre-canned MOCS values: BDW_MOCS_WB (write-back, all caches) and BDW_MOCS_WT (write-through, all caches). We use write-through caching for render targets, and write-back for all other data. (At least on Haswell, I believe write-back LLC/eLLC didn't work for scan-out buffers, while write-through did.) No performance analysis has been done on the impact of this patch. Signed-off-by: Kenneth Graunke Acked-by: Eric Anholt --- src/mesa/drivers/dri/i965/gen8_draw_upload.c | 1 + 1 file changed, 1 insertion(+) (limited to 'src/mesa/drivers/dri/i965/gen8_draw_upload.c') diff --git a/src/mesa/drivers/dri/i965/gen8_draw_upload.c b/src/mesa/drivers/dri/i965/gen8_draw_upload.c index f927c13..83bc240 100644 --- a/src/mesa/drivers/dri/i965/gen8_draw_upload.c +++ b/src/mesa/drivers/dri/i965/gen8_draw_upload.c @@ -105,6 +105,7 @@ gen8_emit_vertices(struct brw_context *brw) dw0 |= i << GEN6_VB0_INDEX_SHIFT; dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE; dw0 |= buffer->stride << BRW_VB0_PITCH_SHIFT; + dw0 |= BDW_MOCS_WB << 16; OUT_BATCH(dw0); OUT_RELOC64(buffer->bo, I915_GEM_DOMAIN_VERTEX, 0, buffer->offset); -- cgit v1.1