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author | The Android Open Source Project <initial-contribution@android.com> | 2009-02-10 15:43:59 -0800 |
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committer | The Android Open Source Project <initial-contribution@android.com> | 2009-02-10 15:43:59 -0800 |
commit | c27f813900a3c114562efbb8df1065e94766fc48 (patch) | |
tree | d95919283707dcab61009e27007374a745c9541e /target-arm/exec.h | |
parent | 0852ad57fa372f9b2854e4df685eaba8d8ef6790 (diff) | |
download | external_qemu-c27f813900a3c114562efbb8df1065e94766fc48.zip external_qemu-c27f813900a3c114562efbb8df1065e94766fc48.tar.gz external_qemu-c27f813900a3c114562efbb8df1065e94766fc48.tar.bz2 |
auto import from //branches/cupcake/...@130745
Diffstat (limited to 'target-arm/exec.h')
-rw-r--r-- | target-arm/exec.h | 48 |
1 files changed, 18 insertions, 30 deletions
diff --git a/target-arm/exec.h b/target-arm/exec.h index 2d2b99a..c543cf4 100644 --- a/target-arm/exec.h +++ b/target-arm/exec.h @@ -1,6 +1,6 @@ /* * ARM execution defines - * + * * Copyright (c) 2003 Fabrice Bellard * * This library is free software; you can redistribute it and/or @@ -17,19 +17,14 @@ * License along with this library; if not, write to the Free Software * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ +#include "config.h" #include "dyngen-exec.h" register struct CPUARMState *env asm(AREG0); register uint32_t T0 asm(AREG1); register uint32_t T1 asm(AREG2); -register uint32_t T2 asm(AREG3); -/* TODO: Put these in FP regs on targets that have such things. */ -/* It is ok for FT0s and FT0d to overlap. Likewise FT1s and FT1d. */ -#define FT0s env->vfp.tmp0s -#define FT1s env->vfp.tmp1s -#define FT0d env->vfp.tmp0d -#define FT1d env->vfp.tmp1d +#define M0 env->iwmmxt.val #include "cpu.h" #include "exec-all.h" @@ -43,33 +38,26 @@ static inline void regs_to_env(void) } int cpu_arm_handle_mmu_fault (CPUState *env, target_ulong address, int rw, - int is_user, int is_softmmu); + int mmu_idx, int is_softmmu); + +static inline int cpu_halted(CPUState *env) { + if (!env->halted) + return 0; + /* An interrupt wakes the CPU even if the I and F CPSR bits are + set. We use EXITTB to silently wake CPU without causing an + actual interrupt. */ + if (env->interrupt_request & + (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB)) { + env->halted = 0; + return 0; + } + return EXCP_HALTED; +} #if !defined(CONFIG_USER_ONLY) #include "softmmu_exec.h" #endif -/* In op_helper.c */ - -void cpu_lock(void); -void cpu_unlock(void); -void helper_set_cp15(CPUState *, uint32_t, uint32_t); -uint32_t helper_get_cp15(CPUState *, uint32_t); - void cpu_loop_exit(void); void raise_exception(int); - -void do_vfp_abss(void); -void do_vfp_absd(void); -void do_vfp_negs(void); -void do_vfp_negd(void); -void do_vfp_sqrts(void); -void do_vfp_sqrtd(void); -void do_vfp_cmps(void); -void do_vfp_cmpd(void); -void do_vfp_cmpes(void); -void do_vfp_cmped(void); -void do_vfp_set_fpscr(void); -void do_vfp_get_fpscr(void); - |