diff options
Diffstat (limited to 'target-arm/cpu.h')
| -rw-r--r-- | target-arm/cpu.h | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 75a1f13..a613b77 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -1,6 +1,6 @@ /* * ARM virtual CPU header - * + * * Copyright (c) 2003 Fabrice Bellard * * This library is free software; you can redistribute it and/or @@ -26,6 +26,8 @@ #include "softfloat.h" +#define ARM_CPU_SAVE_VERSION 1 + #define TARGET_HAS_ICE 1 #define EXCP_UDEF 1 /* undefined instruction */ @@ -57,11 +59,11 @@ typedef struct CPUARMState { uint32_t banked_spsr[6]; uint32_t banked_r13[6]; uint32_t banked_r14[6]; - + /* These hold r8-r12. */ uint32_t usr_regs[5]; uint32_t fiq_regs[5]; - + /* cpsr flag cache for faster execution */ uint32_t CF; /* 0 or 1 */ uint32_t VF; /* V is the bit 31. All other bits are undefined */ @@ -109,7 +111,7 @@ typedef struct CPUARMState { /* Temporary variables if we don't have spare fp regs. */ float32 tmp0s, tmp1s; float64 tmp0d, tmp1d; - + float_status fp_status; } vfp; @@ -132,7 +134,7 @@ void switch_mode(CPUARMState *, int); signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ struct siginfo; -int cpu_arm_signal_handler(int host_signum, struct siginfo *info, +int cpu_arm_signal_handler(int host_signum, struct siginfo *info, void *puc); #define CPSR_M (0x1f) @@ -154,7 +156,7 @@ static inline uint32_t cpsr_read(CPUARMState *env) { int ZF; ZF = (env->NZF == 0); - return env->uncached_cpsr | (env->NZF & 0x80000000) | (ZF << 30) | + return env->uncached_cpsr | (env->NZF & 0x80000000) | (ZF << 30) | (env->CF << 29) | ((env->VF & 0x80000000) >> 3) | (env->QF << 27) | (env->thumb << 5); } |