| Commit message (Collapse) | Author | Age | Files | Lines |
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Clang and llvm-gcc don't support global register variable (GRV) crucial
to emulator (where a register is reserved to point to target architecture
state for better code-gen). Clang and llvm-gcc are provided in recent
Xcode to replace the original gcc with GRV support. MacOSX developers
may accidentally install newer Xcode and break emulator.
This CL allows emulator (and the rest of Android tree) to build but forces
emulator to quit if it's built w/o GRV support. Developers build
Android tree with clang or llvm-gcc can still get good system image,
but they have to use emulators built the other way or from SDKs to run it.
Related CL & bug entry:
https://android-review.googlesource.com/#/c/33011
http://code.google.com/p/android/issues/detail?id=32577
Change-Id: Ia585dd7bf9783e2ff4c114b4f0ec20b89684ab57
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The Xcode 4.3 compiler doesn't have support for global register variables so
this patch ensures that the register keyword is not incuded for that compiler.
Signed-off-by: Al Sutton <al@funkyandroid.com>
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The new translator has the following benefits:
- faster emulation of ARMv5TE code (through improved JIT)
- proper support for ARMv7 and NEON
- rebuilding the full-eng platform images for ARMv7-A results
in additionnal speed increases (a.k.a. Thumb-2 rocks!).
Note that, as an interesting side effect, NEON machine code is generally
slower than the equivalent C code it is supposed to replace when run inside
the emulator. This can be explained by the fact that for now the translator
simply translates each NEON instruction into a series of sequential host
instructions (and also requires over-head for packing/unpacking/saturation/
etc...).
This change has been tested by running the "full-eng" platform image
rebuilt for ARMv7-A and Neon and using an appropriate kernel image
(prebuilt/android-arm/kernel/kernel-qemu-armv7). The system could boot
and seems to work perfectly. Not a single issue has been experienced
during testing. On a 2.4 GHz Xeon CPU, the image boots in about 25 seconds
(compared to 40 seconds for a vanilla one without this emulator patch).
Thanks to Peter Maydell at Linaro and ARM with his hard work to make this
happen (first in upstream, and now on Android).
This integration is based on the Meego git repository
(git://gitorious.org/qemu-maemo/qemu.git) using the following hash:
7e2d65b0c95c865b1fa6d3d4948e8e822b9ac2fd
On top of which, the following upstream patch has been applied
(with recommendation from Peter):
b7fa9214d8d4f57992c9acd0ccb125c54a095f00
(We chose this repository because it was the closest to the previous
integrate. We will probably use the Linaro ones for future work on this
part of the emulator).
Change-Id: I54837e3d2e908b2380d158411d7a9813630e7e4e
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Change-Id: I76844f4f61ddc26832344d3fb03fb2dd33a93c07
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This is done to allow for future integration of the
upstream auto-generated "trace.h" header file.
Change-Id: I9d1bba3320d9e8acfd7359540d3ed6695773061e
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Change-Id: Id14c6b106dbac9b4016b7423327e9eb22e21fe75
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Change-Id: I01cef0743cc9db9d21c2b7feb9f2a877ac4d2b35
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Change-Id: I8f93e06038bd6e35a2972e3fef351046c247e4ee
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Change-Id: I4620b4560465ed105202332b59f91b708d91a525
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This patch contains minor cleanups that will be needed by
a few future patches that will improve the way core and ui
sources are separated and built.
- remove a few compiler warnings
- formatting
- remove the memcheck CONFIG_MEMCHECK checks (they later get in the way)
- refine hw/hw.h inclusion's of cpu.h (this comes from upstream)
- add missing definitions for PRUd64 and PRUx64 (used later)
- remove CONFIG_SHAPER test, replace with CONFIG_ANDROID instead.
- add missing strdup() calls.
Change-Id: Ic7d6681a51af718c298f0ee4bd884b1d8750f28e
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This fails to build on MacOS X
This reverts commit a39b10bd2574825a815d6ad854499dd127cfa9cb.
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Change-Id: I105c5a097c988cb964b47b40b71c7a08af0d9210
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Change-Id: I523f4464cfbbd02aff93031660d2ee2f80d54921
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Fix various 64-bitness issues in the source code to
make the --try-64 option work again on Linux. Note that
the generated binary is not faster than its 32-bit variant
when it comes to benchmarking the boot sequence.
Change-Id: Iad248e033757d4cd25524a438a5dbe1cf3aca6cf
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This forces -Wall during the build. Note that this patch doesn't
remove all warnings, but most of the remaining ones are from upstream anyway.
Change-Id: I8808d8495e99866e156ce5780d2e3c305eab491f
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Change-Id: I5c51f54a7fe2ea702420429bbf0c789ed6d8c534
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Change-Id: Ica9022695d83fb48a8c25fdb1e1f0dc1c63747ff
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Apparently, that change that supposedly fixed AT-related ARMv7 bug broke
DexOpt step in the build process, resulting in trashed files that crash
the device. Rolling this change back to fix Froyo, until cause of the
DexOpt breaking has been found and fixed
Change-Id: I33b417fcbd65767f7cfe60f5fb5ffa32610b4852
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Use physical addresses (instead of emulated ones) for registered return
addresses. This way addresses will be independent from process context,
as even if virtual addresses may overlap, the physical ones will not.
Change-Id: If5be5174286be0a456c47c48812d7cc9bf19bc1f
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This CL doesn't fix ARMv7 problems in the emulator (emulated system still
crashes, although with these fixes it crashes much later than without them),
however, this CL fixes real bugs related to IT block translations.
In particular, it fixes:
- Wrong ITSTATE calculation on condition that gen_intermediate_code_internal
is called with search_pc parameter set to 1. In the original code ITSTATE was
blindly inherited from the CPU's condexec_bits field, without consideration
that translation could be performed starting from an address that has nothing
to do with the current ITSTATE.
Change-Id: I7af83e21c64d217c6b28bf6cb5ee2e2f23182c95
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Change-id: Ibce845d0
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A critical test in the execution loop was missed in the latest huge integration.
Also optimize slightly the basic-block start recording helper interface.
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This fixes a really bad bug in the Thumb/Thumb2 ARM emulation related to
conditional instructions execution. The issue was that the previous
implementation did break badly if a page fault occured during the conditional
instruction's emulation. Giving an example if probably the best way to demonstrate
this. Consider the following two instructions:
itt eq
streq r0,[r4, #0]
These two instructions mean, respectively:
- If the Z flag is set, execute the next instruction. Otherwise ignore it
- Store the value of r0 at the address pointed to by r4
In single-step mode (used when debugging the emulator), each instruction is
separately JIT-ed and executed in a different pass. The 'condexec_bits' field
of the CPU state if used to store flags corresponding to the conditional
execution of up to 4 next instructions.
When the first instruction is executed, it simply sets 'condexec_bits' to a
specific value (4).
When the second instruction is executed, things get slightly bit more funky
because what happened was the following:
- the JIT-ed code started by clearing the 'condexec_bits' right at the
start of its sequence (a comment says "to avoid complications trying to
do it at the end of the block", famous last words...)
- a conditional test, based on the current value of the Z flag was added
to skip over the rest of the instruction sequence
- the store itself is implemented through a call to the __stl_mmu helper
function.
The thing is that __stl_mmu may implement a *page fault* (i.e. when the
address in r4 hasn't been commited to memory yet) which requires a switch
to kernel mode (to populate the page), then going back to the instruction's
execution.
This is done in the current implementation by re-running the JIT-er for the
same instruction, however, since 'condexec_bits' was already cleared to 0,
the new JIT-ed code sequence doesn't have the conditional test to skip over
the store. The conditional instruction has been transformed into a
non-conditional one due to the page fault ! This results in either bad behaviour
or, even a crash in the emulator.
The patch fixes the clearing of condexec_bits to happen as it should, i.e.
only when execution has really cleared it.
This is preliminary work to fix the -trace option.
Also, disable the IO Thread when running the standalone emulator. This makes
debugging much easier since everything happens in a single thread.
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This patch is used to disable the code generator's liveness analysis pass when we
emulate an ARMv7 CPU. This is required to properly run the dex preoptimization pass
during the build of -user system images.
Also includes:
- a fix for a sad typo in target-arm/translate.c related to NEON instruction emulation
- upstream improvements to the x86 and x86_64 backends to generate better goto branches at runtime
- upstream fixes for 64-bit swap and shift operations in TCG
After this patch is applied, re-enabling the ARMv7 memcpy should allow to run the dex preopt
pass succesfully. Anything else is untested though. WE STILL NEED TO FIX THE CODE GENERATOR.
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Disable alignment CPU exceptions to be able to boot an ARMv7 system image.
This is because 4.4.0 emits a machine code sequence that stores an 8-bytes double
on a 4-byte aligned address on the stack in the implementation of cvt() in the C
library (see the disassembly for bionic/libc/stdio/vfprintf.c). It is uncertain
that this is a compiler bug at this point, but the upstream QEMU sources don't have
alignment exceptions enabled for any ARM target anyway.
Also, add a check to force CPU emulation to "cortex-a8" if the kernel file name
ends in "-armv7". This is a poor man's approach to hardware configuration that will
be replaced by a more sophisticated solution in the future. Right now, we just want
to be able to build -user system images with the dex preopt pass running in the
emulator with the minimum amount of fuss.
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This change integrates many changes from the upstream QEMU sources.
Its main purpose is to enable correct ARMv6 and ARMv7 support to the
Android emulator. Due to the nature of the upstream code base, this
unfortunately also required changes to many other parts of the source.
Note that to ensure easier integrations in the future, some source files
and directories that have heavy Android-specific customization have been
renamed with an -android suffix. The original files are still there for
easier integration tracking, but *never* compiled. For example:
net.c net-android.c
qemu-char.c qemu-char-android.c
slirp/ slirp-android/
etc...
Tested on linux-x86, darwin-x86 and windows host machines.
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wrong.
One of the calls to trace_add_insn() was missing a parameter and was passing in
garbage. This parameter "is_thumb" is expected to be 0 or 1 and is OR-ed with
the basic block address to distinguish ARM and Thumb instruction blocks.
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Exceptions used to be traced but that code was deleted during a large merge.
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