From 280afa072a7b829e581d884c2b3276530a6014b7 Mon Sep 17 00:00:00 2001 From: David 'Digit' Turner Date: Wed, 11 May 2011 17:37:44 +0200 Subject: ramblocks: integrate upstream implementation (sophisticated) Change-Id: I49e96e2d5ae571849b0b6fef0a30b41ecdee8d23 --- hw/android_arm.c | 2 +- hw/armv7m.c | 14 ++++++++------ hw/hw.h | 4 ++++ hw/pc.c | 26 ++++++++++++-------------- 4 files changed, 25 insertions(+), 21 deletions(-) (limited to 'hw') diff --git a/hw/android_arm.c b/hw/android_arm.c index 3b9dc6d..188051b 100644 --- a/hw/android_arm.c +++ b/hw/android_arm.c @@ -79,7 +79,7 @@ static void android_arm_init_(ram_addr_t ram_size, env = cpu_init(cpu_model); register_savevm( "cpu", 0, ARM_CPU_SAVE_VERSION, cpu_save, cpu_load, env ); - ram_offset = qemu_ram_alloc(ram_size); + ram_offset = qemu_ram_alloc(NULL,"android_arm",ram_size); cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM); cpu_pic = arm_pic_init_cpu(env); diff --git a/hw/armv7m.c b/hw/armv7m.c index 297a3e1..f7636db 100644 --- a/hw/armv7m.c +++ b/hw/armv7m.c @@ -105,13 +105,13 @@ static void bitband_writel(void *opaque, target_phys_addr_t offset, cpu_physical_memory_write(addr, (uint8_t *)&v, 4); } -static CPUReadMemoryFunc *bitband_readfn[] = { +static CPUReadMemoryFunc * const bitband_readfn[] = { bitband_readb, bitband_readw, bitband_readl }; -static CPUWriteMemoryFunc *bitband_writefn[] = { +static CPUWriteMemoryFunc * const bitband_writefn[] = { bitband_writeb, bitband_writew, bitband_writel @@ -192,9 +192,11 @@ qemu_irq *armv7m_init(int flash_size, int sram_size, /* Flash programming is done via the SCU, so pretend it is ROM. */ cpu_register_physical_memory(0, flash_size, - qemu_ram_alloc(flash_size) | IO_MEM_ROM); + qemu_ram_alloc(NULL, "armv7m.flash", + flash_size) | IO_MEM_ROM); cpu_register_physical_memory(0x20000000, sram_size, - qemu_ram_alloc(sram_size) | IO_MEM_RAM); + qemu_ram_alloc(NULL, "armv7m.sram", + sram_size) | IO_MEM_RAM); armv7m_bitband_init(); nvic = qdev_create(NULL, "armv7m_nvic"); @@ -233,8 +235,8 @@ qemu_irq *armv7m_init(int flash_size, int sram_size, space. This stops qemu complaining about executing code outside RAM when returning from an exception. */ cpu_register_physical_memory(0xfffff000, 0x1000, - qemu_ram_alloc(0x1000) | IO_MEM_RAM); - + qemu_ram_alloc(NULL, "armv7m.hack", + 0x1000) | IO_MEM_RAM); return pic; } diff --git a/hw/hw.h b/hw/hw.h index ffee4ff..d230448 100644 --- a/hw/hw.h +++ b/hw/hw.h @@ -67,7 +67,9 @@ static inline void qemu_put_ubyte(QEMUFile *f, unsigned int v) void qemu_put_be16(QEMUFile *f, unsigned int v); void qemu_put_be32(QEMUFile *f, unsigned int v); void qemu_put_be64(QEMUFile *f, uint64_t v); +#ifdef CONFIG_ANDROID void qemu_put_float(QEMUFile *f, float v); +#endif int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); int qemu_get_byte(QEMUFile *f); @@ -81,7 +83,9 @@ static inline unsigned int qemu_get_ubyte(QEMUFile *f) unsigned int qemu_get_be16(QEMUFile *f); unsigned int qemu_get_be32(QEMUFile *f); uint64_t qemu_get_be64(QEMUFile *f); +#ifdef CONFIG_ANDROID float qemu_get_float(QEMUFile *f); +#endif int qemu_file_rate_limit(QEMUFile *f); int64_t qemu_file_set_rate_limit(QEMUFile *f, int64_t new_rate); int64_t qemu_file_get_rate_limit(QEMUFile *f); diff --git a/hw/pc.c b/hw/pc.c index ff7670e..0114ff5 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -550,7 +550,7 @@ static void generate_bootsect(target_phys_addr_t option_rom, *p++ = 0x1f; /* pop ds */ *p++ = 0x58; /* pop ax */ *p++ = 0xcb; /* lret */ - + /* Actual code */ *reloc = (p - rom); @@ -910,7 +910,7 @@ static void pc_init1(ram_addr_t ram_size, cpu_model = "qemu32"; #endif } - + for(i = 0; i < smp_cpus; i++) { env = cpu_init(cpu_model); if (!env) { @@ -927,25 +927,23 @@ static void pc_init1(ram_addr_t ram_size, vmport_init(); /* allocate RAM */ - ram_addr = qemu_ram_alloc(0xa0000); + ram_addr = qemu_ram_alloc(NULL, "pc.ram", + below_4g_mem_size + above_4g_mem_size); cpu_register_physical_memory(0, 0xa0000, ram_addr); - - /* Allocate, even though we won't register, so we don't break the - * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000), - * and some bios areas, which will be registered later - */ - ram_addr = qemu_ram_alloc(0x100000 - 0xa0000); - ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000); cpu_register_physical_memory(0x100000, below_4g_mem_size - 0x100000, - ram_addr); + ram_addr + 0x100000); + if (above_4g_mem_size > 0) { + cpu_register_physical_memory(0x100000000ULL, above_4g_mem_size, + ram_addr + below_4g_mem_size); + } #else /* * Allocate a single contiguous RAM so that the goldfish * framebuffer can work well especially when the frame buffer is * large. */ - ram_addr = qemu_ram_alloc(below_4g_mem_size); + ram_addr = qemu_ram_alloc(NULL, "pc.ram", below_4g_mem_size); cpu_register_physical_memory(0, below_4g_mem_size, ram_addr); #endif @@ -975,7 +973,7 @@ static void pc_init1(ram_addr_t ram_size, (bios_size % 65536) != 0) { goto bios_error; } - bios_offset = qemu_ram_alloc(bios_size); + bios_offset = qemu_ram_alloc(NULL, "bios.bin", bios_size); ret = load_image(filename, qemu_get_ram_ptr(bios_offset)); if (ret != bios_size) { bios_error: @@ -995,7 +993,7 @@ static void pc_init1(ram_addr_t ram_size, - option_rom_offset = qemu_ram_alloc(0x20000); + option_rom_offset = qemu_ram_alloc(NULL, "pc.rom", 0x20000); oprom_area_size = 0; cpu_register_physical_memory(0xc0000, 0x20000, option_rom_offset); -- cgit v1.1