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author | Mans Rullgard <mans@mansr.com> | 2011-04-05 17:40:06 +0300 |
---|---|---|
committer | Martin Storsjo <martin@martin.st> | 2012-01-12 11:14:04 +0200 |
commit | b676a05348e4c516fa8b57e33b10548e6142c3f8 (patch) | |
tree | 79cbd20823076300dffa09f7afdb3cfa8d5d4231 /media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/scale_sig_neon.s | |
parent | a9798d3c1f1c9787975dc0f16e2191da95f2f0da (diff) | |
download | frameworks_av-b676a05348e4c516fa8b57e33b10548e6142c3f8.zip frameworks_av-b676a05348e4c516fa8b57e33b10548e6142c3f8.tar.gz frameworks_av-b676a05348e4c516fa8b57e33b10548e6142c3f8.tar.bz2 |
stagefright aacenc/amrwbenc: Remove trailing whitespace
This was applied in AOSP master earlier, in commit
b21611e5b0f1797e39e781d91ade023bac87637f, but when merged
into the Google internal tree in
88c2d4d26d79384f32a25bd775cf873cb678b12a, none of these
changes have been brought in. (The diff of this merge commit
and its first parent, d94b71d, is empty.)
Therefore, reapply the rest of these changes on the files
that still are present in the current version.
Change-Id: I645a9b9134769958a11808a06163123d28d83e46
Diffstat (limited to 'media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/scale_sig_neon.s')
-rw-r--r-- | media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/scale_sig_neon.s | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/scale_sig_neon.s b/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/scale_sig_neon.s index bbd354d..e45daac 100644 --- a/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/scale_sig_neon.s +++ b/media/libstagefright/codecs/amrwbenc/src/asm/ARMV7/scale_sig_neon.s @@ -13,7 +13,7 @@ @ ** See the License for the specific language governing permissions and @ ** limitations under the License. @ */ -@ +@ @**********************************************************************/ @void Scale_sig( @ Word16 x[], /* (i/o) : signal to scale */ @@ -25,16 +25,16 @@ @ lg --- r1 @ exp --- r2 - .section .text + .section .text .global Scale_sig_opt Scale_sig_opt: - STMFD r13!, {r4 - r12, r14} + STMFD r13!, {r4 - r12, r14} MOV r4, #4 - VMOV.S32 Q15, #0x8000 - VDUP.S32 Q14, r2 - MOV r5, r0 @ copy x[] address + VMOV.S32 Q15, #0x8000 + VDUP.S32 Q14, r2 + MOV r5, r0 @ copy x[] address CMP r1, #64 MOVEQ r4, #1 BEQ LOOP @@ -48,7 +48,7 @@ Scale_sig_opt: BEQ LOOP1 LOOP1: - VLD1.S16 {Q0, Q1}, [r5]! @load 16 Word16 x[] + VLD1.S16 {Q0, Q1}, [r5]! @load 16 Word16 x[] VSHLL.S16 Q10, D0, #16 VSHLL.S16 Q11, D1, #16 VSHLL.S16 Q12, D2, #16 @@ -63,7 +63,7 @@ LOOP1: VADDHN.S32 D19, Q13, Q15 VST1.S16 {Q8, Q9}, [r0]! @store 16 Word16 x[] -LOOP: +LOOP: VLD1.S16 {Q0, Q1}, [r5]! @load 16 Word16 x[] VLD1.S16 {Q2, Q3}, [r5]! @load 16 Word16 x[] VLD1.S16 {Q4, Q5}, [r5]! @load 16 Word16 x[] @@ -72,7 +72,7 @@ LOOP: VSHLL.S16 Q8, D0, #16 VSHLL.S16 Q9, D1, #16 VSHLL.S16 Q10, D2, #16 - VSHLL.S16 Q11, D3, #16 + VSHLL.S16 Q11, D3, #16 VSHL.S32 Q8, Q8, Q14 VSHL.S32 Q9, Q9, Q14 VSHL.S32 Q10, Q10, Q14 @@ -83,7 +83,7 @@ LOOP: VADDHN.S32 D19, Q11, Q15 VST1.S16 {Q8, Q9}, [r0]! @store 16 Word16 x[] - + VSHLL.S16 Q12, D4, #16 VSHLL.S16 Q13, D5, #16 VSHLL.S16 Q10, D6, #16 @@ -112,7 +112,7 @@ LOOP: VADDHN.S32 D19, Q13, Q15 VST1.S16 {Q8, Q9}, [r0]! @store 16 Word16 x[] - VSHLL.S16 Q10, D12, #16 + VSHLL.S16 Q10, D12, #16 VSHLL.S16 Q11, D13, #16 VSHLL.S16 Q12, D14, #16 VSHLL.S16 Q13, D15, #16 @@ -123,16 +123,16 @@ LOOP: VADDHN.S32 D16, Q10, Q15 VADDHN.S32 D17, Q11, Q15 VADDHN.S32 D18, Q12, Q15 - VADDHN.S32 D19, Q13, Q15 - VST1.S16 {Q8, Q9}, [r0]! @store 16 Word16 x[] + VADDHN.S32 D19, Q13, Q15 + VST1.S16 {Q8, Q9}, [r0]! @store 16 Word16 x[] SUBS r4, r4, #1 - BGT LOOP - - + BGT LOOP + + Scale_sig_asm_end: - LDMFD r13!, {r4 - r12, r15} + LDMFD r13!, {r4 - r12, r15} @ENDFUNC .END - + |