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* Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-socLinus Torvalds2012-12-12270-10616/+10139
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull ARM SoC updates from Olof Johansson: "This contains the bulk of new SoC development for this merge window. Two new platforms have been added, the sunxi platforms (Allwinner A1x SoCs) by Maxime Ripard, and a generic Broadcom platform for a new series of ARMv7 platforms from them, where the hope is that we can keep the platform code generic enough to have them all share one mach directory. The new Broadcom platform is contributed by Christian Daudt. Highbank has grown support for Calxeda's next generation of hardware, ECX-2000. clps711x has seen a lot of cleanup from Alexander Shiyan, and he's also taken on maintainership of the platform. Beyond this there has been a bunch of work from a number of people on converting more platforms to IRQ domains, pinctrl conversion, cleanup and general feature enablement across most of the active platforms." Fix up trivial conflicts as per Olof. * tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (174 commits) mfd: vexpress-sysreg: Remove LEDs code irqchip: irq-sunxi: Add terminating entry for sunxi_irq_dt_ids clocksource: sunxi_timer: Add terminating entry for sunxi_timer_dt_ids irq: versatile: delete dangling variable ARM: sunxi: add missing include for mdelay() ARM: EXYNOS: Avoid early use of of_machine_is_compatible() ARM: dts: add node for PL330 MDMA1 controller for exynos4 ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412 ARM: EXYNOS: add UART3 to DEBUG_LL ports ARM: S3C24XX: Add clkdev entry for camif-upll clock ARM: SAMSUNG: Add s3c24xx/s3c64xx CAMIF GPIO setup helpers ARM: sunxi: Add missing sun4i.dtsi file pinctrl: samsung: Do not initialise statics to 0 ARM i.MX6: remove gate_mask from pllv3 ARM i.MX6: Fix ethernet PLL clocks ARM i.MX6: rename PLLs according to datasheet ARM i.MX6: Add pwm support ARM i.MX51: Add pwm support ARM i.MX53: Add pwm support ARM: mx5: Replace clk_register_clkdev with clock DT lookup ...
| * mfd: vexpress-sysreg: Remove LEDs codePawel Moll2012-12-071-77/+0
| | | | | | | | | | | | | | | | | | | | | | As the current LEDs code breaks other platform, remove it. It shall be replaced by a generic "MMIO LEDs" driver. Reported-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Pawel Moll <pawel.moll@arm.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * Merge tag 'sunxi-fixes-for-3.8' of git://github.com/mripard/linux into next/socOlof Johansson2012-12-072-1/+3
| |\ | | | | | | | | | | | | | | | | | | | | | | | | From Maxime Ripard: Fixes in sunXi related drivers for 3.8 * tag 'sunxi-fixes-for-3.8' of git://github.com/mripard/linux: irqchip: irq-sunxi: Add terminating entry for sunxi_irq_dt_ids clocksource: sunxi_timer: Add terminating entry for sunxi_timer_dt_ids
| | * irqchip: irq-sunxi: Add terminating entry for sunxi_irq_dt_idsAxel Lin2012-12-031-1/+2
| | | | | | | | | | | | | | | | | | | | | The of_device_id table is supposed to be zero-terminated. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * clocksource: sunxi_timer: Add terminating entry for sunxi_timer_dt_idsAxel Lin2012-12-031-0/+1
| | | | | | | | | | | | | | | | | | | | | The of_device_id table is supposed to be zero-terminated. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * | Merge branch 'integrator/irq' into next/socOlof Johansson2012-11-301-1/+0
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Picking up one compilation warning fix for integrator. From Linus Walleij: * integrator/irq: irq: versatile: delete dangling variable Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | irq: versatile: delete dangling variableLinus Walleij2012-11-301-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This one was just creating noise like this: drivers/irqchip/irq-versatile-fpga.c: In function 'fpga_irq_of_init': drivers/irqchip/irq-versatile-fpga.c:180:24: warning: unused variable 'f' Reported-by: Russell King <linux@arm.linux.org.uk> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | Merge branch 'sunxi/soc2' into next/socOlof Johansson2012-11-301-0/+1
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding one patch to fix build error. * sunxi/soc2: ARM: sunxi: add missing include for mdelay() Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | ARM: sunxi: add missing include for mdelay()Josh Cartwright2012-11-301-0/+1
| | | |/ | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CC arch/arm/mach-sunxi/sunxi.o ./arch/arm/mach-sunxi/sunxi.c: In function 'sunxi_restart': ./arch/arm/mach-sunxi/sunxi.c:55:3: error: implicit declaration of function 'mdelay' [-Werror=implicit-function-declaration] Signed-off-by: Josh Cartwright <josh.cartwright@ni.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | Merge branch 'next/devel-samsung-3' of ↵Olof Johansson2012-11-305-6/+43
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc From Kukjin Kim: This is including Samsung small updates(developments) for v3.8. Add node PL330 MDMA1 and UART3 for DEBUG_LL and secondary cpu bring-up for exynos4412. * 'next/devel-samsung-3' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: dts: add node for PL330 MDMA1 controller for exynos4 ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412 ARM: EXYNOS: add UART3 to DEBUG_LL ports Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | ARM: dts: add node for PL330 MDMA1 controller for exynos4Bartlomiej Zolnierkiewicz2012-11-282-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing PL330 MDMA1 controller node to the device tree (DT). [ Currently there is no problem with using 'non-secure' mdma1 address instead of 'secure' one on revision 0 of Exynos4210 SOC (as used by Universal C210 board) as this SOC revision is unsupported by DT. ] Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412Tomasz Figa2012-11-281-6/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Exynos4412 uses different information register for each core. This patch adjusts the bring-up code to take that into account. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | ARM: EXYNOS: add UART3 to DEBUG_LL portsOlof Johansson2012-11-282-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for using UART3 for DEBUG_LL on exynos. [dianders: added depend on ARCH_EXYNOS.] Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | Merge branch 'next/pinctrl-samsung-2' of ↵Olof Johansson2012-11-301-1/+1
| |\ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc From Kukjin Kim: * 'next/pinctrl-samsung-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: pinctrl: samsung: Do not initialise statics to 0 Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | pinctrl: samsung: Do not initialise statics to 0Sachin Kamat2012-11-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Static variables are initialised to 0 by GCC. Fixes the following checkpatch error: ERROR: do not initialise statics to 0 or NULL FILE: pinctrl/pinctrl-samsung.c:50: static unsigned int pin_base = 0; Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | | Merge branch 'next/cam-samsung' of ↵Olof Johansson2012-11-30187-957/+2578
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc From Kukjin Kim: Just adding camif gpio setup and clkdev. * 'next/cam-samsung' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: S3C24XX: Add clkdev entry for camif-upll clock ARM: SAMSUNG: Add s3c24xx/s3c64xx CAMIF GPIO setup helpers + Linux 3.7-rc6 Conflicts due to the 3.7-rc6 sync: arch/arm/mach-highbank/system.c include/linux/clk-provider.h, resolved as in other branches. Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | ARM: S3C24XX: Add clkdev entry for camif-upll clockSylwester Nawrocki2012-11-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The s3c-camif driver uses "camera" clock conn_id for the "camif-upll" (s3c244x) and "camera" (s3c64xx) platform clock. By adding this new clkdev entry the platform differences are isolated from the driver. Signed-off-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | | ARM: SAMSUNG: Add s3c24xx/s3c64xx CAMIF GPIO setup helpersSylwester Nawrocki2012-11-284-0/+77
| | | |/ / / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds default helper functions for the camera port pin configuration. Whenever pinctrl support for s3c24xx/s3c64xx SoCs is available these code should be removed and proper pinctrl API should be used in the CAMIF driver. Signed-off-by: Sylwester Nawrocki <sylvester.nawrocki@gmail.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | | ARM: EXYNOS: Avoid early use of of_machine_is_compatible()Doug Anderson2012-11-282-5/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The recent commit "ARM: EXYNOS: add support for EXYNOS5440 SoC" broke support for exynos5250 because of_machine_is_compatible() was used too early in the boot process. It also probably meant that the exynos5440 failed to use the proper iotable. Switch to use of_flat_dt_is_compatible() in both of these cases. The failure I was seeing in exynos5250 because of this was: Division by zero in kernel. [<80015ed4>] (unwind_backtrace+0x0/0xec) from [<8045c7a4>] (dump_stack+0x20/0x24) [<8045c7a4>] (dump_stack+0x20/0x24) from [<80012990>] (__div0+0x20/0x28) [<80012990>] (__div0+0x20/0x28) from [<8021ab04>] (Ldiv0_64+0x8/0x18) [<8021ab04>] (Ldiv0_64+0x8/0x18) from [<80068560>] (__clocksource_updatefreq_scale+0x54/0x134) [<80068560>] (__clocksource_updatefreq_scale+0x54/0x134) from [<8006865c>] (__clocksource_register_scale+0x1c/0x54) [<8006865c>] (__clocksource_register_scale+0x1c/0x54) from [<80612a18>] (exynos_timer_init+0x100/0x1e8) [<80612a18>] (exynos_timer_init+0x100/0x1e8) from [<8060d184>] (time_init+0x28/0x38) [<8060d184>] (time_init+0x28/0x38) from [<8060a754>] (start_kernel+0x1e0/0x3c8) [<8060a754>] (start_kernel+0x1e0/0x3c8) from [<40008078>] (0x40008078) Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Kukjin Kim <kgene.kim@samsung.com> [olofj: fixed two build errors, one missing include and one !CONFIG_OF failure] Signed-off-by: Olof Johansson <olof@lixom.net>
| * | | | | ARM: sunxi: Add missing sun4i.dtsi fileStefan Roese2012-11-261-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch f055f1f6 [ARM: sunxi: Add sun4i and cubieboard support] missed this sun4i.dtsi include file. This patch finally brings it upstream enabling support for sun4i boards. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
| * | | | | Merge branch 'next/soc-exynos5440' of ↵Olof Johansson2012-11-2617-22/+1258
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/soc From Kukjin Kim: This is adding support for exynos5440, including Quad ARM Cortex-A15 cores and its reference board SSDK5440. Note, at this moment, just enabled minimal system part for initial kernel boot and pinctrl driver. * 'next/soc-exynos5440' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: dts: Add pin controller node for Samsung EXYNOS5440 SoC pinctrl: exynos5440: add pinctrl driver for Samsung EXYNOS5440 SoC ARM: dts: add initial dts file for EXYNOS5440, SSDK5440 ARM: EXYNOS: add support for EXYNOS5440 SoC Add/add conflict in arch/arm/boot/dts/Makefile. Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | ARM: dts: Add pin controller node for Samsung EXYNOS5440 SoCThomas Abraham2012-11-221-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | | pinctrl: exynos5440: add pinctrl driver for Samsung EXYNOS5440 SoCThomas Abraham2012-11-223-0/+925
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new pinctrl driver for Samsung EXYNOS5440 SoC. The pin controller module in EXYNOS5440 is different from the pin controller found on other Samsung SoC. Hence, the pin controller driver for EXYNOS5440 SoC is independent of the Samsung pinctrl framework. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | | ARM: dts: add initial dts file for EXYNOS5440, SSDK5440Kukjin Kim2012-11-223-1/+190
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds initial dts file for EXYNOS5440 SoC and adds the dts file for SSDK5440 board which is a kind of reference board. More properties will be added later. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | | ARM: EXYNOS: add support for EXYNOS5440 SoCKukjin Kim2012-11-2211-21/+126
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for EXYNOS5440 SoC which is including ARM Cortex-A15 Quad cores. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| * | | | | | Merge tag 'imx-soc-1' of git://git.pengutronix.de/git/imx/linux-2.6 into ↵Olof Johansson2012-11-2511-153/+386
| |\ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | next/soc From Sascha Hauer: ARM i.MX SoC updates for v3.8 * tag 'imx-soc-1' of git://git.pengutronix.de/git/imx/linux-2.6: ARM i.MX6: remove gate_mask from pllv3 ARM i.MX6: Fix ethernet PLL clocks ARM i.MX6: rename PLLs according to datasheet ARM i.MX6: Add pwm support ARM i.MX51: Add pwm support ARM i.MX53: Add pwm support ARM: mx5: Replace clk_register_clkdev with clock DT lookup Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | ARM i.MX6: remove gate_mask from pllv3Sascha Hauer2012-11-223-17/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the additional enable bits in the enet PLL are handled as gates, the gate_mask is identical for all plls. Remove the gate_mask from the code and use the BM_PLL_ENABLE bit for enabling/disabling the PLL. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
| | * | | | | | ARM i.MX6: Fix ethernet PLL clocksSascha Hauer2012-11-223-63/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In current code the ethernet PLL is not handled correctly. The PLL runs at 500MHz and has different outputs. Only the enet reference clock is implemented. This patch changes the PLL so that it outputs 500MHz and adds the additional outputs as dividers. This now matches the datasheet which says: > This PLL synthesizes a low jitter clock from 24 MHz reference clock. > The PLL outputs a 500 MHz clock. The reference clocks generated by this PLL are: > • Ref_PCIe = 125 MHz > • Ref_SATA = 100 MHz > • Ref_ethernet, which is configurable based on the PLL_ENET[1:0] register field. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
| | * | | | | | ARM i.MX6: rename PLLs according to datasheetSascha Hauer2012-11-222-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In recent reference manuals the PLLs were renumbered. PLL8 now is PLL6 and vice versa. Change the code according to the reference manual to avoid confusion. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
| | * | | | | | ARM i.MX6: Add pwm supportSascha Hauer2012-11-221-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
| | * | | | | | ARM i.MX51: Add pwm supportSascha Hauer2012-11-221-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
| | * | | | | | ARM i.MX53: Add pwm supportSascha Hauer2012-11-221-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org>
| | * | | | | | ARM: mx5: Replace clk_register_clkdev with clock DT lookupFabio Estevam2012-11-226-70/+293
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Similarly as it was done for mx6q, use a DT lookup in order to make maintainance task for the clock devices easier. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | | | | | Merge branch 'depends/gpio-devel' into next/socOlof Johansson2012-11-2312-43/+376
| |\ \ \ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pulling in a newer version of the depend branch from the gpio tree, since there was some randconfig breakage introduced at the version we had, and we want to keep those things as bisectable as possible. It's not bad enough to warrant a rebase though, so there'll be a window of exposure to this. * depends/gpio-devel: gpio: SPEAr: add spi chipselect control driver gpio: gpio-max710x: Support device tree probing gpio: twl4030: Use only TWL4030_MODULE_LED for LED configuration gpio: tegra: read output value when gpio is set in direction_out gpio: pca953x: Add compatible strings to gpio-pca953x driver gpio: pca953x: Register an IRQ domain gpio: mvebu: Set free callback for gpio_chip gpio: tegra: Drop exporting static functions gpio: tegra: Staticize non-exported symbols gpio: tegra: fix suspend/resume apis gpio-pch: Set parent dev for gpio chip gpio: em: Fix build errors Signed-off-by: Olof Johansson <olof@lixom.net>
| * \ \ \ \ \ \ \ Merge branch 'sunxi/soc2' into next/socOlof Johansson2012-11-219-59/+186
| |\ \ \ \ \ \ \ \ | | | |_|_|_|_|/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Maxime Ripard: Here is a pull request to add the support for Allwinner A10 SoCs. * sunxi/soc2: ARM: sunxi: Add sunxi restart function via onchip watchdog ARM: sunxi: Add sun4i and cubieboard support ARM: sunxi: Add earlyprintk support for UART0 (sun4i) ARM: sunxi: Restructure sunxi dts/dtsi files Signed-off-by: Olof Johansson <olof@lixom.net>
| | * | | | | | | ARM: sunxi: Add sunxi restart function via onchip watchdogMaxime Ripard2012-11-213-1/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | ARM: sunxi: Add sun4i and cubieboard supportStefan Roese2012-11-204-1/+50
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the Cubieboard based on the Allwinner A10/sun4i SoC. Currently only UART is supported. Other devices will eventually follow. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | ARM: sunxi: Add earlyprintk support for UART0 (sun4i)Stefan Roese2012-11-202-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| | * | | | | | | ARM: sunxi: Restructure sunxi dts/dtsi filesStefan Roese2012-11-203-56/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the new sun4i/Cubieboard (A10) support, lets re-strucure the sun5i dts files to make it more generic. Those are the new dts/dtsi files: sunxi.dtsi - Devices common to all Allwinner sunXi SoC's sun4i.dtsi - sun4i Devices, will include sunxi.dtsi sun5i.dtsi - sun5i Devices, will include sunxi.dtsi board.dts - will include either sun4i.dtsi or sun5i.dtsi Additionally the "duart" label in the olinuxino.dts is changed to "uart1". Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
| * | | | | | | | Merge branch 'samsung/pinctrl' into next/socOlof Johansson2012-11-217-666/+856
| |\ \ \ \ \ \ \ \ | | | |_|_|_|_|/ / | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | From Kukjin Kim: Here is Samsung DT for v3.8 and this is including DT for EXYNOS4X12 SoC, SMDK4412 board, pinctrl for exynos4x12, TMU, MFC, SATA and SATA PHY. As I commented on [4/7], this branch merged pinctrl/samsung to support pinctrl for exynos4x12 without useless merge conflicts. * samsung/pinctrl: pinctrl: samsung: Update error check for unsigned variables pinctrl: samsung: Add support for EXYNOS4X12 Documentation: Update samsung-pinctrl device tree bindings documentation pinctrl: samsung: Add GPIO to IRQ translation pinctrl: exynos: Set pin function to EINT in irq_set_type of wake-up EINT pinctrl: samsung: Use per-bank IRQ domain for wake-up interrupts pinctrl: samsung: Use one GPIO chip per pin bank pinctrl: exynos: Use one IRQ domain per pin bank pinctrl: samsung: Include bank-specific eint offset in bank struct pinctrl: samsung: Hold pointer to driver data in bank struct pinctrl: samsung: Match pin banks with their device nodes ARM: dts: exynos4210-pinctrl: Add nodes for pin banks pinctrl: samsung: Distinguish between pin group and bank nodes pinctrl: samsung: Remove static pin enumerations pinctrl: samsung: Assing pin numbers dynamically pinctrl: samsung: Do not pass gpio_chip to pin_to_reg_bank pinctrl: samsung: Detect and handle unsupported configuration types
| | * | | | | | | pinctrl: samsung: Update error check for unsigned variablesTushar Behera2012-11-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Checking '< 0' for unsigned variables always returns false. For error codes, use IS_ERR_VALUE() instead. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Tushar Behera <tushar.behera@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | | | | pinctrl: samsung: Add support for EXYNOS4X12Tomasz Figa2012-11-194-0/+114
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch extends the driver with any necessary SoC-specific definitions to support EXYNOS4X12 SoCs. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Thomas Abraham <thomas.abraham@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
| | * | | | | | | Merge remote-tracking branch 'pinctrl/samsung' into next/pinctrl-samsungKukjin Kim2012-11-197-665/+741
| | |\ \ \ \ \ \ \
| | | * | | | | | | Documentation: Update samsung-pinctrl device tree bindings documentationTomasz Figa2012-10-151-25/+93
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | | * | | | | | | pinctrl: samsung: Add GPIO to IRQ translationTomasz Figa2012-10-151-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some drivers require a way to translate GPIO pins to their IRQ numbers. This patch adds the .to_irq() gpiolib callback to pinctrl-samsung driver, which creates (if not present yet) and returns an IRQ mapping for given GPIO pin. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | | * | | | | | | pinctrl: exynos: Set pin function to EINT in irq_set_type of wake-up EINTTomasz Figa2012-10-151-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pins used as wake-up interrupts need to be configured as EINTs. This patch adds the required configuration code to exynos_wkup_irq_set_type, to set the pin as EINT when its interrupt trigger type is configured. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | | * | | | | | | pinctrl: samsung: Use per-bank IRQ domain for wake-up interruptsTomasz Figa2012-10-155-76/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch reworks wake-up interrupt handling in pinctrl-exynos driver, so each pin bank, which provides wake-up interrupts, has its own IRQ domain. Information about whether given pin bank provides wake-up interrupts, how many and whether they are separate or muxed are parsed from device tree. It gives following advantages: - interrupts can be specified in device tree in a more readable way, e.g. : device { /* ... */ interrupt-parent = <&gpx2>; interrupts = <4 0>; /* ... */ }; - the amount and layout of interrupts is not hardcoded in the code anymore, but defined in SoC-specific structure - bank and pin of each wake-up interrupt can be easily identified, to allow operations, such as setting the pin to EINT function, from irq_set_type() callback Signed-off-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | | * | | | | | | pinctrl: samsung: Use one GPIO chip per pin bankTomasz Figa2012-10-152-49/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch modifies the pinctrl-samsung driver to register one GPIO chip per pin bank, instead of a single chip for all pin banks of the controller. It simplifies GPIO accesses a lot (constant time instead of looping through the list of banks to find the right one) and should have a good effect on performance of any bit-banging driver. In addition it allows to reference GPIO pins by a phandle to the bank node and a local pin offset inside of the bank (similar to previous gpiolib driver), which is more clear and readable than using indices relative to the whole pin controller. Example: device { /* ... */ gpios = <&gpk0 4 0>; /* ... */ }; Signed-off-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | | * | | | | | | pinctrl: exynos: Use one IRQ domain per pin bankTomasz Figa2012-10-155-109/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of registering one IRQ domain for all pin banks of a pin controller, this patch implements registration of per-bank domains. At a cost of a little memory overhead (~2.5KiB for all GPIO interrupts of Exynos4x12) it simplifies driver code and device tree sources, because GPIO interrupts can be now specified per banks. Example: device { /* ... */ interrupt-parent = <&gpa1>; interrupts = <3 0>; /* ... */ }; Signed-off-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| | | * | | | | | | pinctrl: samsung: Include bank-specific eint offset in bank structTomasz Figa2012-10-153-29/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some SoCs, like Exynos4x12, have non-sequential layout of EINT control registers and so current way of calculating register addresses does not work correctly for them. This patch adds eint_offset field to samsung_pin_bank struct and modifies the driver to use it instead of calculating the offsets from bank index. Signed-off-by: Tomasz Figa <t.figa@samsung.com> Reviewed-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
generated by cgit v1.1 at 2024-12-25 15:26:30 +0000