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* Merge tag 'for-3.10-rc1' of git://gitorious.org/linux-pwm/linux-pwmLinus Torvalds2013-05-0620-79/+91
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull pwm changes from Thierry Reding: "Nothing very exciting this time around. A couple of bug fixes and a lot of cleanup across the board. The DaVinci 8xx family of SoCs now use the same driver as the AM33xx family. Many thanks to Axel Lin and Jingoo Han who have done a great job fixing various bugs and inconsistencies." * tag 'for-3.10-rc1' of git://gitorious.org/linux-pwm/linux-pwm: (27 commits) pwm: lpc32xx: Don't change PWM_ENABLE bit in lpc32xx_pwm_config pwm: lpc32xx: Properly set PWM_ENABLE bit in lpc32xx_pwm_[enable|disable] pwm: Constify OF match tables pwm: pwm-tiehrpwm: Update device-tree binding document pwm: pwm-tiecap: Update device-tree binding document pwm: puv3: Remove unused enabled filed from struct puv3_pwm_chip pwm: pxa: Remove PWM_ID_BASE macro pwm: spear: Remove unused *dev from struct spear_pwm_chip pwm: mxs: Remove unused *dev from struct mxs_pwm_chip pwm: twl: Return proper error if twl6030_pwm_enable() fails pwm: pxa: Remove clk_enabled field from struct pxa_pwm_chip pwm: imx: Remove enabled field from struct imx_chip pwm: twl: Add .owner to struct pwm_ops pwm: twl-led: Add .owner to struct pwm_ops pwm: atmel-tcb: Add .owner to struct pwm_ops pwm: ab8500: Add .owner to struct pwm_ops pwm: spear: Fix checking return value of clk_enable() and clk_prepare() pwm: tiehrpwm: Staticize non-exported symbols pwm: tiecap: Staticize non-exported symbols pwm: ab8500: Fix trivial typo in dev_err message ...
| * pwm: lpc32xx: Don't change PWM_ENABLE bit in lpc32xx_pwm_configAxel Lin2013-04-231-2/+5
| | | | | | | | | | | | | | | | | | lpc32xx_pwm_config() is supposed to set duty_ns and period_ns, it should not change PWM_ENABLE bit. Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: lpc32xx: Properly set PWM_ENABLE bit in lpc32xx_pwm_[enable|disable]Axel Lin2013-04-231-2/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the LPC32x0 User Manual [1]: For both PWM1 and PWM2 Control Registers: BIT 31: This bit gates the PWM_CLK signal and enables the external output pin to the PWM_PIN_STATE logical level. 0 = PWM disabled. (Default) 1 = PWM enabled So in lpc32xx_pwm_enable(), we should set PWM_ENABLE bit. In lpc32xx_pwm_disable(), we should just clear PWM_ENABLE bit rather than write 0 to the register which will also clear PWMx_RELOADV and PWMx_DUTY bits. [1] http://www.nxp.com/documents/user_manual/UM10326.pdf Signed-off-by: Axel Lin <axel.lin@ingics.com> Tested-by: Roland Stigge <stigge@antcom.de> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: Constify OF match tablesThierry Reding2013-04-236-6/+6
| | | | | | | | | | | | | | | | | | | | A few drivers already annotate this properly. Make the same change for all other OF supporting drivers. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Alexandre Pereira da Silva <aletes.xgr@gmail.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
| * pwm: pwm-tiehrpwm: Update device-tree binding documentPhilip Avinash2013-04-081-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | Update binding document of pwm-tiehrpwm to reflect the usage of similar modules in da850 and am3xx SOCs. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Rob Landley <rob@landley.net> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: pwm-tiecap: Update device-tree binding documentPhilip Avinash2013-04-081-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | Update binding document of pwm-tiecap to reflect the usage of similar modules in da850 and am3xx SOCs. Signed-off-by: Philip Avinash <avinashphilip@ti.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Rob Landley <rob@landley.net> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: puv3: Remove unused enabled filed from struct puv3_pwm_chipAxel Lin2013-04-021-1/+0
| | | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: pxa: Remove PWM_ID_BASE macroAxel Lin2013-04-021-4/+3
| | | | | | | | | | | | | | | | | | PWM_ID_BASE() is not used after convert to PWM framework, remove it. Also update driver_data field of struct platform_device_id accordingly. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: spear: Remove unused *dev from struct spear_pwm_chipAxel Lin2013-04-021-3/+0
| | | | | | | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Shiraz Hashim <shiraz.hashim@st.com> Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: mxs: Remove unused *dev from struct mxs_pwm_chipAxel Lin2013-04-021-2/+0
| | | | | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: twl: Return proper error if twl6030_pwm_enable() failsAxel Lin2013-04-021-1/+1
| | | | | | | | | | | | | | | | Return proper error instead of 0 if twl6030_pwm_enable() fails. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: pxa: Remove clk_enabled field from struct pxa_pwm_chipAxel Lin2013-04-021-14/+2
| | | | | | | | | | | | | | | | | | | | | | clk_enable/clk_disable maintain an enable_count, clk_prepare and clk_unprepare also maintain a prepare_count. These APIs will do prepare/enable when the first user calling these APIs, and do disable/unprepare when the corresponding counter reach 0. Thus We don't need to maintain a clk_enabled counter here. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: imx: Remove enabled field from struct imx_chipAxel Lin2013-04-021-5/+1
| | | | | | | | | | | | | | | | | | We can test PWMF_ENABLED bit to know if pwm is enabled or not. Thus remove enabled field from struct imx_chip. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: twl: Add .owner to struct pwm_opsAxel Lin2013-04-021-0/+2
| | | | | | | | | | | | | | | | | | Add missing .owner of struct pwm_ops. This prevents the module from being removed from underneath its users. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: twl-led: Add .owner to struct pwm_opsAxel Lin2013-04-021-0/+2
| | | | | | | | | | | | | | | | | | Add missing .owner of struct pwm_ops. This prevents the module from being removed from underneath its users. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: atmel-tcb: Add .owner to struct pwm_opsAxel Lin2013-04-021-0/+1
| | | | | | | | | | | | | | | | Add missing .owner of struct pwm_ops. This prevents the module from being removed from underneath its users. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: ab8500: Add .owner to struct pwm_opsAxel Lin2013-04-021-0/+1
| | | | | | | | | | | | | | | | Add missing .owner of struct pwm_ops. This prevents the module from being removed from underneath its users. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: spear: Fix checking return value of clk_enable() and clk_prepare()Axel Lin2013-04-021-3/+3
| | | | | | | | | | | | | | | | | | | | The logic to check return value of clk_enable() and clk_prepare() is reversed, fix it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Cc: stable@vger.kernel.org Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: tiehrpwm: Staticize non-exported symbolsAxel Lin2013-03-261-2/+2
| | | | | | | | | | | | | | | | Both ehrpwm_pwm_save_context() and ehrpwm_pwm_restore_context() are only used in this file, make them static. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: tiecap: Staticize non-exported symbolsAxel Lin2013-03-261-2/+2
| | | | | | | | | | | | | | | | Both ecap_pwm_save_context() and ecap_pwm_restore_context() are only used in this file, make them static. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: ab8500: Fix trivial typo in dev_err messageAxel Lin2013-03-261-1/+1
| | | | | | | | | | Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: davinci: Add Kconfig support for ECAP & EHRPWM devicesPhilip Avinash2013-03-222-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add EHRPWM and ECAP support build support for DAVINCI_DA8XX platforms. Also, since DAVINCI platforms doesn't support TI-PWM-Subsystem module, remove the select option for CONFIG_PWM_TIPWMSS. Also, update CONFIG_PWM_TIPWMSS compiler directive appropriately in pwm-tipwmss.h to fix the below compiler error upon removal of CONFIG_PWM_TIPWMSS for DAVINCI platforms. drivers/pwm/pwm-tiecap.c: In function 'ecap_pwm_probe': drivers/pwm/pwm-tiecap.c:263:4: error: 'PWMSS_ECAPCLK_EN' undeclared (first use in this function) drivers/pwm/pwm-tiecap.c:263:4: note: each undeclared identifier is reported only once for each function it appears in drivers/pwm/pwm-tiecap.c:264:17: error: 'PWMSS_ECAPCLK_EN_ACK' undeclared (first use in this function) drivers/pwm/pwm-tiecap.c: In function 'ecap_pwm_remove': drivers/pwm/pwm-tiecap.c:291:49: error: 'PWMSS_ECAPCLK_STOP_REQ' undeclared (first use in this function) make[2]: *** [drivers/pwm/pwm-tiecap.o] Error 1 make[1]: *** [drivers/pwm] Error 2 make: *** [drivers] Error 2 Signed-off-by: Philip Avinash <avinashphilip@ti.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: pwm-tiehrpwm: add CONFIG_PM_SLEEP to suspend/resume functionsJingoo Han2013-03-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | This patch adds CONFIG_PM_SLEEP to suspend/resume functions to fix the following build warning when CONFIG_PM_SLEEP is not selected. drivers/pwm/pwm-tiehrpwm.c:562:12: warning: 'ehrpwm_pwm_suspend' defined but not used [-Wunused-function] drivers/pwm/pwm-tiehrpwm.c:580:12: warning: 'ehrpwm_pwm_resume' defined but not used [-Wunused-function Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: pwm-tipwmss: add CONFIG_PM_SLEEP to suspend/resume functionsJingoo Han2013-03-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | This patch adds CONFIG_PM_SLEEP to suspend/resume functions to fix the following build warning when CONFIG_PM_SLEEP is not selected. drivers/pwm/pwm-tipwmss.c:104:12: warning: 'pwmss_suspend' defined but not used [-Wunused-function] drivers/pwm/pwm-tipwmss.c:113:12: warning: 'pwmss_resume' defined but not used [-Wunused-function] Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: pwm-tiecap: add CONFIG_PM_SLEEP to suspend/resume functionsJingoo Han2013-03-111-0/+2
| | | | | | | | | | | | | | | | | | | | | | This patch adds CONFIG_PM_SLEEP to suspend/resume functions to fix the following build warning when CONFIG_PM_SLEEP is not selected. drivers/pwm/pwm-tiecap.c:314:12: warning: 'ecap_pwm_suspend' defined but not used [-Wunused-function] drivers/pwm/pwm-tiecap.c:328:12: warning: 'ecap_pwm_resume' defined but not used [-Wunused-function] Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: samsung: convert s3c_pwm to dev_pm_opsJingoo Han2013-03-081-11/+9
| | | | | | | | | | | | | | | | Instead of using legacy suspend/resume methods, using newer dev_pm_ops structure allows better control over power management. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm: ab8500: use devm_kzalloc()Jingoo Han2013-03-081-5/+2
| | | | | | | | | | | | | | Use devm_kzalloc() to make cleanup paths more simple. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
| * pwm_backlight: remove unnecessary ifdefsJingoo Han2013-03-081-5/+2
| | | | | | | | | | | | | | | | | | | | When the macro such as SIMPLE_DEV_PM_OPS is used, there is no need to use '#ifdef CONFIG_PM' to prevent build error. Thus, this patch removes unnecessary ifdefs. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Cc: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
* | Merge tag 'iommu-updates-v3.10' of ↵Linus Torvalds2013-05-0620-131/+380
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu Pull IOMMU updates from Joerg Roedel: "The updates are mostly about the x86 IOMMUs this time. Exceptions are the groundwork for the PAMU IOMMU from Freescale (for a PPC platform) and an extension to the IOMMU group interface. On the x86 side this includes a workaround for VT-d to disable interrupt remapping on broken chipsets. On the AMD-Vi side the most important new feature is a kernel command-line interface to override broken information in IVRS ACPI tables and get interrupt remapping working this way. Besides that there are small fixes all over the place." * tag 'iommu-updates-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (24 commits) iommu/tegra: Fix printk formats for dma_addr_t iommu: Add a function to find an iommu group by id iommu/vt-d: Remove warning for HPET scope type iommu: Move swap_pci_ref function to drivers/iommu/pci.h. iommu/vt-d: Disable translation if already enabled iommu/amd: fix error return code in early_amd_iommu_init() iommu/AMD: Per-thread IOMMU Interrupt Handling iommu: Include linux/err.h iommu/amd: Workaround for ERBT1312 iommu/amd: Document ivrs_ioapic and ivrs_hpet parameters iommu/amd: Don't report firmware bugs with cmd-line ivrs overrides iommu/amd: Add ioapic and hpet ivrs override iommu/amd: Add early maps for ioapic and hpet iommu/amd: Extend IVRS special device data structure iommu/amd: Move add_special_device() to __init iommu: Fix compile warnings with forward declarations iommu/amd: Properly initialize irq-table lock iommu/amd: Use AMD specific data structure for irq remapping iommu/amd: Remove map_sg_no_iommu() iommu/vt-d: add quirk for broken interrupt remapping on 55XX chipsets ...
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| *-----. \ Merge branches 'iommu/fixes', 'x86/vt-d', 'x86/amd', 'ppc/pamu', 'core' and ↵Joerg Roedel2013-05-02847-5651/+9775
| |\ \ \ \ \ | | | | | | | | | | | | | | | | | | | | | 'arm/tegra' into next
| | | | | * | iommu/tegra: Fix printk formats for dma_addr_tVarun Sethi2013-05-022-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix printk formats for dma_addr_t: drivers/iommu/tegra-smmu.c: In function 'smmu_iommu_iova_to_phys': >> drivers/iommu/tegra-smmu.c:774:2: warning: format '%lx' expects argument of type 'long unsigned int', but argument 4 has type 'dma_addr_t' [-Wformat] -- drivers/iommu/tegra-gart.c: In function 'gart_iommu_iova_to_phys': >> drivers/iommu/tegra-gart.c:298:3: warning: format '%lx' expects argument of type 'long unsigned int', but argument 3 has type 'dma_addr_t' [-Wformat] Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | | | * | | iommu: Add a function to find an iommu group by idAlexey Kardashevskiy2013-04-242-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As IOMMU groups are exposed to the user space by their numbers, the user space can use them in various kernel APIs so the kernel might need an API to find a group by its ID. As an example, QEMU VFIO on PPC64 platform needs it to associate a logical bus number (LIOBN) with a specific IOMMU group in order to support in-kernel handling of DMA map/unmap requests. The patch adds the iommu_group_get_by_id(id) function which performs such search. v2: fixed reference counting. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Acked-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | | | * | | iommu: Move swap_pci_ref function to drivers/iommu/pci.h.Varun Sethi2013-04-233-12/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The swap_pci_ref function is used by the IOMMU API code for swapping pci device pointers, while determining the iommu group for the device. Currently this function was being implemented for different IOMMU drivers. This patch moves the function to a new file, drivers/iommu/pci.h so that the implementation can be shared across various IOMMU drivers. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | | | * | | iommu: Include linux/err.hWang YanQing2013-04-191-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The linux/iommu.h header uses ERR_PTR defined in linux/err.h but doesn't include it. Cc:joro@8bytes.org Reviewed-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Wang YanQing <udknight@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | | * | | | iommu/fsl: Add the window permission flag as a parameter to ↵Varun Sethi2013-04-022-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | iommu_window_enable API. Each iommu window can have access permissions associated with it. Extended the window_enable API to incorporate window access permissions. In case of PAMU each window can have its specific set of permissions. Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | | * | | | iommu/fsl: Make iova dma_addr_t in the iommu_iova_to_phys API.Varun Sethi2013-04-0210-16/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is required in case of PAMU, as it can support a window size of up to 64G (even on 32bit). Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | * | | | | iommu/amd: fix error return code in early_amd_iommu_init()Wei Yongjun2013-04-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix to return -ENOMEM int the memory alloc error handling case instead of 0, as done elsewhere in this function. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | * | | | | iommu/AMD: Per-thread IOMMU Interrupt HandlingSuravee Suthikulpanit2013-04-232-50/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the current interrupt handling scheme, there are as many threads as the number of IOMMUs. Each thread is created and assigned to an IOMMU at the time of registering interrupt handlers (request_threaded_irq). When an IOMMU HW generates an interrupt, the irq handler (top half) wakes up the corresponding thread to process event and PPR logs of all IOMMUs starting from the 1st IOMMU. In the system with multiple IOMMU,this handling scheme complicates the synchronization of the IOMMU data structures and status registers as there could be multiple threads competing for the same IOMMU while the other IOMMU could be left unhandled. To simplify, this patch is proposing a different interrupt handling scheme by having each thread only managing interrupts of the corresponding IOMMU. This can be achieved by passing the struct amd_iommu when registering the interrupt handlers. This structure is unique for each IOMMU and can be used by the bottom half thread to identify the IOMMU to be handled instead of calling for_each_iommu. Besides this also eliminate the needs to lock the IOMMU for processing event and PPR logs. Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | * | | | | iommu/amd: Workaround for ERBT1312Joerg Roedel2013-04-191-8/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Work around an IOMMU hardware bug where clearing the EVT_INT or PPR_INT bit in the status register may race with the hardware trying to set it again. When not handled the bit might not be cleared and we lose all future event or ppr interrupts. Reported-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Cc: stable@vger.kernel.org Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | * | | | | iommu/amd: Document ivrs_ioapic and ivrs_hpet parametersJoerg Roedel2013-04-191-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Document the new kernel commandline parameters in the appropriate file. Reviewed-by: Shuah Khan <shuahkhan@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | * | | | | iommu/amd: Don't report firmware bugs with cmd-line ivrs overridesJoerg Roedel2013-04-191-3/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the IVRS entries for IOAPIC and HPET are overridden on the kernel command line, a problem detected in the check function might not be a firmware bug anymore. So disable the firmware bug reporting if the user provided valid ivrs_ioapic or ivrs_hpet entries on the command line. Reviewed-by: Shuah Khan <shuahkhan@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | * | | | | iommu/amd: Add ioapic and hpet ivrs overrideJoerg Roedel2013-04-191-2/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add two new kernel commandline parameters ivrs_ioapic and ivrs_hpet to override the Id->DeviceId mapping from the IVRS ACPI table. This can be used to work around broken BIOSes to get interrupt remapping working on AMD systems. Tested-by: Borislav Petkov <bp@suse.de> Tested-by: Suravee Suthikulanit <suravee.suthikulpanit@amd.com> Reviewed-by: Shuah Khan <shuahkhan@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | * | | | | iommu/amd: Add early maps for ioapic and hpetJoerg Roedel2013-04-191-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is needed in a later patch were ioapic_map and hpet_map entries are created before the slab allocator is initialized (and thus add_special_device() can't be used). Reviewed-by: Shuah Khan <shuahkhan@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | * | | | | iommu/amd: Extend IVRS special device data structureJoerg Roedel2013-04-192-10/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch extends the devid_map data structure to allow ioapic and hpet entries in ivrs to be overridden on the kernel command line. Reviewed-by: Shuah Khan <shuahkhan@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | * | | | | iommu/amd: Move add_special_device() to __initJoerg Roedel2013-04-191-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function is only called by other __init functions, so it can be moved to __init too. Reviewed-by: Shuah Khan <shuahkhan@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | * | | | | iommu/amd: Properly initialize irq-table lockJoerg Roedel2013-04-181-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fixes a lockdep warning. Cc: stable@vger.kernel.org # >= v3.7 Reviewed-by: Shuah Khan <shuahkhan@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | * | | | | iommu/amd: Use AMD specific data structure for irq remappingJoerg Roedel2013-04-181-27/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For compatibility reasons the irq remapping code for the AMD IOMMU used the same per-irq data structure as the Intel implementation. Now that support for the AMD specific data structure is upstream we can use this one instead. Reviewed-by: Shuah Khan <shuahkhan@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | * | | | | iommu/amd: Remove map_sg_no_iommu()Joerg Roedel2013-04-181-21/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function was intended as a fall-back if the map_sg function is called for a device not mapped by the IOMMU. Since the AMD IOMMU driver uses per-device dma_ops this can never happen. So this function isn't needed anymore. Reviewed-by: Shuah Khan <shuahkhan@gmail.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| | * | | | | iommu/amd: Re-enable IOMMU event log interrupt after handling.Suravee Suthikulpanit2013-04-022-0/+4
| | |/ / / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current driver does not clear the IOMMU event log interrupt bit in the IOMMU status register after processing an interrupt. This causes the IOMMU hardware to generate event log interrupt only once. This has been observed in both IOMMU v1 and V2 hardware. This patch clears the bit by writing 1 to bit 1 of the IOMMU status register (MMIO Offset 2020h) Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
| * | | | | iommu/vt-d: Remove warning for HPET scope typeLinn Crosetto2013-04-241-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ACPI_DMAR_SCOPE_TYPE_HPET is parsed by ir_parse_ioapic_hpet_scope() and should not be flagged as an unsupported type. Signed-off-by: Linn Crosetto <linn@hp.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
generated by cgit v1.1 at 2025-02-07 16:41:10 +0000