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* MIPS: Alchemy: Increase minimum timeout for 32kHz timer.Manuel Lauss2012-02-201-1/+1
| | | | | | | | | | | | | | | | | | | | | Since a clocksource change post 3.2-rc1, tasks on my DB1500 board hang after random amounts of time (from a few minutes to a few hours), regardless of load. Debugging showed that the compare-match register value is a few seconds lower than the current counter value. The minimum value of 8 was initialy determined by a trial-and-error approach. Currently it is sufficient for all Alchemys (without PCI apparently), independent of CPU clock; only the DB1500 and DB1550 boards experience these timer-related tasks hangs now. This patch increases the minimum timeout by 1 (to 9 counter ticks) which seems sufficient since the systems are still working perfectly fine after over 24 hours. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3214/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'next/alchemy' into mips-for-linux-nextRalf Baechle2012-01-1152-2701/+3710
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| * MIPS: Alchemy: db1200: Improve PB1200 detection.Manuel Lauss2011-12-081-8/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PB1200 has the CPLD located at an address which on the DB1200 is RAM; reading the Board-ID sometimes results in a PB1200 being detected instead (especially during reboots after long uptimes). On the other hand, the address of the DB1200's CPLD is hosting Flash chips on the PB1200. Test for the DB1200 first and additionally do a quick write-test to the hexleds register to make sure we're writing to the CPLD. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3005/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: merge Au1000 and Au1300-style IRQ controller code.Manuel Lauss2011-12-083-587/+550
| | | | | | | | | | | | | | | | | | | | | | With a generic plat_irq_dispatch (for Alchemy at least) code for both interrupt controller types can coexist in a single kernel image and be autodetected at runtime. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2935/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: chain IRQ controllers to MIPS IRQ controllerManuel Lauss2011-12-082-49/+39
| | | | | | | | | | | | | | | | | | IC and GPIC are now chain handlers of the traditional MIPS IRQ controller. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2933/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: irq: register pm at irq init timeManuel Lauss2011-12-082-96/+91
| | | | | | | | | | | | | | | | | | No need for a device_initcall. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2934/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Touchscreen support on DB1100Manuel Lauss2011-12-081-0/+56
| | | | | | | | | | | | | | | | | | Wire up the ADS7846 touchscreen controller on the DB1100. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2879/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Hook up IrDA on DB1000/DB1100Manuel Lauss2011-12-081-17/+57
| | | | | | | | | | | | | | | | | | | | Add necessary transceiver control platform data and hook up the IrDA peripheral on the DB1000 and DB1100 boards. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2878/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: remove unused board headersManuel Lauss2011-12-081-3/+0
| | | | | | | | | | | | | | | | | | The information in those headers is no longer necessary. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2876/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MTD: nand: make au1550nd.c a platform_driverManuel Lauss2011-12-081-0/+66
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Transform the au1550nd.c driver into a platform_driver and hook it up in the PB1550 board (gen_nand works fine on the DB1550, but since I don't have a PB1550 to test this driver stays for now). Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-mtd@lists.infradead.org To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2875/ Patchwork: https://patchwork.linux-mips.org/patch/3160/ Acked-by: Artem Bityutskiy <dedekind1@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Add RTC device to all devboardsManuel Lauss2011-12-074-26/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | All Devboards can use the 32kHz counter as a RTC device. Also delete the custom CMOS RTC header, which can be used for the DS1693 on the PB1500. But since it doesn't have a buffer battery it is as useful as the on-chip RTC which I prefer. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2874/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: MMC for DB1100Manuel Lauss2011-12-071-0/+202
| | | | | | | | | | | | | | | | | | | | This patch hooks up the 2 MMC sockets on the DB1100 board. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2873/ Patchwork: https://patchwork.linux-mips.org/patch/2920/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: one kernel for DB1000/DB1500/DB1100Manuel Lauss2011-12-075-100/+80
| | | | | | | | | | | | | | | | | | | | | | | | These 3 boards are very similar; with this patch a single kernel image which runs on all three can be built. Tested on DB1500 and DB1100. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2872/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Merge PB1200 support into DB1200 code.Manuel Lauss2011-12-075-507/+229
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PB1200 is basically a DB1200 with additional MMC and camera sockets and different base addresses for external hardware (CPLD, IDE, Net, NAND). This patch implements the missing PB1200 features in DB1200 support code and runtime board detection. Tested on DB1200 only. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2880/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: move au1200fb global functions to platform dataManuel Lauss2011-12-073-69/+89
| | | | | | | | | | | | | | | | | | | | | | au1200fb calls 3 functions which have to be defined in board code. Fix this ugliness with the introduction of platform_data. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-fbdev@vger.kernel.org To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2871/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: merge devboard code into single per-board files.Manuel Lauss2011-12-0719-748/+464
| | | | | | | | | | | | | | Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2884/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: merge GPR/MTX-1/XXS1500 board code into single filesManuel Lauss2011-12-0715-555/+326
| | | | | | | | | | | | | | | | | | | | Most of these files are have more comments than real code; merge them all into single board-<name>.c files. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2869/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Improved DB1550 support, with audio and serial busses.Manuel Lauss2011-12-075-75/+520
| | | | | | | | | | | | | | Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2868/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Basic support for the DB1300 board.Manuel Lauss2011-12-075-0/+807
| | | | | | | | | | | | | | | | | | Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2867/ Patchwork: https://patchwork.linux-mips.org/patch/2919/ Patchwork: https://patchwork.linux-mips.org/patch/2928/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Au1300 SoC supportManuel Lauss2011-12-0710-3/+695
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add basic support for the Au1300 variant(s): - New GPIO/Interrupt controller - DBDMA ids - USB setup - MMC support - enable various PSC drivers - detection code. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2866/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: devboards: remove unneeded BCSR IRQ reg accManuel Lauss2011-12-071-9/+2
| | | | | | | | | | | | | | | | | | | | | | | | Initially I had to write to both the MASK and ENABLE registers, otherwise the CPLD would generate tons of spurious interrupts. With the change to the demux handler to disable the muxed line, it is now sufficient to disable the interrupt by writing either the enable or mask register. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2865/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Drop MIRAGE/BOSPORUS board supportManuel Lauss2011-12-076-203/+3
| | | | | | | | | | | | | | | | | | | | | | | | No test hardware and no (apparent) users. These boards seem very similar to the DB1500, so if required support can be brought back again (I have datasheets) but then with dedicated board code, not tacked on to DB1000 support. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2864/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: remove PB1000 supportManuel Lauss2011-12-077-246/+1
| | | | | | | | | | | | | | | | | | | | | | | | Noone seems to have test hardware or care anymore. Drop PB1000 support and along with it the old Alchemy PCMCIA socket driver. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Cc: netdev@vger.kernel.org Cc: linux-pcmcia@lists.infradead.org Patchwork: https://patchwork.linux-mips.org/patch/2881/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: irq: Remove IRQF_DISABLEDYong Zhang2011-12-073-5/+4
|/ | | | | | | | | | | | | | | | | | | | Since commit [e58aa3d2: genirq: Run irq handlers with interrupts disabled], We run all interrupt handlers with interrupts disabled and we even check and yell when an interrupt handler returns with interrupts enabled (see commit [b738a50a: genirq: Warn when handler enables interrupts]). So now this flag is a NOOP and can be removed. [ralf@linux-mips.org: Fixed up conflicts in arch/mips/alchemy/common/dbdma.c, arch/mips/cavium-octeon/smp.c and arch/mips/kernel/perf_event.c.] Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> To: linux-kernel@vger.kernel.org Cc: tglx@linutronix.de linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2835/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2011-11-0324-901/+1019
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (37 commits) MIPS: O32: Provide definition of registers ta0 .. ta3. MIPS: perf: Add Octeon support for hardware perf. MIPS: perf: Add support for 64-bit perf counters. MIPS: perf: Reorganize contents of perf support files. MIPS: perf: Cleanup formatting in arch/mips/kernel/perf_event.c MIPS: Add accessor macros for 64-bit performance counter registers. MIPS: Add probes for more Octeon II CPUs. MIPS: Add more CPU identifiers for Octeon II CPUs. MIPS: XLR, XLS: Add comment for smp setup MIPS: JZ4740: GPIO: Check correct IRQ in demux handler MIPS: JZ4740: GPIO: Simplify IRQ demuxer MIPS: JZ4740: Use generic irq chip MIPS: Alchemy: remove all CONFIG_SOC_AU1??? defines MIPS: Alchemy: kill au1xxx.h header MIPS: Alchemy: clean DMA code of CONFIG_SOC_AU1??? defines MIPS, IDE: Alchem, au1xxx-ide: Remove pb1200/db1200 header dep MIPS: Alchemy: Redo PCI as platform driver MIPS: Alchemy: more base address cleanup MIPS: Alchemy: rewrite USB platform setup. MIPS: Alchemy: abstract USB block control register access ... Fix up trivial conflicts in: arch/mips/alchemy/devboards/db1x00/platform.c drivers/ide/Kconfig drivers/mmc/host/au1xmmc.c drivers/video/Kconfig sound/mips/Kconfig
| * MIPS: Alchemy: remove all CONFIG_SOC_AU1??? definesManuel Lauss2011-10-249-220/+319
| | | | | | | | | | | | | | | | | | | | | | | | | | Now that no driver any longer depends on the CONFIG_SOC_AU1??? symbols, it's time to get rid of them: Move some of the platform devices to the boards which can use them, Rename a few (unused) constants in the header, Replace them with MIPS_ALCHEMY in the various Kconfig files. Finally delete them altogether from the Alchemy Kconfig file. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2707/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: kill au1xxx.h headerManuel Lauss2011-10-243-3/+4
| | | | | | | | | | | | | | | | | | | | | | No longer required Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2705/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> delete mode 100644 arch/mips/include/asm/mach-au1x00/au1xxx.h
| * MIPS: Alchemy: clean DMA code of CONFIG_SOC_AU1??? definesManuel Lauss2011-10-245-164/+139
| | | | | | | | | | | | | | | | | | | | This patch gets rid of all CONFIG_SOC_AU1XXX defines in DMA/DBDMA-related code. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2704/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS, IDE: Alchem, au1xxx-ide: Remove pb1200/db1200 header depManuel Lauss2011-10-242-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | au1xxx-ide uses defines from the pb1200/db1200 headers: get DBDMA ID through platform resource information, hardcode register spacing. The only 2 users of this driver (and the only boards it can really work on realiably) use the same register layout. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: linux-ide@vger.kernel.org To: Linux-MIPS <linux-mips@linux-mips.org> Cc: linux-ide@vger.kernel.org Acked-by: David S. Miller <davem@davemloft.net> Patchwork: https://patchwork.linux-mips.org/patch/2716/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Redo PCI as platform driverManuel Lauss2011-10-2414-223/+340
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Rewrite Alchemy PCI support as a platform driver. - Fixup boards which have PCI. Run-tested on DB1500 and DB1550. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2706/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> delete mode 100644 arch/mips/alchemy/common/pci.c delete mode 100644 arch/mips/pci/fixup-au1000.c delete mode 100644 arch/mips/pci/ops-au1000.c create mode 100644 arch/mips/pci/pci-alchemy.c
| * MIPS: Alchemy: more base address cleanupManuel Lauss2011-10-248-131/+109
| | | | | | | | | | | | | | | | | | | | remove all redundant peripheral base address defines, fix all affected boards and drivers. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2700/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: rewrite USB platform setup.Manuel Lauss2011-10-241-108/+75
| | | | | | | | | | | | | | | | | | | | | | | | Use runtime CPU detection to setup all USB parts. Remove the Au1200 OTG and UDC platform devices since there are no drivers for them anyway. Clean up the USB address mess in the au1000 header. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2703/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: abstract USB block control register accessManuel Lauss2011-10-242-48/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Alchemy chips have one or more registers which control access to the usb blocks as well as PHY configuration. I don't want the OHCI/EHCI glues to know about the different registers and bits; new code hides the gory details of USB configuration from them. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: linux-usb@vger.kernel.org Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Patchwork: https://patchwork.linux-mips.org/patch/2709/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> create mode 100644 drivers/usb/host/alchemy-common.c
| * MIPS: Alchemy: support multiple GPIO styles in one kernelManuel Lauss2011-10-242-17/+22
| | | | | | | | | | | | | | | | | | | | | | For GPIOLIB=y decide at runtime which gpiochips to register; in the GPIOLIB=n case, the gpio headers need to be reshuffled a bit to make multiple implementations coexist peacefully. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2679/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Alchemy: Always build power codeManuel Lauss2011-10-241-4/+0
| | | | | | | | | | | | | | | | | | No reason NOT to build it Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2678/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * NET: au1000_eth: Pass MACDMA address through platform resource info.Manuel Lauss2011-10-241-9/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the last hardcoded base address from the au1000_eth driver. The base address of the MACDMA unit was derived from the platform device id; if someone registered the MACs in inverse order both would not work. So instead pass the base address of the DMA unit to the driver with the other platform resource information. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Acked-by: David S. Miller <davem@davemloft.net> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2674/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | Merge branch 'for-linus' of ↵Linus Torvalds2011-10-282-0/+64
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (549 commits) ALSA: hda - Fix ADC input-amp handling for Cx20549 codec ALSA: hda - Keep EAPD turned on for old Conexant chips ALSA: hda/realtek - Fix missing volume controls with ALC260 ASoC: wm8940: Properly set codec->dapm.bias_level ALSA: hda - Fix pin-config for ASUS W90V ALSA: hda - Fix surround/CLFE headphone and speaker pins order ALSA: hda - Fix typo ALSA: Update the sound git tree URL ALSA: HDA: Add new revision for ALC662 ASoC: max98095: Convert codec->hw_write to snd_soc_write ASoC: keep pointer to resource so it can be freed ASoC: sgtl5000: Fix wrong mask in some snd_soc_update_bits calls ASoC: wm8996: Fix wrong mask for setting WM8996_AIF_CLOCKING_2 ASoC: da7210: Add support for line out and DAC ASoC: da7210: Add support for DAPM ALSA: hda/realtek - Fix DAC assignments of multiple speakers ASoC: Use SGTL5000_LINREG_VDDD_MASK instead of hardcoded mask value ASoC: Set sgtl5000->ldo in ldo_regulator_register ASoC: wm8996: Use SND_SOC_DAPM_AIF_OUT for AIF2 Capture ASoC: wm8994: Use SND_SOC_DAPM_AIF_OUT for AIF3 Capture ...
| * ASoC: au1x: update db1200 machine to the new way of thingsManuel Lauss2011-07-271-0/+10
| | | | | | | | | | | | | | | | | | | | The use of the "soc-audio" platform device is no longer en vogue, update the code to the newer, simpler way of doing things. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Liam Girdwood <lrg@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
| * ASoC: au1x: remove automatic DMA device registration from PSC driversManuel Lauss2011-07-271-0/+6
| | | | | | | | | | | | | | | | | | | | | | The PSC audio drivers (psc-ac97/psc-i2s) register the DMA platform_device on their own. This is frowned upon, from now on board code must register a simple pcm dma platform device for each PSC with sound duties. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Liam Girdwood <lrg@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
| * ASoC: Add a DB1x00 AC97 machine driverManuel Lauss2011-07-271-0/+48
| | | | | | | | | | | | | | | | | | | | | | | | Add a machine driver suitable for the AC97 part on the DB1000/DB1500/DB1100 boards. Run-tested on DB1500. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Liam Girdwood <lrg@ti.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
* | MIPS: Alchemy: DB1200: Disable cascade IRQ in handlerManuel Lauss2011-09-212-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | Disable the cascade IRQ in the cascade handler. This is required to get the DB1300 working, and also gets rid of all spurious interrupts previously observed on the DB1200; so Config[OD] can be disabled again for better performance. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Patchwork: https://patchwork.linux-mips.org/patch/2708/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Alchemy: Include Au1100 in PM code.Manuel Lauss2011-09-211-8/+14
| | | | | | | | | | | | | | | | | | | | The current code forgets the Au1100 when looking for the correct method to suspend the chip. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2675/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* | MIPS: Alchemy: Fix typo in MAC0 registrationManuel Lauss2011-09-211-1/+1
|/ | | | | | | | | | Harmless typo which prints an error message although MAC0 was registered successfully. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2672/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Merge branch 'timers-clocksource-for-linus' of ↵Linus Torvalds2011-05-191-2/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'timers-clocksource-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: clocksource: convert mips to generic i8253 clocksource clocksource: convert x86 to generic i8253 clocksource clocksource: convert footbridge to generic i8253 clocksource clocksource: add common i8253 PIT clocksource blackfin: convert to clocksource_register_hz mips: convert to clocksource_register_hz/khz sparc: convert to clocksource_register_hz/khz alpha: convert to clocksource_register_hz microblaze: convert to clocksource_register_hz/khz ia64: convert to clocksource_register_hz/khz x86: Convert remaining x86 clocksources to clocksource_register_hz/khz Make clocksource name const
| * Merge branch 'consolidate-clksrc-i8253' of ↵Thomas Gleixner2011-05-1413-132/+142
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | master.kernel.org:~rmk/linux-2.6-arm into timers/clocksource Conflicts: arch/ia64/kernel/cyclone.c arch/mips/kernel/i8253.c arch/x86/kernel/i8253.c Reason: Resolve conflicts so further cleanups do not conflict further Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
| * | mips: convert to clocksource_register_hz/khzJohn Stultz2011-02-211-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | This converts the mips clocksources to use clocksource_register_hz/khz CC: Ralf Baechle <ralf@linux-mips.org> CC: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: John Stultz <johnstul@us.ibm.com>
* | | MIPS: Alchemy: Clean up GPIO registers and accessorsManuel Lauss2011-05-194-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | remove au_readl/au_writel, remove the predefined GPIO1/2 KSEG1 register addresses and fix the fallout in all boards and drivers. This also fixes a bug in the mtx-1_wdt driver which was introduced by commit 6ea8115bb6f359df4f45152f2b40e1d4d1891392 ("Convert mtx1 wdt to be a platform device and use generic GPIO API") before this patch mtx-1_wdt only modified GPIO215, the patch then used the gpio resource information as bit index into the GPIO2 register but the conversion to the GPIO API didn't realize that. With this patch the drivers original behaviour is restored and GPIO15 is left alone. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> Cc: Florian Fainelli <florian@openwrt.org> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: linux-watchdog@vger.kernel.org Cc: Wim Van Sebroeck <wim@iguana.be> Patchwork: https://patchwork.linux-mips.org/patch/2381/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
* | | MIPS: Alchemy: Cleanup DMA addressesManuel Lauss2011-05-192-25/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | According to the databooks, the Au1000 DMA engine must be programmed with the physical FIFO addresses. This patch does that; furthermore this opened the possibility to get rid of a lot of now unnecessary address defines. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2348/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
* | | MIPS: Alchemy: Rewrite ethernet platform setupManuel Lauss2011-05-191-50/+101
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rewrite ethernet setup to use runtime cpu detection, and also clean up the ethernet base address mess as far as possible. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2353/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
* | | MIPS: Alchemy: Rewrite UART setup and constants.Manuel Lauss2011-05-197-63/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Detect CPU type at runtime and setup uarts accordingly; also clean up the uart base address mess in the process as far as possible. Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com> To: Linux-MIPS <linux-mips@linux-mips.org> Cc: Florian Fainelli <florian@openwrt.org> Cc: Wolfgang Grandegger <wg@grandegger.com> Patchwork: https://patchwork.linux-mips.org/patch/2352/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org
generated by cgit v1.1 at 2024-12-26 07:02:38 +0000