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* KVM: PPC: Get rid of unnecessary RFIAlexander Graf2010-03-011-11/+11
| | | | | | | | | | | | Using an RFI in IR=1 is dangerous. We need to set two SRRs and then do an RFI without getting interrupted at all, because every interrupt could potentially overwrite the SRR values. Fortunately, we don't need to RFI in at least this particular case of the code, so we can just replace it with an mtmsr and b. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: PPC: Implement 'skip instruction' modeAlexander Graf2010-03-014-6/+59
| | | | | | | | | | | | | | | | | | | | To fetch the last instruction we were interrupted on, we enable DR in early exit code, where we are still in a very transitional phase between guest and host state. Most of the time this seemed to work, but another CPU can easily flush our TLB and HTAB which makes us go in the Linux page fault handler which totally breaks because we still use the guest's SLB entries. To work around that, let's introduce a second KVM guest mode that defines that whenever we get a trap, we don't call the Linux handler or go into the KVM exit code, but just jump over the faulting instruction. That way a potentially bad lwz doesn't trigger any faults and we can later on interpret the invalid instruction we fetched as "fetch didn't work". Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: PPC: Use PACA backed shadow vcpuAlexander Graf2010-03-0110-237/+249
| | | | | | | | | | | | | | | We're being horribly racy right now. All the entry and exit code hijacks random fields from the PACA that could easily be used by different code in case we get interrupted, for example by a #MC or even page fault. After discussing this with Ben, we figured it's best to reserve some more space in the PACA and just shove off some vcpu state to there. That way we can drastically improve the readability of the code, make it less racy and less complex. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: PPC: Add helpers for CR, XERAlexander Graf2010-03-014-10/+52
| | | | | | | | | | We now have helpers for the GPRs, so let's also add some for CR and XER. Having them in the PACA simplifies code a lot, as we don't need to care about where to store CC or not to overflow any integers. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: PPC: Use accessor functions for GPR accessAlexander Graf2010-03-0111-225/+274
| | | | | | | | | | | | | | | All code in PPC KVM currently accesses gprs in the vcpu struct directly. While there's nothing wrong with that wrt the current way gprs are stored and loaded, it doesn't suffice for the PACA acceleration that will follow in this patchset. So let's just create little wrapper inline functions that we call whenever a GPR needs to be read from or written to. The compiled code shouldn't really change at all for now. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: PPC: Enable lightweight exits againAlexander Graf2010-03-012-53/+57
| | | | | | | | | | | | | | | | | The PowerPC C ABI defines that registers r14-r31 need to be preserved across function calls. Since our exit handler is written in C, we can make use of that and don't need to reload r14-r31 on every entry/exit cycle. This technique is also used in the BookE code and is called "lightweight exits" there. To follow the tradition, it's called the same in Book3S. So far this optimization was disabled though, as the code didn't do what it was expected to do, but failed to work. This patch fixes and enables lightweight exits again. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* KVM: PPC: Fix typo in rebolting codeAlexander Graf2010-03-011-1/+1
| | | | | | | | | | | When we're loading bolted entries into the SLB again, we're checking if an entry is in use and only slbmte it when it is. Unfortunately, the check always goes to the skip label of the first entry, resulting in an endless loop when it actually gets triggered. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* KVM: convert slots_lock to a mutexMarcelo Tosatti2010-03-011-2/+2
| | | | Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* KVM: split kvm_arch_set_memory_region into prepare and commitMarcelo Tosatti2010-03-011-4/+14
| | | | | | Required for SRCU convertion later. Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* KVM: modify memslots layout in struct kvmMarcelo Tosatti2010-03-011-1/+1
| | | | | | | | | Have a pointer to an allocated region inside struct kvm. [alex: fix ppc book 3s] Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
* KVM: powerpc: Remove AGGRESSIVE_DECAlexander Graf2010-03-011-15/+1
| | | | | | | | | | | Because we now emulate the DEC interrupt according to real life behavior, there's no need to keep the AGGRESSIVE_DEC hack around. Let's just remove it. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Acked-by: Hollis Blanchard <hollis@penguinppc.org> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: powerpc: Improve DEC handlingAlexander Graf2010-03-014-1/+24
| | | | | | | | | | | | | | | We treated the DEC interrupt like an edge based one. This is not true for Book3s. The DEC keeps firing until mtdec is issued again and thus clears the interrupt line. So let's implement this logic in KVM too. This patch moves the line clearing from the firing of the interrupt to the mtdec emulation. This makes PPC64 guests work without AGGRESSIVE_DEC defined. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Acked-by: Hollis Blanchard <hollis@penguinppc.org> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: powerpc: Move vector to irqprio resolving to separate functionAlexander Graf2010-03-011-3/+10
| | | | | | | | | | | | We're using a switch table to find the irqprio that belongs to a specific interrupt vector. This table is part of the interrupt inject logic. Since we'll add a new function to stop interrupts, let's move this table out of the injection logic into a separate function. Signed-off-by: Alexander Graf <agraf@suse.de> Acked-by: Acked-by: Hollis Blanchard <hollis@penguinppc.org> Signed-off-by: Avi Kivity <avi@redhat.com>
* KVM: Add KVM_MMIO kconfig itemAvi Kivity2010-03-011-0/+1
| | | | | | s390 doesn't have mmio, this will simplify ifdefing it out. Signed-off-by: Avi Kivity <avi@redhat.com>
* Merge branch 'perf-core-for-linus' of ↵Linus Torvalds2010-02-282-8/+5
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'perf-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (172 commits) perf_event, amd: Fix spinlock initialization perf_event: Fix preempt warning in perf_clock() perf tools: Flush maps on COMM events perf_events, x86: Split PMU definitions into separate files perf annotate: Handle samples not at objdump output addr boundaries perf_events, x86: Remove superflous MSR writes perf_events: Simplify code by removing cpu argument to hw_perf_group_sched_in() perf_events, x86: AMD event scheduling perf_events: Add new start/stop PMU callbacks perf_events: Report the MMAP pgoff value in bytes perf annotate: Defer allocating sym_priv->hist array perf symbols: Improve debugging information about symtab origins perf top: Use a macro instead of a constant variable perf symbols: Check the right return variable perf/scripts: Tag syscall_name helper as not yet available perf/scripts: Add perf-trace-python Documentation perf/scripts: Remove unnecessary PyTuple resizes perf/scripts: Add syscall tracing scripts perf/scripts: Add Python scripting engine perf/scripts: Remove check-perf-trace from listed scripts ... Fix trivial conflict in tools/perf/util/probe-event.c
| * perf_events: Simplify code by removing cpu argument to hw_perf_group_sched_in()Peter Zijlstra2010-02-261-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Since the cpu argument to hw_perf_group_sched_in() is always smp_processor_id(), simplify the code a little by removing this argument and using the current cpu where needed. Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: David Miller <davem@davemloft.net> Cc: Paul Mackerras <paulus@samba.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> LKML-Reference: <1265890918.5396.3.camel@laptop> Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * Merge branch 'perf/urgent' into perf/coreIngo Molnar2010-01-2972-1175/+3824
| |\ | | | | | | | | | | | | | | | | | | Merge reason: We want to queue up a dependent patch. Also update to later -rc's. Signed-off-by: Ingo Molnar <mingo@elte.hu>
| * | perf: Fix inconsistency between IP and callchain samplingAnton Blanchard2010-01-281-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When running perf across all cpus with backtracing (-a -g), sometimes we get samples without associated backtraces: 23.44% init [kernel] [k] restore 11.46% init eeba0c [k] 0x00000000eeba0c 6.77% swapper [kernel] [k] .perf_ctx_adjust_freq 5.73% init [kernel] [k] .__trace_hcall_entry 4.69% perf libc-2.9.so [.] 0x0000000006bb8c | |--11.11%-- 0xfffa941bbbc It turns out the backtrace code has a check for the idle task and the IP sampling does not. This creates problems when profiling an interrupt heavy workload (in my case 10Gbit ethernet) since we get no backtraces for interrupts received while idle (ie most of the workload). Right now x86 and sh check that current is not NULL, which should never happen so remove that too. Idle task's exclusion must be performed from the core code, on top of perf_event_attr:exclude_idle. Signed-off-by: Anton Blanchard <anton@samba.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Paul Mackerras <paulus@samba.org> Cc: Ingo Molnar <mingo@elte.hu> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mundt <lethal@linux-sh.org> LKML-Reference: <20100118054707.GT12666@kryten> Signed-off-by: Frederic Weisbecker <fweisbec@gmail.com>
* | | Merge branch 'next' of ↵Linus Torvalds2010-02-27109-715/+3959
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (88 commits) powerpc: Fix lwsync feature fixup vs. modules on 64-bit powerpc: Convert pmc_owner_lock to raw_spinlock powerpc: Convert die.lock to raw_spinlock powerpc: Convert tlbivax_lock to raw_spinlock powerpc: Convert mpic locks to raw_spinlock powerpc: Convert pmac_pic_lock to raw_spinlock powerpc: Convert big_irq_lock to raw_spinlock powerpc: Convert feature_lock to raw_spinlock powerpc: Convert i8259_lock to raw_spinlock powerpc: Convert beat_htab_lock to raw_spinlock powerpc: Convert confirm_error_lock to raw_spinlock powerpc: Convert ipic_lock to raw_spinlock powerpc: Convert native_tlbie_lock to raw_spinlock powerpc: Convert beatic_irq_mask_lock to raw_spinlock powerpc: Convert nv_lock to raw_spinlock powerpc: Convert context_lock to raw_spinlock powerpc/85xx: Add NOR, LEDs and PIB support for MPC8568E-MDS boards powerpc/86xx: Enable VME driver on the GE SBC610 powerpc/86xx: Enable VME driver on the GE PPC9A powerpc/86xx: Add MSI section to GE PPC9A DTS ...
| * | | powerpc: Fix lwsync feature fixup vs. modules on 64-bitBenjamin Herrenschmidt2010-02-262-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Anton's commit enabling the use of the lwsync fixup mechanism on 64-bit breaks modules. The lwsync fixup section uses .long instead of the FTR_ENTRY_OFFSET macro used by other fixups sections, and thus will generate 32-bit relocations that our module loader cannot resolve. This changes it to use the same type as other feature sections. Note however that we might want to consider using 32-bit for all the feature fixup offsets and add support for R_PPC_REL32 to module_64.c instead as that would reduce the size of the kernel image. I'll leave that as an exercise for the reader for now... Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | Merge commit 'origin/master' into nextBenjamin Herrenschmidt2010-02-2619-899/+94
| |\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | Manual merge of: drivers/char/hvc_console.c drivers/char/hvc_console.h
| * | | | powerpc: Convert pmc_owner_lock to raw_spinlockThomas Gleixner2010-02-191-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pmc_owner_lock needs to be a real spinlock in RT. Convert it to raw_spinlock. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | | powerpc: Convert die.lock to raw_spinlockThomas Gleixner2010-02-191-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | die.lock needs to be a real spinlock in RT. Convert it to raw_spinlock. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | | powerpc: Convert tlbivax_lock to raw_spinlockThomas Gleixner2010-02-191-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | tlbivax_lock needs to be a real spinlock in RT. Convert it to raw_spinlock. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | | powerpc: Convert mpic locks to raw_spinlockThomas Gleixner2010-02-192-20/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mpic_lock, irq_rover_lock and fixup_lock need to be real spinlocks in RT. Convert them to raw_spinlock. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | | powerpc: Convert pmac_pic_lock to raw_spinlockThomas Gleixner2010-02-191-19/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pmac_pic_lock needs to be a real spinlock in RT. Convert it to raw_spinlock. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | | powerpc: Convert big_irq_lock to raw_spinlockThomas Gleixner2010-02-191-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | big_irq_lock needs to be a real spinlock in RT. Convert it to raw_spinlock. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | | powerpc: Convert feature_lock to raw_spinlockThomas Gleixner2010-02-193-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | feature_lock needs to be a real spinlock in RT. Convert it to raw_spinlock. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | | powerpc: Convert i8259_lock to raw_spinlockThomas Gleixner2010-02-191-11/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i8259_lock needs to be a real spinlock in RT. Convert it to raw_spinlock. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | | powerpc: Convert beat_htab_lock to raw_spinlockThomas Gleixner2010-02-191-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | beat_htab_lock needs to be a real spinlock in RT. Convert it to raw_spinlock. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | | powerpc: Convert confirm_error_lock to raw_spinlockThomas Gleixner2010-02-191-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | confirm_error_lock needs to be a real spinlock in RT. Convert it to raw_spinlock. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | | powerpc: Convert ipic_lock to raw_spinlockThomas Gleixner2010-02-191-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ipic_lock needs to be a real spinlock in RT. Convert it to raw_spinlock. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | | powerpc: Convert native_tlbie_lock to raw_spinlockThomas Gleixner2010-02-191-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | native_tlbie_lock needs to be a real spinlock in RT. Convert it to raw_spinlock. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | | powerpc: Convert beatic_irq_mask_lock to raw_spinlockThomas Gleixner2010-02-191-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | beatic_irq_mask_lock needs to be a real spinlock in RT. Convert it to raw_spinlock. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | | powerpc: Convert nv_lock to raw_spinlockThomas Gleixner2010-02-191-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | nv_lock needs to be a real spinlock in RT. Convert it to raw_spinlock. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | | powerpc: Convert context_lock to raw_spinlockThomas Gleixner2010-02-191-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | context_lock needs to be a real spinlock in RT. Convert it to raw_spinlock. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
| * | | | Merge commit 'gcl/next' into nextBenjamin Herrenschmidt2010-02-199-29/+1806
| |\ \ \ \
| | * | | | powerpc/mpc5121: correct DIU compatible propertyAnatolij Gustschin2010-02-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DIU driver should bind against "fsl,mpc5121-diu" directly. Add this compatible property to the match table and fix DTS and platform code accordingly. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| | * | | | powerpc/mpc5121: enable support for more PSC UARTsAnatolij Gustschin2010-02-161-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | MPC5121 has 12 PSC devices. Enable UART support for all of them by defining the number of max. PSCs depending on selection of PPC_MPC512x platform support. Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| | * | | | powerpc/mpc5121: Add default config for MPC5121Anatolij Gustschin2010-02-161-0/+1694
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| | * | | | powerpc/mpc5121: update mpc5121ads DTSAnatolij Gustschin2010-02-161-22/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Collects several changes needed after applying previous mpc5121 platform and driver patches: - Add mpc5121 reset module node - Clean up and fix NAND description, remove unused properties here and correct NAND flash chip size. - Clean up I2C nodes: remove obsolete "cell-index" properties, add "fsl,preserve-clocking" property - Add I2C RTC node for m41t61 RTC - Add I2C nodes for AD7414 temperature sensor and AT24C32CD3 EEPROM - Fix compatible property in DMA node - Clean up CAN nodes, remove unused "cell-index" properties - Fix compatible property in DIU node - USB node changes: - use "fsl,mpc5121-usb2-dr" compatible property only - remove "port0" and "port1" properties as these are only used for multi-port host(MHP) module which is not available on MPC5121. - use 'fsl,invert-drvvbus' and 'fsl,invert-pwr-fault' in USB node for internal PHY to specify polarities of the appropriate port pins. Signed-off-by: Piotr Ziecik <kosmo@semihalf.com> Signed-off-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| | * | | | powerpc/mpc5121: create and register NFC deviceAnatolij Gustschin2010-02-161-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instantiate NAND Flash Controller device if it's description is found in the device tree. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| | * | | | powerpc/mpc5121: Add machine restart supportAnatolij Gustschin2010-02-165-0/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add reset module registers representation and machine restart callback for mpc5121 platform. Signed-off-by: Piotr Ziecik <kosmo@semihalf.com> Signed-off-by: Wolfgang Denk <wd@denx.de> Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| | * | | | powerpc/mpc5121: avoid using arch_initcall for clock initAnatolij Gustschin2010-02-165-7/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move mpc5121_clk_init() call to platform init code so it won't get called on non-5121 platforms on a multiplatform kernel. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
| * | | | | powerpc/85xx: Add NOR, LEDs and PIB support for MPC8568E-MDS boardsAnton Vorontsov2010-02-172-3/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds NOR Flash, LEDs and PIB support for MPC8568E-MDS boards. Plus, move bcsr node into localbus node, and add bcsr5 gpio-controller node. Some platform code modifications were also needed. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | | | powerpc/86xx: Enable VME driver on the GE SBC610Martyn Welch2010-02-171-1/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the VME driver (which is currently in staging) on the SBC610. Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | | | powerpc/86xx: Enable VME driver on the GE PPC9AMartyn Welch2010-02-171-1/+46
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enable the VME driver (which is currently in staging) on the PPC9A Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | | | powerpc/86xx: Add MSI section to GE PPC9A DTSMalcolm Crossley2010-02-171-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the MSI section to the DTS file for the GE PPC9A. Signed-off-by: Malcolm Crossley <malcolm.crossley2@gefanuc.com> Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | | | powerpc/86xx: Switch on highmem support on GE SBC610Martyn Welch2010-02-171-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | | | powerpc/86xx: Basic flash support for GE SBC610Martyn Welch2010-02-172-17/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support for the SBC610 VPX Single Board Computer from GE (PowerPC MPC8641D). This patch adds basic support for the on-board flash. Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
generated by cgit v1.1 at 2025-01-30 03:38:58 +0000