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* iommu/amd: Work around broken IVRS tablesJoerg Roedel2012-01-231-0/+3
| | | | | | | | | | | | On some systems the IVRS table does not contain all PCI devices present in the system. In case a device not present in the IVRS table is translated by the IOMMU no DMA is possible from that device by default. This patch fixes this by removing the DTE entry for every PCI device present in the system and not covered by IVRS. Cc: stable@vger.kernel.org # >= 3.0 Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* Merge branches 'iommu/page-sizes' and 'iommu/group-id' into nextJoerg Roedel2012-01-091-0/+21
|\ | | | | | | | | | | | | Conflicts: drivers/iommu/amd_iommu.c drivers/iommu/intel-iommu.c include/linux/iommu.h
| * iommu: Add option to group multi-function devicesAlex Williamson2011-11-151-1/+9
| | | | | | | | | | | | | | | | | | | | | | The option iommu=group_mf indicates the that the iommu driver should expose all functions of a multi-function PCI device as the same iommu_device_group. This is useful for disallowing individual functions being exposed as independent devices to userspace as there are often hidden dependencies. Virtual functions are not affected by this option. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| * iommu/amd: Implement iommu_device_groupAlex Williamson2011-11-151-0/+13
| | | | | | | | | | | | | | Just use the amd_iommu_alias_table directly. Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/amd: Init stats for iommu=ptJoerg Roedel2011-12-221-0/+2
| | | | | | | | | | | | | | | | The IOMMUv2 driver added a few statistic counter which are interesting in the iommu=pt mode too. So initialize the statistic counter for that mode too. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/amd: Add amd_iommu_device_info() functionJoerg Roedel2011-12-151-0/+43
| | | | | | | | | | | | | | This function can be used to find out which features necessary for IOMMUv2 usage are available on a given device. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/amd: Adapt IOMMU driver to PCI register name changesJoerg Roedel2011-12-151-8/+8
| | | | | | | | | | | | | | | | The symbolic register names for PCI and PASID changed in PCI code. This patch adapts the AMD IOMMU driver to these changes. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | Merge branch 'iommu/page-sizes' into x86/amdJoerg Roedel2011-12-141-8/+24
|\ \ | | | | | | | | | | | | Conflicts: drivers/iommu/amd_iommu.c
| * | iommu/amd: announce supported page sizesOhad Ben-Cohen2011-11-101-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Let the IOMMU core know we support arbitrary page sizes (as long as they're an order of 4KiB). This way the IOMMU core will retain the existing behavior we're used to; it will let us map regions that: - their size is an order of 4KiB - they are naturally aligned Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: Joerg Roedel <Joerg.Roedel@amd.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| * | iommu/core: stop converting bytes to page order back and forthOhad Ben-Cohen2011-11-101-8/+5
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Express sizes in bytes rather than in page order, to eliminate the size->order->size conversions we have whenever the IOMMU API is calling the low level drivers' map/unmap methods. Adopt all existing drivers. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Cc: David Brown <davidb@codeaurora.org> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Joerg Roedel <Joerg.Roedel@amd.com> Cc: Stepan Moskovchenko <stepanm@codeaurora.org> Cc: KyongHo Cho <pullip.cho@samsung.com> Cc: Hiroshi DOYU <hdoyu@nvidia.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/amd: Add stat counter for IOMMUv2 eventsJoerg Roedel2011-12-121-0/+17
| | | | | | | | | | | | | | Add some interesting statistic counters for events when IOMMUv2 is active. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/amd: Add device errata handlingJoerg Roedel2011-12-121-3/+54
| | | | | | | | | | | | | | Add infrastructure for errata-handling and handle two known erratas in the IOMMUv2 code. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/amd: Add function to get IOMMUv2 domain for pdevJoerg Roedel2011-12-121-0/+18
| | | | | | | | | | | | | | | | The AMD IOMMUv2 driver needs to get the IOMMUv2 domain associated with a particular device. This patch adds a function to get this information. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/amd: Implement function to send PPR completionsJoerg Roedel2011-12-121-0/+51
| | | | | | | | | | | | | | To send completions for PPR requests this patch adds a function which can be used by the IOMMUv2 driver. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/amd: Implement functions to manage GCR3 tableJoerg Roedel2011-12-121-0/+130
| | | | | | | | | | | | | | | | This patch adds functions necessary to set and clear the GCR3 values associated with a particular PASID in an IOMMUv2 domain. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/amd: Implement IOMMUv2 TLB flushing routinesJoerg Roedel2011-12-121-0/+136
| | | | | | | | | | | | | | | | The functions added with this patch allow to manage the IOMMU and the device TLBs for all devices in an IOMMUv2 domain. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/amd: Add support for IOMMUv2 domain modeJoerg Roedel2011-12-121-4/+140
| | | | | | | | | | | | | | This patch adds support for protection domains that implement two-level paging for devices. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/amd: Add amd_iommu_domain_direct_map functionJoerg Roedel2011-12-121-2/+36
| | | | | | | | | | | | | | | | This function can be used to switch a domain into paging-mode 0. In this mode all devices can access physical system memory directly without any remapping. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/amd: Implement notifier for PPR faultsJoerg Roedel2011-12-121-1/+89
| | | | | | | | | | | | | | Add a notifer at which a module can attach to get informed about incoming PPR faults. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/amd: Put IOMMUv2 capable devices in pt_domainJoerg Roedel2011-12-121-16/+78
| | | | | | | | | | | | | | | | | | | | | | If the device starts to use IOMMUv2 features the dma handles need to stay valid. The only sane way to do this is to use a identity mapping for the device and not translate it by the iommu. This is implemented with this patch. Since this lifts the device-isolation there is also a new kernel parameter which allows to disable that feature. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/amd: Convert dev_table_entry to u64Joerg Roedel2011-12-121-8/+10
|/ | | | | | | | Convert the contents of 'struct dev_table_entry' to u64 to allow updating the DTE wit 64bit writes as required by the spec. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
*---. Merge branches 'amd/fixes', 'debug/dma-api', 'arm/omap', 'arm/msm', 'core', ↵Joerg Roedel2011-10-211-2/+2
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | 'iommu/fault-reporting' and 'api/iommu-ops-per-bus' into next Conflicts: drivers/iommu/amd_iommu.c drivers/iommu/iommu.c
| | | * iommu/amd: Use bus_set_iommu instead of register_iommuJoerg Roedel2011-10-211-1/+1
| | |/ | | | | | | | | | | | | | | | | | | Convert the AMD IOMMU driver to use the new interface for publishing the iommu_ops. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
| * | iommu/amd: Fix wrong shift directionJoerg Roedel2011-10-111-1/+1
|/ / | | | | | | | | | | | | | | The shift direction was wrong because the function takes a page number and i is the address is the loop. Cc: stable@kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/amd: Don't take domain->lock recursivlyJoerg Roedel2011-09-021-5/+0
| | | | | | | | | | | | | | | | | | | | | | The domain_flush_devices() function takes the domain->lock. But this function is only called from update_domain() which itself is already called unter the domain->lock. This causes a deadlock situation when the dma-address-space of a domain grows larger than 1GB. Cc: stable@kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* | iommu/amd: Make sure iommu->need_sync contains correct valueJoerg Roedel2011-09-021-3/+10
|/ | | | | | | | | The value is only set to true but never set back to false, which causes to many completion-wait commands to be sent to hardware. Fix it with this patch. Cc: stable@kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu/amd: Don't use MSI address range for DMA addressesJoerg Roedel2011-07-061-1/+15
| | | | | | | | Reserve the MSI address range in the address allocator so that MSI addresses are not handed out as dma handles. Cc: stable@kernel.org Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* Merge branches 'amd/transparent-bridge' and 'core'Joerg Roedel2011-06-211-123/+168
| | | | | | | | Conflicts: arch/x86/include/asm/amd_iommu_types.h arch/x86/kernel/amd_iommu.c Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* iommu/amd: Move missing parts to drivers/iommuJoerg Roedel2011-06-211-3/+4
| | | | | | | | A few parts of the driver were missing in drivers/iommu. Move them there to have the complete driver in that directory. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
* x86: amd_iommu: move to drivers/iommu/Ohad Ben-Cohen2011-06-211-0/+2764
This should ease finding similarities with different platforms, with the intention of solving problems once in a generic framework which everyone can use. Compile-tested on x86_64. Signed-off-by: Ohad Ben-Cohen <ohad@wizery.com> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
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