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* Merge tag 'for-linus-3.4' of git://git.infradead.org/mtd-2.6Linus Torvalds2012-03-3035-432/+2366
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull MTD changes from David Woodhouse: - Artem's cleanup of the MTD API continues apace. - Fixes and improvements for ST FSMC and SuperH FLCTL NAND, amongst others. - More work on DiskOnChip G3, new driver for DiskOnChip G4. - Clean up debug/warning printks in JFFS2 to use pr_<level>. Fix up various trivial conflicts, largely due to changes in calling conventions for things like dmaengine_prep_slave_sg() (new inline wrapper to hide new parameter, clashing with rewrite of previously last parameter that used to be an 'append' flag, and is now a bitmap of 'unsigned long flags'). (Also some header file fallout - like so many merges this merge window - and silly conflicts with sparse fixes) * tag 'for-linus-3.4' of git://git.infradead.org/mtd-2.6: (120 commits) mtd: docg3 add protection against concurrency mtd: docg3 refactor cascade floors structure mtd: docg3 increase write/erase timeout mtd: docg3 fix inbound calculations mtd: nand: gpmi: fix function annotations mtd: phram: fix section mismatch for phram_setup mtd: unify initialization of erase_info->fail_addr mtd: support ONFI multi lun NAND mtd: sm_ftl: fix typo in major number. mtd: add device-tree support to spear_smi mtd: spear_smi: Remove default partition information from driver mtd: Add device-tree support to fsmc_nand mtd: fix section mismatch for doc_probe_device mtd: nand/fsmc: Remove sparse warnings and errors mtd: nand/fsmc: Add DMA support mtd: nand/fsmc: Access the NAND device word by word whenever possible mtd: nand/fsmc: Use dev_err to report error scenario mtd: nand/fsmc: Use devm routines mtd: nand/fsmc: Modify fsmc driver to accept nand timing parameters via platform mtd: fsmc_nand: add pm callbacks to support hibernation ...
| * mtd: nand: gpmi: fix function annotationsWolfram Sang2012-03-271-6/+6
| | | | | | | | | | | | | | | | | | | | | | A lot of functions have been marked __devinit, but they shouldn't, because they are needed for bbt_scan. While I believe the whole MX23 handling should be done entirely different, I am missing the resources to fix it. So, let's have at least the annotations correct. Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: unify initialization of erase_info->fail_addrShmulik Ladkani2012-03-271-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | Initialization of 'erase_info->fail_addr' to MTD_FAIL_ADDR_UNKNOWN prior erase operation is duplicated accross several MTD drivers, and also taken care of by some MTD users as well. Harmonize it: initialize 'fail_addr' within 'mtd_erase()' interface. Signed-off-by: Shmulik Ladkani <shmulik.ladkani@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: support ONFI multi lun NANDMatthieu CASTET2012-03-271-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With onfi a flash is organized into one or more logical units (LUNs). A logical unit (LUN) is the minimum unit that can independently execute commands and report status. Mtd does not exploit LUN, so make it see a big single flash where size is lun_size * number_of_lun. Without this patch MT29F8G08ADBDAH4 size is 512MiB instead of 1GiB. Artem: split long line on 2 shorter ones. Signed-off-by: Matthieu Castet <matthieu.castet@parrot.com> Acked-by: Florian Fainelli <ffainelli@freebox.fr> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: Add device-tree support to fsmc_nandStefan Roese2012-03-271-1/+56
| | | | | | | | | | | | | | | | | | This patch adds support to configure the FSMC NAND driver (used amongst others on SPEAr platforms) via device-tree instead of platform_data. Signed-off-by: Stefan Roese <sr@denx.de> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand/fsmc: Remove sparse warnings and errorsVipin Kumar2012-03-271-46/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the sparse below warnings and errors for nand/fsmc driver /root/vipin/spear/kernel/3.3/linux-3.3/drivers/mtd/nand/fsmc_nand.c:363:31: warning: incorrect type in initializer (different address spaces) /root/vipin/spear/kernel/3.3/linux-3.3/drivers/mtd/nand/fsmc_nand.c:363:31: expected struct fsmc_regs *regs /root/vipin/spear/kernel/3.3/linux-3.3/drivers/mtd/nand/fsmc_nand.c:363:31: got void [noderef] <asn:2>*regs_va [...] Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand/fsmc: Add DMA supportVipin Kumar2012-03-271-5/+163
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The fsmc_nand driver uses cpu to read/write onto the device. This is inefficient because of two reasons - the cpu gets locked on AHB bus while reading from NAND - the cpu is unnecessarily used when dma can do the job This patch adds the support for accessing the device through DMA Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand/fsmc: Access the NAND device word by word whenever possibleVipin Kumar2012-03-271-0/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The default way of accessing nand device is using the nand width. This means that 8bit devices are using u8 * and 16bit devices are accessed using u16 *. This results in a non-optimal performance since the FSMC is designed to translate the normal word accesses into device width based accesses. This patch implements read_buf and write_buf callbacks using word by word accesses. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand/fsmc: Use dev_err to report error scenarioVipin Kumar2012-03-271-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | fsmc controller takes time to calculate the bch8 codes and the error offsets. The calculate logic checks for completion upto a timeout. This patch adds a error print when this timer expires and the ecc or error offsets are not yet calculated. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand/fsmc: Use devm routinesVipin Kumar2012-03-271-91/+43
| | | | | | | | | | | | | | | | | | | | | | fsmc_nand driver currently uses normal kzalloc, request_mem etc routines. This patch replaces these routines with devm_kzalloc and devm_request_mem_region etc. Consequently, the error and driver removal scenarios are curtailed. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Reviewed-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand/fsmc: Modify fsmc driver to accept nand timing parameters via platformVipin Kumar2012-03-271-8/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | FSMC controllers provide registers to program the required timing values for attached NAND device. The timing values used until now are relaxed and should work for all devices. Although, for read/write performance improvements, the fsmc nand driver should accept nand timings as a platform data and program the timing parameters into fsmc registers accordingly. This patch implements this modification. Additionally, it programs the default timing parameters if these are not passed via platform data. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: fsmc_nand: add pm callbacks to support hibernationShiraz Hashim2012-03-271-6/+6
| | | | | | | | | | | | Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand/fsmc: Initialize the badblockbits to 7Vipin Kumar2012-03-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Ideally, the block should have 0xff written on the bad block position. Any value other than 0xff implies a bad block. In practical situations, there can be bit flips in the oob area as well which means that a block with 0x7f being read at bad block position may imply a bad block but it is infact only a bit flip in the bad block byte. To resolve this problem, the block is marked as good if number of high bits is greater than or equal to badblockbits (initialized to 7) Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand/fsmc: Flip the bit only if the error index is < 4096Vipin Kumar2012-03-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ECC can correct up to 8 bits in 512 bytes data + 13 bytes ecc. This means that the algorithm can correct a max of 8 bits in 4200 bits ie the error indices can be from 0 to 4199. Of these 0 to 4095 are for data and 4096 to 4199 for ecc. The driver flips the bit only if the index is <= 4096. This is a bug since the data bits are only from 0 to 4095. This patch modifies the check as < 4096 Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand/fsmc: Read only 512 + 13 bytes for 8bit NAND devicesVipin Kumar2012-03-271-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ECC logic of FSMC works on 512 bytes data + 13 bytes ECC to generate error indices of up to 8 incorrect bits. The FSMC driver reads 14 instead of 13 oob bytes to accommodate for 16 bit device as well. Unfortunately, the internal ecc state machine gets corrupted for 8 bit devices reading 512 + 14 bytes of data resulting in error indices not getting reported. Fix this by reading 14 bytes only for 16 bit devices Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand/fsmc: Correct the multiline comment formatVipin Kumar2012-03-271-4/+4
| | | | | | | | | | | | Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand/fsmc: Remove default partition information from driverArmando Visconti2012-03-271-58/+0
| | | | | | | | | | | | Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand/fsmc: Pass partition information through platform dataVipin Kumar2012-03-271-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch reimplements the passing of partition information through platform data. This was unintentionally deleted in commit 0d04eda1430e9a796214bee644b7e05d99cfe613 "mtd: fsmc_nand.c: use mtd_device_parse_register" Artem: fix gcc warning about passin 0 instead of NULL. Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Cc: stable@kernel.org [3.2+] Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: gpmi: fix the wrong DMA command.Huang Shijie2012-03-271-1/+2
| | | | | | | | | | | | | | | | | | | | The last DMA command of ECC read page is used to disable the BCH module. But the original code missed to set the pio[2] which is used to set the GPMI_HW_GPMI_ECCCTRL register. fix it now. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: flash drivers set ecc strengthMike Dunn2012-03-2725-1/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Flash device drivers initialize 'ecc_strength' in struct mtd_info, which is the maximum number of bit errors that can be corrected in one writesize region. Drivers using the nand interface intitialize 'strength' in struct nand_ecc_ctrl, which is the maximum number of bit errors that can be corrected in one ecc step. Nand infrastructure code translates this to 'ecc_strength'. Also for nand drivers, the nand infrastructure code sets ecc.strength for ecc modes NAND_ECC_SOFT, NAND_ECC_SOFT_BCH, and NAND_ECC_NONE. It is set in the driver for all other modes. Signed-off-by: Mike Dunn <mikedunn@newsguy.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: sh_flctl: Add power management with QoS requestBastian Hecht2012-03-271-9/+42
| | | | | | | | | | | | | | | | | | | | | | Adds power management code with fine granularity. Every flash control command is enclosed by runtime_put()/get()s. To make sure that no overhead is generated by too frequent power state switches, a quality of service request is issued. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: do not use plain 0 as NULLArtem Bityutskiy2012-03-2719-48/+48
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The first 3 arguments of 'mtd_device_parse_register()' are pointers, but many callers pass '0' instead of 'NULL'. Fix this globally. Thanks to coccinelle for making it easy to do with the following semantic patch: @@ expression mtd, types, parser_data, parts, nr_parts; @@ ( -mtd_device_parse_register(mtd, 0, parser_data, parts, nr_parts) +mtd_device_parse_register(mtd, NULL, parser_data, parts, nr_parts) | -mtd_device_parse_register(mtd, types, 0, parts, nr_parts) +mtd_device_parse_register(mtd, types, NULL, parts, nr_parts) | -mtd_device_parse_register(mtd, types, parser_data, 0, nr_parts) +mtd_device_parse_register(mtd, types, parser_data, NULL, nr_parts) ) Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: fsmc: Support of 224-bytes OOB area lengthArmando Visconti2012-03-271-0/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | The current patch is required to support EVALSPEAR1340CPU Revision 2 where a new (ONFI compliant) MT29F16G08 NAND flash from Micron is present. This NAND flash device defines a OOB area which is 224 bytes long (oobsize). Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: fsmc: Improve the fsmc_correct_data() routineArmando Visconti2012-03-271-21/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch improves the error correction routine for bch8 - Loop only up to number of errors detected - Improve the error index calculation procedure Additionally, it also renames the "correct" routine to indicate that it is bch8 specific Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: fsmc: fixed data abort inside change_bit()Armando Visconti2012-03-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Since change_bit() requires a (unsigned int *) as second arg, the correct definition of err_idx[] array declared as local variable of fsmc_correct_data() is the following: u32 err_idx[8]; Signed-off-by: Armando Visconti <armando.visconti@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: fsmc: use ALE and CLE offsets from platform dataShiraz Hashim2012-03-271-4/+5
| | | | | | | | | | | | | | | | | | ALE and CLE offsets can be different on different devices. Let devices pass these offsets to the fsmc driver through platform data. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: fsmc_nand: ECC1 & ECC4 layout separated for different page sizesBhavna Yadav2012-03-271-17/+159
| | | | | | | | | | | | | | | | | | | | | | ECC1 & ECC4 layout for NAND of different pages sizes for e.g. 512bytes, 2KiB, 4KiB and 8KiB are separated. Previously there existed one ECC4 layout for 2KiB & 4KiB page size due to which oob test module available in drivers/mtd/nand/test was failing. Signed-off-by: Bhavna Yadav <bhavna.yadav@st.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: fsmc: Newly erased page read algorithm implementedVipin Kumar2012-03-271-4/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A newly erased page contains ff in data as well as spare area. While reading an erased page, the read out ecc from spare area does not match the ecc generated by fsmc ecc hardware accelerator. This is because ecc of data ff ff is not ff ff. This leads to errors when file system erases and reads back the pages to ensure consistency. This patch adds a software workaround to ensure that the ecc check is not performed for erased pages. This problem is solved by checking the number of bits (in 512 byte data + 13 byte ecc) which are 0. If these number of bits are less than 8, the page is considered erased and correction algorithm is not tried on that page Signed-off-by: Vipin Kumar <vipin.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: sh_flctl: Add FLHOLDCR registerBastian Hecht2012-03-271-0/+3
| | | | | | | | | | | | | | | | | | Add a register used in new FLCTL hardware and a feature flag for it. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: sh_flctl: Use cached register value for FLCMNCRBastian Hecht2012-03-271-15/+7
| | | | | | | | | | | | | | | | | | | | Instead of reading out the register, use a cached value. This will make way for a proper runtime power management implementation. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: sh_flctl: Implement NAND_CMD_RNDOUT commandBastian Hecht2012-03-271-0/+16
| | | | | | | | | | | | | | | | | | Implements the command to seek and read in pages. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: sh_flctl: Expand the READID command to 8 bytesBastian Hecht2012-03-271-3/+9
| | | | | | | | | | | | | | | | | | | | The nand base code wants to read out 8 bytes in the READID command. Reflect this in the driver code. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: sh_flctl: Reorder empty_fifo() callsBastian Hecht2012-03-271-3/+2
| | | | | | | | | | | | | | | | | | | | Reorders the calls to make it a bit shorter and match the calling procedure displayed in the datasheet. Signed-off-by: Bastian Hecht <hechtb@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: change the location of the ONFI detected logHuang Shijie2012-03-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some strange nand chip(such as Hynix H27UBG8T2A) can pass the `ONFI` signature check. So the log can be printed out even it is not an ONFI nand indeed. Change this log to the end of the function. Print out the log only when we really detect an ONFI nand. Signed-off-by: Huang Shijie <b32955@freescale.com> Acked-by: Florian Fainelli <ffainelli@freebox.fr> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mxs-dma : rewrite the last parameter of mxs_dma_prep_slave_sg()Huang Shijie2012-03-271-6/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | [1] Background : The GPMI does ECC read page operation with a DMA chain consist of three DMA Command Structures. The middle one of the chain is used to enable the BCH, and read out the NAND page. The WAIT4END(wait for command end) is a comunication signal between the GPMI and MXS-DMA. [2] The current DMA code sets the WAIT4END bit at the last one, such as: +-----+ +-----+ +-----+ | cmd | ------------> | cmd | ------------------> | cmd | +-----+ +-----+ +-----+ ^ | | set WAIT4END here This chain works fine in the mx23/mx28. [3] But in the new GPMI version (used in MX50/MX60), the WAIT4END bit should be set not only at the last DMA Command Structure, but also at the middle one, such as: +-----+ +-----+ +-----+ | cmd | ------------> | cmd | ------------------> | cmd | +-----+ +-----+ +-----+ ^ ^ | | | | set WAIT4END here too set WAIT4END here If we do not set WAIT4END, the BCH maybe stalls in "ECC reading page" state. In the next ECC write page operation, a DMA-timeout occurs. This has been catched in the MX6Q board. [4] In order to fix the bug, rewrite the last parameter of mxs_dma_prep_slave_sg(), and use the dma_ctrl_flags: --------------------------------------------------------- DMA_PREP_INTERRUPT : append a new DMA Command Structrue. DMA_CTRL_ACK : set the WAIT4END bit for this DMA Command Structure. --------------------------------------------------------- [5] changes to the relative drivers: <1> For mxs-mmc driver, just use the new flags, do not change any logic. <2> For gpmi-nand driver, and use the new flags to set the DMA chain, especially for ecc read page. Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Huang Shijie <b32955@freescale.com> Acked-by: Vinod Koul <vinod.koul@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mxs-dma : move the mxs dma.h to a more common placeHuang Shijie2012-03-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the header to a more common place. The mxs dma engine is not only used in mx23/mx28, but also used in mx50/mx6q. It will also be used in the future chips. Rename it to mxs-dma.h, and create a new folder include/linux/fsl/ to store the Freescale's header files. change mxs-dma driver, mxs-mmc driver, gpmi-nand driver, mxs-saif driver to the new header file. Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Huang Shijie <b32955@freescale.com> Acked-by: Vinod Koul <vinod.koul@linux.intel.com> Acked-by: Chris Ball <cjb@laptop.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: gpmi: fix compiler warningHuang Shijie2012-03-271-1/+0
| | | | | | | | | | | | | | | | | | | | | | The gpmi driver selects the MTD_CMDLINE_PARTS directly. But we should not select a visible symbol. Just remove the select. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: move zero length verification to MTD API functionsArtem Bityutskiy2012-03-271-10/+0
| | | | | | | | | | | | | | | | | | | | | | In many places in drivers we verify for the zero length, but this is very inconsistent across drivers. This is obviously the right thing to do, though. This patch moves the check to the MTD API functions instead and removes a lot of duplication. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Reviewed-by: Shmulik Ladkani <shmulik.ladkani@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: do not duplicate length and offset checks in driversArtem Bityutskiy2012-03-271-28/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We already verify that offset and length are within the MTD device size in the MTD API functions. Let's remove the duplicated checks in drivers. This patch only affects the following API's: 'mtd_erase()' 'mtd_point()' 'mtd_unpoint()' 'mtd_get_unmapped_area()' 'mtd_read()' 'mtd_write()' 'mtd_panic_write()' 'mtd_lock()' 'mtd_unlock()' 'mtd_is_locked()' 'mtd_block_isbad()' 'mtd_block_markbad()' This patch adds a bit of noise by removing too sparse empty lines, but this is not too bad. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: write BBM to OOB even with flash-based BBTBrian Norris2012-03-271-15/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, the flash-based BBT implementation writes bad block data only to its flash-based table and not to the OOB marker area. Then, as new bad blocks are marked over time, the OOB markers become incomplete and the flash-based table becomes the only source of current bad block information. This becomes an obvious problem when, for example: * bootloader cannot read the flash-based BBT format * BBT is corrupted and the flash must be rescanned for bad blocks; we want to remember bad blocks that were marked from Linux So to keep the bad block markers in sync with the flash-based BBT, this patch changes the default so that we write bad block markers to the proper OOB area on each block in addition to flash-based BBT. Comments are updated, expanded, and/or relocated as necessary. The new flash-based BBT procedure for marking bad blocks: (1) erase the affected block, to allow OOB marker to be written cleanly (2) update in-memory BBT (3) write bad block marker to OOB area of affected block (4) update flash-based BBT Note that we retain the first error encountered in (3) or (4), finish the procedures, and dump the error in the end. This should handle power cuts gracefully enough. (1) and (2) are mostly harmless (note that (1) will not erase an already-recognized bad block). The OOB and BBT may be "out of sync" if we experience power loss bewteen (3) and (4), but we can reasonably expect that on next boot, subsequent I/O operations will discover that the block should be marked bad again, thus re-syncing the OOB and BBT. Note that this is a change from the previous default flash-based BBT behavior. If your system cannot support writing bad block markers to OOB, use the new NAND_BBT_NO_OOB_BBM option (in combination with NAND_BBT_USE_FLASH and NAND_BBT_NO_OOB). Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: docg4: fix printk() warningsDan Carpenter2012-03-271-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Gcc complains here: drivers/mtd/nand/docg4.c: In function ‘probe_docg4’: drivers/mtd/nand/docg4.c:1277:4: warning: format ‘%x’ expects argument of type ‘unsigned int’, but argument 3 has type ‘resource_size_t’ [-Wformat] drivers/mtd/nand/docg4.c:1277:4: warning: format ‘%x’ expects argument of type ‘unsigned int’, but argument 4 has type ‘resource_size_t’ [-Wformat] We have a standard way of printing these using a format string extension. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: gpmi: use correct member for checking NAND_BBT_USE_FLASHWolfram Sang2012-03-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This has been moved from .options to .bbt_options meanwhile. So, it currently checks for something totally different (NAND_OWN_BUFFERS) and decides according to that. Artem Bityutskiy: the options were moved in a40f734 mtd: nand: consolidate redundant flash-based BBT flags Artem Bityutskiy: CCing -stable Signed-off-by: Wolfram Sang <w.sang@pengutronix.de> Acked-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Cc: stable@kernel.org [3.2+] Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: add leading underscore to all mtd functionsArtem Bityutskiy2012-03-272-19/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch renames all MTD functions by adding a "_" prefix: mtd->erase -> mtd->_erase mtd->read_oob -> mtd->_read_oob ... The reason is that we are re-working the MTD API and from now on it is an error to use MTD function pointers directly - we have a corresponding API call for every pointer. By adding a leading "_" we achieve the following: 1. Make sure we convert every direct pointer users 2. A leading "_" suggests that this interface is internal and it becomes less likely that people will use them directly 3. Make sure all the out-of-tree modules stop compiling and the owners spot the big API change and amend them. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: add support for diskonchip G4 nand flash deviceMike Dunn2012-03-273-0/+1399
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a driver for the M-Sys / Sandisk diskonchip G4 nand flash found in various smartphones and PDAs, among them the Palm Treo680, HTC Prophet and Wizard, Toshiba Portege G900, Asus P526, and O2 XDA Zinc. It was tested on the Treo 680, but should work generically. Since v3, this patch adds power management functions, a scan of the factory bad block table during initialization, several fixes, and more extensive testing. Also, the platform data header file, which only contained partitioning information, was removed. Command-line partitioning can be used, at least until an mtd parser is written for the saftl format with which these chips are shipped. Signed-off-by: Mike Dunn <mikedunn@newsguy.com> Reviewed-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: move SCANLASTPAGE handling to the correct code blockBrian Norris2012-03-271-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As nand_default_block_markbad() is becoming more complex, it helps to have code appear only in its relevant codepath(s). Here, the calculation of `ofs' based on NAND_BBT_SCANLASTPAGE is only useful on paths where we write bad block markers to OOB. We move the condition/calculation closer to the `write' operation and update the comment to more correctly describe the operation. The variable `wr_ofs' is also used to help isolate our calculation of the "write" offset from the usage of `ofs' to represent the eraseblock offset. This will become useful when we reorder operations in the next patch. This patch should make no functional change. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: differentiate 1- vs. 2-byte writes when marking bad blocksBrian Norris2012-03-271-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It seems that we have developed a bad-block-marking "feature" out of pure laziness: "We write two bytes per location, so we dont have to mess with 16 bit access." It's relatively simple to write a 1 byte at a time on x8 devices and 2 bytes at a time on x16 devices, so let's do it. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: fix SCAN2NDPAGE check for BBMBrian Norris2012-03-271-17/+23
| | | | | | | | | | | | | | | | | | | | nand_block_bad() doesn't check the correct pages when NAND_BBT_SCAN2NDPAGE is enabled. It should scan both the OOB region of both the 1st and 2nd page of each block. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * mtd: nand: erase block before marking badBrian Norris2012-03-271-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Many NAND flash systems (especially those with MLC NAND) cannot be reliably written twice in a row. For instance, when marking a bad block, the block may already have data written to it, and so we should attempt to erase the block before writing a bad block marker to its OOB region. We can ignore erase failures, since the block may be bad such that it cannot be erased properly; we still attempt to write zeros to its spare area. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* | Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds2012-03-291-14/+11
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull slave-dmaengine update from Vinod Koul: "This includes the cookie cleanup by Russell, the addition of context parameter for dmaengine APIs, more arm dmaengine driver cleanup by moving code to dmaengine, this time for imx by Javier and pl330 by Boojin along with the usual driver fixes." Fix up some fairly trivial conflicts with various other cleanups. * 'next' of git://git.infradead.org/users/vkoul/slave-dma: (67 commits) dmaengine: imx: fix the build failure on x86_64 dmaengine: i.MX: Fix merge of cookie branch. dmaengine: i.MX: Add support for interleaved transfers. dmaengine: imx-dma: use 'dev_dbg' and 'dev_warn' for messages. dmaengine: imx-dma: remove 'imx_dmav1_baseaddr' and 'dma_clk'. dmaengine: imx-dma: remove unused arg of imxdma_sg_next. dmaengine: imx-dma: remove internal structure. dmaengine: imx-dma: remove 'resbytes' field of 'internal' structure. dmaengine: imx-dma: remove 'in_use' field of 'internal' structure. dmaengine: imx-dma: remove sg member from internal structure. dmaengine: imx-dma: remove 'imxdma_setup_sg_hw' function. dmaengine: imx-dma: remove 'imxdma_config_channel_hw' function. dmaengine: imx-dma: remove 'imxdma_setup_mem2mem_hw' function. dmaengine: imx-dma: remove dma_mode member of internal structure. dmaengine: imx-dma: remove data member from internal structure. dmaengine: imx-dma: merge old dma-v1.c with imx-dma.c dmaengine: at_hdmac: add slave config operation dmaengine: add context parameter to prep_slave_sg and prep_dma_cyclic dmaengine/dma_slave: introduce inline wrappers dma: imx-sdma: Treat firmware messages as warnings instead of erros ...
| * | dmaengine/dma_slave: introduce inline wrappersAlexandre Bounine2012-03-211-14/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add inline wrappers for device_prep_slave_sg() and device_prep_dma_cyclic() interfaces to hide new parameter from current users of affected interfaces. Convert current users to use new wrappers instead of direct calls. Suggested by Russell King [https://lkml.org/lkml/2012/2/3/269]. Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
generated by cgit v1.1 at 2024-12-26 18:15:02 +0000