From 051f1b13144dd8553d5a5104dde94c7263ae3ba7 Mon Sep 17 00:00:00 2001 From: Sudeep KarkadaNagesha Date: Tue, 31 Jul 2012 10:34:25 +0100 Subject: ARM: perf: move irq registration into pmu implementation This patch moves the CPU-specific IRQ registration and parsing code into the CPU PMU backend. This is required because a PMU may have more than one interrupt, which in turn can be either PPI (per-cpu) or SPI (requiring strict affinity setting at the interrupt distributor). Signed-off-by: Sudeep KarkadaNagesha [will: cosmetic edits and reworked interrupt dispatching] Signed-off-by: Will Deacon --- arch/arm/include/asm/pmu.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/include/asm/pmu.h') diff --git a/arch/arm/include/asm/pmu.h b/arch/arm/include/asm/pmu.h index a993ad6..a26170d 100644 --- a/arch/arm/include/asm/pmu.h +++ b/arch/arm/include/asm/pmu.h @@ -78,6 +78,8 @@ struct arm_pmu { void (*start)(void); void (*stop)(void); void (*reset)(void *); + int (*request_irq)(irq_handler_t handler); + void (*free_irq)(void); int (*map_event)(struct perf_event *event); int num_events; atomic_t active_events; -- cgit v1.1