From 59b559d7a39b590aecef583af58d123ff5876570 Mon Sep 17 00:00:00 2001 From: Srinidhi Kasagar Date: Thu, 12 Nov 2009 06:20:54 +0100 Subject: ARM: 5786/1: Introduce plat-nomadik, MTU code re-organization Introduce the plat-nomadik folder for ST-Ericsson machines including the existing nomadik 8815 architecture. This also moves the existing MTU (MultiTimerUnit) of nomadik 8815 to the proposed plat-nomadik and adds HAS_MTU. The patch has been re-based to 2.6.32-rc6 Signed-off-by: srinidhi kasagar Acked-by: Alessandro Rubini Signed-off-by: Russell King --- arch/arm/plat-nomadik/include/plat/mtu.h | 48 ++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 arch/arm/plat-nomadik/include/plat/mtu.h (limited to 'arch/arm/plat-nomadik/include/plat/mtu.h') diff --git a/arch/arm/plat-nomadik/include/plat/mtu.h b/arch/arm/plat-nomadik/include/plat/mtu.h new file mode 100644 index 0000000..42c9072 --- /dev/null +++ b/arch/arm/plat-nomadik/include/plat/mtu.h @@ -0,0 +1,48 @@ +#ifndef __PLAT_MTU_H +#define __PLAT_MTU_H + +/* should be set by the platform code */ +extern void __iomem *mtu_base; + +/* + * The MTU device hosts four different counters, with 4 set of + * registers. These are register names. + */ + +#define MTU_IMSC 0x00 /* Interrupt mask set/clear */ +#define MTU_RIS 0x04 /* Raw interrupt status */ +#define MTU_MIS 0x08 /* Masked interrupt status */ +#define MTU_ICR 0x0C /* Interrupt clear register */ + +/* per-timer registers take 0..3 as argument */ +#define MTU_LR(x) (0x10 + 0x10 * (x) + 0x00) /* Load value */ +#define MTU_VAL(x) (0x10 + 0x10 * (x) + 0x04) /* Current value */ +#define MTU_CR(x) (0x10 + 0x10 * (x) + 0x08) /* Control reg */ +#define MTU_BGLR(x) (0x10 + 0x10 * (x) + 0x0c) /* At next overflow */ + +/* bits for the control register */ +#define MTU_CRn_ENA 0x80 +#define MTU_CRn_PERIODIC 0x40 /* if 0 = free-running */ +#define MTU_CRn_PRESCALE_MASK 0x0c +#define MTU_CRn_PRESCALE_1 0x00 +#define MTU_CRn_PRESCALE_16 0x04 +#define MTU_CRn_PRESCALE_256 0x08 +#define MTU_CRn_32BITS 0x02 +#define MTU_CRn_ONESHOT 0x01 /* if 0 = wraps reloading from BGLR*/ + +/* Other registers are usual amba/primecell registers, currently not used */ +#define MTU_ITCR 0xff0 +#define MTU_ITOP 0xff4 + +#define MTU_PERIPH_ID0 0xfe0 +#define MTU_PERIPH_ID1 0xfe4 +#define MTU_PERIPH_ID2 0xfe8 +#define MTU_PERIPH_ID3 0xfeC + +#define MTU_PCELL0 0xff0 +#define MTU_PCELL1 0xff4 +#define MTU_PCELL2 0xff8 +#define MTU_PCELL3 0xffC + +#endif /* __PLAT_MTU_H */ + -- cgit v1.1