From bce19683c17485b584b62b984d6dcf5332181588 Mon Sep 17 00:00:00 2001 From: Doug Thompson Date: Thu, 26 Jul 2007 10:41:14 -0700 Subject: drivers/edac: fix reset edac_mc pollmsec This fixes a deadlock that could occur on a 'setup' and 'teardown' sequence of the workq for a edac_mc control structure instance. A similiar fix was previously implemented for the edac_device code. In addition, the edac_mc device code there was missing code to allow the workq period valu to be altered via sysfs control. This patch adds that fix on the code, and allows for the changing of the period value as well. Cc: Alan Cox Signed-off-by: Doug Thompson Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- drivers/edac/edac_mc_sysfs.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) (limited to 'drivers/edac/edac_mc_sysfs.c') diff --git a/drivers/edac/edac_mc_sysfs.c b/drivers/edac/edac_mc_sysfs.c index cd090b0..4a0576b 100644 --- a/drivers/edac/edac_mc_sysfs.c +++ b/drivers/edac/edac_mc_sysfs.c @@ -122,6 +122,23 @@ static ssize_t memctrl_int_store(void *ptr, const char *buffer, size_t count) return count; } +/* + * mc poll_msec time value + */ +static ssize_t poll_msec_int_store(void *ptr, const char *buffer, size_t count) +{ + int *value = (int *)ptr; + + if (isdigit(*buffer)) { + *value = simple_strtoul(buffer, NULL, 0); + + /* notify edac_mc engine to reset the poll period */ + edac_mc_reset_delay_period(*value); + } + + return count; +} + /* EDAC sysfs CSROW data structures and methods */ @@ -704,7 +721,7 @@ MEMCTRL_ATTR(edac_mc_log_ce, S_IRUGO | S_IWUSR, memctrl_int_show, memctrl_int_store); MEMCTRL_ATTR(edac_mc_poll_msec, - S_IRUGO | S_IWUSR, memctrl_int_show, memctrl_int_store); + S_IRUGO | S_IWUSR, memctrl_int_show, poll_msec_int_store); /* Base Attributes of the memory ECC object */ static struct memctrl_dev_attribute *memctrl_attr[] = { -- cgit v1.1