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* [MIPS] Malta: Enable tickless and highres timers.Ralf Baechle2007-12-091-0/+8
| | | | | | | | Most Malta use an FPGA CPU card which rarely is good for more than 40MHz. So the performance penalta of the regular timer interrupt, especially for the VSMP kernel model is significant, even at a mere 100Hz. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Update a few defconfigs.Ralf Baechle2007-08-271-264/+162
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] DDB5477: Remove supportYoichi Yuasa2007-07-311-1/+0
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove Momentum Ocelot support.Ralf Baechle2007-07-311-2/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Delete Ocelot 3 support.Ralf Baechle2007-07-101-1/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] remove LASAT Networks platforms supportYoichi Yuasa2007-07-101-1/+0
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove Momenco Ocelot C supportFranck Bui-Huu2007-07-101-1/+0
| | | | | | | | | | | | | | | | | | | Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> delete mode 100644 arch/mips/configs/ocelot_c_defconfig delete mode 100644 arch/mips/momentum/ocelot_c/Makefile delete mode 100644 arch/mips/momentum/ocelot_c/cpci-irq.c delete mode 100644 arch/mips/momentum/ocelot_c/dbg_io.c delete mode 100644 arch/mips/momentum/ocelot_c/irq.c delete mode 100644 arch/mips/momentum/ocelot_c/ocelot_c_fpga.h delete mode 100644 arch/mips/momentum/ocelot_c/platform.c delete mode 100644 arch/mips/momentum/ocelot_c/prom.c delete mode 100644 arch/mips/momentum/ocelot_c/reset.c delete mode 100644 arch/mips/momentum/ocelot_c/setup.c delete mode 100644 arch/mips/momentum/ocelot_c/uart-irq.c delete mode 100644 arch/mips/pci/fixup-ocelot-c.c delete mode 100644 arch/mips/pci/pci-ocelot-c.c
* [MIPS] EV64120: Remove supportYoichi Yuasa2007-07-101-1/+0
| | | | | Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Viper2: Remove defective support.Ralf Baechle2007-03-131-1/+0
| | | | | | | | A defconfig file and the 10 lines of code (including comments ...) that are rotting since lmo commit 6516a42dc8b40c6c00010346dd51496125b16644 don't quite make proper support, so let's trash it. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Add basic SMARTMIPS ASE supportFranck Bui-Huu2007-02-221-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds trivial support for SMARTMIPS extension. This extension is currently implemented by 4KS[CD] CPUs. Basically it saves/restores ACX register, which is part of the SMARTMIPS ASE, when needed. This patch does *not* add any support for Smartmips MMU features. Futhermore this patch does not add explicit support for 4KS[CD] CPUs since they are respectively mips32 and mips32r2 compliant. So with the current processor configuration, a platform that has such CPUs needs to select both configs: CPU_HAS_SMARTMIPS SYS_HAS_CPU_MIPS32_R[12] This is due to the processor configuration which is mixing up all the architecture variants and the processor types. The drawback of this, is that we currently pass '-march=mips32' option to gcc when building a kernel instead of '-march=4ksc' for 4KSC case. This can lead to a kernel image a little bit bigger than required. Signed-off-by: Franck Bui-Huu <fbuihuu@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Update defconfigsRalf Baechle2007-02-181-49/+123
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Malta: Resurrect MTD support for onboard flash.Ralf Baechle2006-12-121-1/+79
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Rename SNI_RM200_PCI to just SNI_RM preparing for more RM machinesThomas Bogendoerfer2006-12-091-1/+1
| | | | | Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Update Malta config.Ralf Baechle2006-10-081-23/+75
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] lockdep: update defconfigsAtsushi Nemoto2006-10-011-0/+3
| | | | | | | | | | | | | Add those lines to all defconfigs. CONFIG_LOCKDEP_SUPPORT=y CONFIG_STACKTRACE_SUPPORT=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y This is a patch againt linux-mips.org git tree. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Enable tmpfs for anything that possibly runs a full distribution.Ralf Baechle2006-09-271-1/+1
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove EV96100 as previously announced.Ralf Baechle2006-09-271-1/+0
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Update defconfigs to 2.6.18-rc1.Ralf Baechle2006-07-131-8/+56
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* [MIPS] Make timer interrupt frequency configurable from kconfig.Atsushi Nemoto2006-06-191-0/+9
| | | | | | | | | | Make HZ configurable. DECSTATION can select 128/256/1024 HZ, JAZZ can only select 100 HZ, others can select 100/128/250/256/1000/1024 HZ if not explicitly specified). Also remove all mach-xxx/param.h files and update all defconfigs according to current HZ value. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove support for NEC DDB5476.Ralf Baechle2006-06-191-1/+0
| | | | | | As warned several times before. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Remove support for NEC DDB5074.Ralf Baechle2006-06-191-1/+0
| | | | | | As warned several times before. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Update MIPS defconfigs.Ralf Baechle2006-04-271-29/+57
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Update defconfigs.Ralf Baechle2006-03-211-45/+50
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Malta: Change CPU default to R2.Ralf Baechle2006-01-101-5/+5
| | | | | | | | ... giving those with with R1 or older CPU cards more rope to missconfigure their kernels. But MIPS is only selling R2 CPUs since two or three years already. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Update defconfigs to reflect Kconfig changes.Ralf Baechle2005-12-011-71/+71
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [MIPS] Update defconfigsRalf Baechle2005-11-171-16/+51
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* Update MIPS defconfig files.Ralf Baechle2005-10-291-287/+437
| | | | Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* [PATCH] mips: fix coherency configurationRalf Baechle2005-09-051-0/+1
| | | | | | | | | Fix the MIPS coherency configuration such that we always keep the mapping state in <asm/pci.h> when we need to on non-coherent platforms. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] mips: clean up 32/64-bit configurationRalf Baechle2005-09-051-2/+2
| | | | | | | | Start cleaning 32-bit vs. 64-bit configuration. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Linux-2.6.12-rc2Linus Torvalds2005-04-161-0/+1132
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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