kernel_samsung_aries.git - kernel/samsung/aries

	Commit message (Collapse)	Author	Age	Files	Lines
*	sh: intc - add support for sh7206	Magnus Damm	2007-09-21	1	-51/+158
\| \| \| \| \| \| \| \| \|	This patch converts the cpu specific interrupt setup code for sh7206 from ipr to intc. New vectors are also added to match the information provided by the datasheet. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
*	sh: fix irqs for the second serial port on sh7206	Magnus Damm	2007-09-21	1	-4/+4
\| \| \| \| \| \| \| \| \|	This patch makes sure the serial port interrupt irqs matches the datasheet. Only irqs for SCIF1 are changed. While at some cosmetic spaces are added. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
*	sh: IPR/INTC2 IRQ setup consolidation.	Magnus Damm	2007-07-20	1	-1/+1
\| \| \| \| \| \| \| \| \| \|	This patch unifies the cpu specific interrupt setup functions for interrupt controller blocks such as ipr, intc2 and intc. There is no point in having separate functions for each interrupt controller, so let's clean this up. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
*	sh: rework ipr code	Magnus Damm	2007-06-15	1	-10/+14
\| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \| \|	This patch reworks the ipr code by grouping the offset array together with the ipr_data structure in a new data structure called ipr_desc. This new structure also contains the name of the controller in struct irq_chip. The idea behind putting struct irq_chip in there is that we can use offsetof() to locate the base addresses in the irq_chip callbacks. This strategy has much in common with the recently merged intc2 code. One logic change has been made - the original ipr code enabled the interrupts by default but with this patch they are all disabled by default. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
*	sh: Add 32-bit opcode feature CPU flag.	Paul Mundt	2007-05-09	1	-0/+1
\| \| \| \| \| \| \|	Add a CPU flag for the CPUs that support 32-bit opcodes, which gets passed down to userspace. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
*	sh: Support for SH-2A 32-bit opcodes.	Paul Mundt	2007-05-09	2	-3/+57
\| \| \| \| \| \| \| \|	SH-2A supports both 16 and 32-bit instructions, add a simple helper for figuring out the instruction size in the places where there are hardcoded 16-bit assumptions. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
*	Storage class should be before const qualifier	Tobias Klauser	2007-02-17	1	-2/+2
\| \| \| \| \| \| \| \| \| \| \|	The C99 specification states in section 6.11.5: The placement of a storage-class specifier other than at the beginning of the declaration specifiers in a declaration is an obsolescent feature. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Adrian Bunk <bunk@stusta.de>
*	sh: Fixup cpu_data references for the non-boot CPUs.	Paul Mundt	2007-02-13	1	-8/+8
\| \| \| \| \| \| \|	There are a lot of bogus cpu_data-> references that only end up working for the boot CPU, convert these to current_cpu_data to fixup SMP. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
*	sh: sh7619 / sh7206 IPR initialize update	Yoshinori Sato	2007-02-13	1	-46/+43
\| \| \| \| \| \| \|	IPR initialize proceduere update. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
*	sh: IPR IRQ updates for SH7619/SH7206.	Yoshinori Sato	2006-12-12	1	-4/+58
\| \| \| \| \| \| \|	This updates the SH7619 and SH7206 code for the IPR IRQ changes. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
*	sh: Add support for SH7206 and SH7619 CPU subtypes.	Yoshinori Sato	2006-12-06	4	-0/+192
	This implements initial support for the SH7206 (SH-2A) and SH7619 (SH-2) MMU-less CPUs. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>