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* | sh: Drop unused arguments for kunmap_coherent().Paul Mundt2009-08-041-4/+4
| | | | | | | | | | | | | | kunmap_coherent() doesn't do anything with its arguments, so just kill them off. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Bring kmap_coherent() out-of-line.Paul Mundt2009-08-041-1/+1
| | | | | | | | | | | | | | kmap_coherent() has gotten too big to leave as an inline, so we bring it out-of-line. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Add a PG_dcache_dirty sanity check in kmap_coherent().Paul Mundt2009-08-041-0/+2
| | | | | | | | | | | | | | | | This plugs in a BUG_ON() in kmap_coherent() for PG_dcache_dirty pages to catch when things go horribly wrong. Copied from the MIPS implementation. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Handle a NULL vma in __update_tlb() for the fast-path.Paul Mundt2009-07-293-3/+3
| | | | | | | | | | | | | | | | The TLB miss fast-path presently calls in to update_mmu_cache() to set up the entry, and does so with a NULL vma. Check for vma validity in the __update_tlb() ptrace checks. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: update_mmu_cache() consolidation.Paul Mundt2009-07-296-72/+54
| | | | | | | | | | | | | | | | | | This splits out a separate __update_cache()/__update_tlb() for update_mmu_cache() to wrap in to. This lets us share the common __update_cache() bits while keeping special __update_tlb() handling broken out. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Use the now generic SH-4 clear/copy page ops for all MMU platforms.Paul Mundt2009-07-273-11/+31
| | | | | | | | | | | | | | | | | | | | | | | | Now that the SH-4 page clear/copy ops are generic, they can be used for all platforms with CONFIG_MMU=y. SH-5 remains the odd one out, but it too will gradually be converted over to using this interface. SH-3 platforms which do not contain aliases will see no impact from this change, while aliasing SH-3 platforms will get the same interface as SH-4. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: wire up clear_user_highpage() for sh4, convert sh7705.Paul Mundt2009-07-274-124/+16
| | | | | | | | | | | | | | | | | | This wires up clear_user_highpage() on SH-4 and subsequently converts the SH7705 32kB cache mode over to using it. Now that the SH-4 implementation handles all of the dcache purging directly in the aliasing case, there is no need to do this in the default clear_page() implementation. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Migrate from PG_mapped to PG_dcache_dirty.Paul Mundt2009-07-227-130/+73
|/ | | | | | | | | | | | | | | | | This inverts the delayed dcache flush a bit to be more in line with other platforms. At the same time this also gives us the ability to do some more optimizations and cleanup. Now that the update_mmu_cache() callsite only tests for the bit, the implementation can gradually be split out and made generic, rather than relying on special implementations for each of the peculiar CPU types. SH7705 in 32kB mode and SH-4 still need slightly different handling, but this is something that can remain isolated in the varying page copy/clear routines. On top of that, SH-X3 is dcache coherent, so there is no need to bother with any of these tests in the PTEAEX version of update_mmu_cache(), so we kill that off too. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
*-. Merge branches 'sh/hwblk' and 'sh/platform-updates'Paul Mundt2009-07-201-1/+0
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| | * headers: smp_lock.h reduxAlexey Dobriyan2009-07-121-1/+0
| |/ | | | | | | | | | | | | | | | | | | | | | | | | * Remove smp_lock.h from files which don't need it (including some headers!) * Add smp_lock.h to files which do need it * Make smp_lock.h include conditional in hardirq.h It's needed only for one kernel_locked() usage which is under CONFIG_PREEMPT This will make hardirq.h inclusion cheaper for every PREEMPT=n config (which includes allmodconfig/allyesconfig, BTW) Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | sh: Restore previous behaviour on kernel faultMatt Fleming2009-07-131-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The last commit changed the behaviour on kernel faults when we were doing something other than syncing the page tables. vmalloc_sync_one() needs to return NULL if the page tables are up to date, because the reason for the fault was not a missing/inconsitent page table entry. By returning NULL if the page tables are sync'd we signal to the calling function that further work must be done to resolve this fault. Also, remove the superfluous __va() around the first argument to vmalloc_sync_one(). The value of pgd_k is already a virtual address and using it wth __va() causes a NULL dereference. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Tidy up vmalloc fault handling.Paul Mundt2009-07-051-56/+97
| | | | | | | | | | | | | | This rewrites the vmalloc fault handling as per x86, which subsequently allows for easy future tie-in for vmalloc_sync_all(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: use kprobes_built_in() for notify_page_fault().Paul Mundt2009-07-051-3/+1
| | | | | | | | | | | | Kill off the KPROBES ifdef, as per x86. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Use bootmem ontop of lmb for NUMAMatt Fleming2009-07-051-13/+23
|/ | | | | | | | Like the UP case, use lmb as the foundation of memory resource management on NUMA. Signed-off-by: Matt Fleming <matt@console-pimps.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh64: Hook up page fault events for software perf counters.Paul Mundt2009-06-251-3/+12
| | | | | | sh64 can use these as well, so tie them up there as well. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Hook up page fault events for software perf counters.Paul Mundt2009-06-251-29/+32
| | | | | | | This adds page fault instrumentation for the software performance counters. Follows the x86 and powerpc changes. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Wire up the uncached fixmap on sh64 as well.Paul Mundt2009-06-231-2/+0
| | | | | | | Now that sh64 also can use the uncached section, wire up the fixmap for it as well. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Use local TLB flush in set_pte_phys().Paul Mundt2009-06-231-1/+1
| | | | | | | | | set_pte_phys() presently uses the global flush_tlb_one(), which locks on SMP trying to do the IPI. As we have not even initialized the other CPUs at this point, switch to the local_ variant so the flush happens on the boot CPU. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* Move FAULT_FLAG_xyz into handle_mm_fault() callersLinus Torvalds2009-06-212-2/+2
| | | | | | | | | | This allows the callers to now pass down the full set of FAULT_FLAG_xyz flags to handle_mm_fault(). All callers have been (mechanically) converted to the new calling convention, there's almost certainly room for architectures to clean up their code and then add FAULT_FLAG_RETRY when that support is added. Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sh: remove stray markers.Christoph Hellwig2009-06-181-4/+0
| | | | | | | | | | arch/sh has a couple of stray markers without any users introduced in commit 3d58695edbfac785161bf282dc11fd42a483d6c9. Remove them in preparation of removing the markers in favour of the TRACE_EVENT macro (and also because we don't keep dead code around). Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Prefer slab_is_available() over after_bootmem.Paul Mundt2009-05-222-4/+2
| | | | | | | | This kills off after_bootmem and switches to using slab_is_available() instead. Presently the only place this is used is by the sh64 ioremap, and there's not much point in keeping the reference around otherwise. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Provide FORCE_MAX_ZONEORDER.Paul Mundt2009-05-141-0/+23
| | | | | | | | | Several platforms want to be able to do large physically contiguous allocations (primarily nommu and video codecs on SH-Mobile), provide a MAX_ORDER override for those cases. Tested-by: Conrad Parker <conrad@metadecks.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Consolidate the boot link and entry offset definitions.Paul Mundt2009-05-101-8/+0
| | | | | | | | Consolidate these in a single place in the Kconfig menus. At the same time, disable their interactivity and set them according to the board config defaults. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Cleanup irqflags size mismatch on SH-5 build.Paul Mundt2009-05-091-4/+4
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Integrate the SH-5 onchip_remap() more coherently.Paul Mundt2009-05-071-171/+94
| | | | | | | | | | | Presently this is special-cased for early initialization. While there are situations where these static early initializations are still necessary, with minor changes it is possible to use this for the regular ioremap implementation as well. This allows us to kill off the special-casing for the remap completely and to start tidying up all of the SH-5 special-casing in drivers. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Handle shm_align_mask also for HAVE_ARCH_UNMAPPED_AREA_TOPDOWN.Paul Mundt2009-05-071-4/+132
| | | | | | | Presently shm_align_mask is only looked at for the bottom up case, but we still want this for proper colouring constraints in the topdown case. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: pci: Rework fixed region checks in ioremap().Paul Mundt2009-04-201-7/+7
| | | | | | | | Not all PCI channels have non-translatable memory windows, this is a special property of the on-chip PCIC with its 0xfd00... mapping, handle this explicitly. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: pci memory range checking codeMagnus Damm2009-04-161-2/+2
| | | | | | | | | This patch changes the code to use __is_pci_memory() instead of is_pci_memaddr(). __is_pci_memory() loops through all the pci channels on the system to match memory windows. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Pre-allocate a reasonable number of DMA debug entries.Paul Mundt2009-04-141-1/+11
| | | | | | | | This prevents the DMA API debugging from running out of entries right away on boot. Defines 4096 entries by default, which while a bit on the heavy side, ought to leave enough breathing room for some time. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Add support for DMA API debugging.Paul Mundt2009-04-091-6/+13
| | | | | | This wires up support for the generic DMA API debugging. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Kill off broken direct-mapped cache mode.Paul Mundt2009-04-021-12/+0
| | | | | | | | | | Forcing direct-mapped worked on certain older 2-way set associative parts, but was always error prone on 4-way parts. As these are the norm these days, there is not much point in continuing to support this mode. Most of the folks that used direct-mapped mode generally just wanted writethrough caching in the first place.. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Update debugfs ASID dumping for 16-bit ASID support.Paul Mundt2009-03-171-3/+1
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: tlb-pteaex: Kill off legacy PTEA updates.Paul Mundt2009-03-171-3/+0
| | | | | | | While harmless, PTEA has different semantics on these parts, and is only used in extended TLB mode. Kill off the legacy support. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Support for extended ASIDs on PTEAEX-capable SH-X3 cores.Paul Mundt2009-03-172-2/+103
| | | | | | | | | | | | | | | | | | | | This adds support for extended ASIDs (up to 16-bits) on newer SH-X3 cores that implement the PTAEX register and respective functionality. Presently only the 65nm SH7786 (90nm only supports legacy 8-bit ASIDs). The main change is in how the PTE is written out when loading the entry in to the TLB, as well as in how the TLB entry is selectively flushed. While SH-X2 extended mode splits out the memory-mapped U and I-TLB data arrays for extra bits, extended ASID mode splits out the address arrays. While we don't use the memory-mapped data array access, the address array accesses are necessary for selective TLB flushes, so these are implemented newly and replace the generic SH-4 implementation. With this, TLB flushes in switch_mm() are almost non-existent on newer parts. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: PMB hibernation supportFrancesco VIRLINZI2009-03-161-0/+38
| | | | | | | This implements preliminary suspend/resume support for the PMB. Signed-off-by: Francesco Virlinzi <francesco.virlinzi@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Support fixed 32-bit PMB mappings from bootloader.Yoshihiro Shimoda2009-03-104-3/+78
| | | | | | | | | | | | This provides a method for supporting fixed PMB mappings inherited from the bootloader, as an alternative to the dynamic PMB mapping currently used by the kernel. In the future these methods will be combined. P1/P2 area is handled like a regular 29-bit physical address, and local bus device are assigned P3 area addresses. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: fix P4 iounmap() pass-throughMagnus Damm2009-02-271-1/+1
| | | | | | | | Fix iounmap() of pass-through P4 addresses. Without this patch iounmap() on the sh7780 rtc area results in a warning message. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* arch/sh/mm: Move a dereference below a NULL testJulia Lawall2009-01-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the NULL test is necessary, then the dereference should be moved below the NULL test. The semantic patch that makes this change is as follows: (http://www.emn.fr/x-info/coccinelle/). // <smpl> @disable is_null@ identifier f; expression E; identifier fld; statement S; @@ + if (E == NULL) S f(...,E->fld,...); - if (E == NULL) S @@ identifier f; expression E; identifier fld; statement S; @@ + if (!E) S f(...,E->fld,...); - if (!E) S // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* mm: show node to memory section relationship with symlinks in sysfsGary Hade2009-01-061-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Show node to memory section relationship with symlinks in sysfs Add /sys/devices/system/node/nodeX/memoryY symlinks for all the memory sections located on nodeX. For example: /sys/devices/system/node/node1/memory135 -> ../../memory/memory135 indicates that memory section 135 resides on node1. Also revises documentation to cover this change as well as updating Documentation/ABI/testing/sysfs-devices-memory to include descriptions of memory hotremove files 'phys_device', 'phys_index', and 'state' that were previously not described there. In addition to it always being a good policy to provide users with the maximum possible amount of physical location information for resources that can be hot-added and/or hot-removed, the following are some (but likely not all) of the user benefits provided by this change. Immediate: - Provides information needed to determine the specific node on which a defective DIMM is located. This will reduce system downtime when the node or defective DIMM is swapped out. - Prevents unintended onlining of a memory section that was previously offlined due to a defective DIMM. This could happen during node hot-add when the user or node hot-add assist script onlines _all_ offlined sections due to user or script inability to identify the specific memory sections located on the hot-added node. The consequences of reintroducing the defective memory could be ugly. - Provides information needed to vary the amount and distribution of memory on specific nodes for testing or debugging purposes. Future: - Will provide information needed to identify the memory sections that need to be offlined prior to physical removal of a specific node. Symlink creation during boot was tested on 2-node x86_64, 2-node ppc64, and 2-node ia64 systems. Symlink creation during physical memory hot-add tested on a 2-node x86_64 system. Signed-off-by: Gary Hade <garyhade@us.ibm.com> Signed-off-by: Badari Pulavarty <pbadari@us.ibm.com> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* sh: split coherent pagesMagnus Damm2008-12-221-1/+6
| | | | | | | | Split pages returned by dma_alloc_coherent() and make sure we free them one by one. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Generic kgdb stub support.Paul Mundt2008-12-221-6/+0
| | | | | | | | This migrates from the old bitrotted kgdb stub implementation and moves to the generic stub. In the process support for SH-2/SH-2A is also added, which the old stub never provided. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Fix up the cpu_asid() return value on nommu.Paul Mundt2008-12-221-1/+1
| | | | | | This ought to be unsigned long, rather than defaulting to int. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Convert sh64 /proc/asids to debugfs and generic sh.Paul Mundt2008-12-223-0/+81
| | | | | | | | | | | This converts the sh64 /proc/asids entry to debugfs and enables it for all SH parts that have debugfs enabled. On MMU systems this can be used to determine which processes are using which ASIDs which in turn can be used for finer grained cache tag analysis. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: P4 ioremap pass-throughMagnus Damm2008-12-222-12/+2
| | | | | | | | | | | | | | | | | | | | This patch adds a pass-through case when ioremapping P4 addresses. Addresses passed to ioremap() should be physical addresses, so the best option is usually to convert the virtual address to a physical address before calling ioremap. This will give you a virtual address in P2 which matches the physical address and this works well for most internal hardware blocks on the SuperH architecture. However, some hardware blocks must be accessed through P4. Converting the P4 address to a physical and then back to a P2 does not work. One example of this is the sh7722 TMU block, it must be accessed through P4. Without this patch P4 addresses will be mapped using PTEs which requires the page allocator to be up and running. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Move arch_get_unmapped_area() in to arch/sh/mm/mmap.c.Paul Mundt2008-12-221-0/+94
| | | | | | | Now that arch/sh/mm/mmap.c exists, move arch_get_unmapped_area() there. Follows the ARM change. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Don't factor in PAGE_OFFSET for valid_phys_addr_range() check.Paul Mundt2008-11-131-1/+1
| | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Provide a sane valid_phys_addr_range() to prevent TLB reset with PMB.Paul Mundt2008-11-123-2/+33
| | | | | | | | | | | | | | | With the PMB enabled, only P1SEG and up are covered by the PMB mappings, meaning that situations where out-of-bounds physical addresses are read from will lead to TLB reset after the PMB miss, allowing for use cases like dd if=/dev/mem to reset the TLB. Fix this up to make sure the reference is between __MEMORY_START (phys) and __pa(high_memory). This is coherent across all variants of sh/sh64 with and without MMU, though the PMB bug itself is only applicable to SH-4A parts. Reported-by: Hideo Saito <saito@densan.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Handle fixmap TLB eviction more coherently.Paul Mundt2008-11-102-3/+26
| | | | | | | | | | | | | | | | | | There was a race in the kmap_coherent() implementation. While we guarded against preemption, there was nothing preventing eviction of the pre-faulted fixmap entry from the UTLB. Under certain workloads this would result in the fixmap entries used for cache colouring being evicted from the UTLB in the midst of a copy_page(). In addition to pre-faulting, we also make sure to preserve the PTEs in the kernel page table and introduce a cached PTE for kmap_coherent() usage. This follows a similar change on MIPS ("[MIPS] Fix aliasing bug in copy_to_user_page / copy_from_user_page"). Reported-by: Hideo Saito <saito@densan.co.jp> Reported-by: CHIKAMA Masaki <masaki.chikama@gmail.com> Tested-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: fix sh2a cache entry_maskYoshihiro Shimoda2008-10-311-4/+4
| | | | | | | fix sh2a cache entry_mask in __flush_{purge,invalidate}_region. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* sh: Kill off duplicate remove_memory() definition.Andrew Morton2008-10-211-17/+0
| | | | | | | Use the generic remove_memory() provided by mm/memory_hotplug.c instead. Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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