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path: root/drivers/pci/quirks.c
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* Fix PIIX4 SMB region sizeLinus Torvalds2005-10-301-2/+2
| | | | | | | Petr Vandrovec correctly points out that the SMB region of the PIIX4 is just 16 bytes, not 32. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] USB: move handoff codeDavid Brownell2005-10-281-250/+3
| | | | | | | | | | | | | | | | | | | | | This moves the PCI quirk handling for USB host controllers from the PCI directory to the USB directory. Follow-on patches will need to: (a) merge these copies with the originals in the HCD reset methods. they don't wholly agree, despite doing the very same thing; and (b) eventually change it so "usb-handoff" is the default, to help get more robust USB/BIOS/input/... interactions. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> drivers/Makefile | 2 drivers/pci/quirks.c | 253 --------------------------------------- drivers/usb/Makefile | 1 drivers/usb/host/Makefile | 5 drivers/usb/host/pci-quirks.c | 272 ++++++++++++++++++++++++++++++++++++++++++ 5 files changed, 280 insertions(+), 253 deletions(-)
* [PATCH] PCI: Add quirk for SMBus on HP D530Jean Delvare2005-10-281-0/+1
| | | | | | | | One more SMBus unhiding quirk, this time for the HP D530. Requested and successfully tested by Ben Cranston. Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] unhide ICH6 SMBus - take 2R.Marek@sh.cvut.cz2005-10-281-0/+24
| | | | | | | | | | | | This patch unhides hidden SMBus on ICH6 chipset installed in Asus M6V notebook. I would like to thank Michal Mleczko for testing and help. Signed-Off-By: Rudolf Marek <r.marek@sh.cvut.cz> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> drivers/pci/quirks.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)
* [PATCH] PCI: ICH6 ACPI and GPIO quirkR.Marek@sh.cvut.cz2005-10-281-0/+12
| | | | | | | | | | | This patch just adds ACPI and GPIO regions to its LPC bridge, similar way as ICH4 did. I would like to thank Michal Mleczko for testing. Signed-off-by: Rudolf Marek <r.marek@sh.cvut.cz> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> drivers/pci/quirks.c | 12 ++++++++++++ 1 file changed, 12 insertions(+)
* PCI: be more verbose about resource quirksLinus Torvalds2005-10-251-13/+88
| | | | | | | | | | When reserving an PCI quirk, note that in the kernel bootup messages. Also, parse the strange PIIX4 device resources - they should get their own PCI resource quirks, but for now just print out what it finds to verify that the code does the right thing. Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] Fix and clean up quirk_intel_ide_combined() configurationJeff Garzik2005-10-171-2/+2
| | | | | | | | | | | | | | | This change makes quirk_intel_ide_combined() dependent on the precise conditions under which it is needed: * IDE is built in * IDE SATA option is not set * ata_piix or ahci drivers are enabled This fixes an issue where some modular configurations would not cause the quirk to be enabled. Signed-off-by: Jeff Garzik <jgarzik@pobox.com> Signed-off-by: Linus torvalds <torvalds@osdl.org>
* [PATCH] PCI: Unhide SMBus on Compaq Evo N620cRumen Ivanov Zarev2005-09-091-0/+6
| | | | | | | | Trivial patch against 2.6.13 to unhide SMBus on Compaq Evo N620c laptop using Intel 82855PM chipset. Signed-off-by: Rumen Zarev <rzarev@caltech.edu> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] Make sparc64 use setup-res.cDavid S. Miller2005-09-081-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There were three changes necessary in order to allow sparc64 to use setup-res.c: 1) Sparc64 roots the PCI I/O and MEM address space using parent resources contained in the PCI controller structure. I'm actually surprised no other platforms do this, especially ones like Alpha and PPC{,64}. These resources get linked into the iomem/ioport tree when PCI controllers are probed. So the hierarchy looks like this: iomem --| PCI controller 1 MEM space --| device 1 device 2 etc. PCI controller 2 MEM space --| ... ioport --| PCI controller 1 IO space --| ... PCI controller 2 IO space --| ... You get the idea. The drivers/pci/setup-res.c code allocates using plain iomem_space and ioport_space as the root, so that wouldn't work with the above setup. So I added a pcibios_select_root() that is used to handle this. It uses the PCI controller struct's io_space and mem_space on sparc64, and io{port,mem}_resource on every other platform to keep current behavior. 2) quirk_io_region() is buggy. It takes in raw BUS view addresses and tries to use them as a PCI resource. pci_claim_resource() expects the resource to be fully formed when it gets called. The sparc64 implementation would do the translation but that's absolutely wrong, because if the same resource gets released then re-claimed we'll adjust things twice. So I fixed up quirk_io_region() to do the proper pcibios_bus_to_resource() conversion before passing it on to pci_claim_resource(). 3) I was mistakedly __init'ing the function methods the PCI controller drivers provide on sparc64 to implement some parts of these routines. This was, of course, easy to fix. So we end up with the following, and that nasty SPARC64 makefile ifdef in drivers/pci/Makefile is finally zapped. Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] via vt8237 apic bypass deassertion quirkKarsten Wiese2005-09-051-0/+19
| | | | | | | | | | | | The VIA VT8237's IOAPIC sends 'APIC De-Assert Messages' by default, causing another CPU interrupt when the IRQ pin is de-asserted. This feature is switched off by the patch to get rid of doubled ioapic level interrupt rates. Signed-off-by: Karsten Wiese <annabellesgarden@yahoo.de> Tested-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] PCI: 6700/6702PXH quirkKristen Accardi2005-08-161-0/+21
| | | | | | | | | | | | | On the 6700/6702 PXH part, a MSI may get corrupted if an ACPI hotplug driver and SHPC driver in MSI mode are used together. This patch will prevent MSI from being enabled for the SHPC as part of an early pci quirk, as well as on any pci device which sets the no_msi bit. Signed-off-by: Kristen Carlson Accardi <kristen.c.accardi@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] VIA VT8235 PCI quirkIvan Kokshaysky2005-08-081-0/+19
| | | | | | | | | | | | | Like many other southbridges from different manufacturers, VIA VT8235 chip has two non-standard BARs for power management and SMBus registers (see the datasheet at http://www.via.com.tw). This new quirk routine fixes boot problem with 2.6.13-rc2/rc6 kernels on Targa Visionary 811 Athlon64 laptop, as reported by Mikael Pettersson <mikpe@csd.uu.se>. Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] PCI: Hidden SMBus bridge on Toshiba Tecra M2Daniele Gaffuri2005-07-291-0/+5
| | | | | | | | | Patch against 2.6.12 to unhide SMBus on Toshiba Centrino laptops using Intel 82855PM chipset. Tested on Toshiba Tecra M2. Signed-off-by: Daniele Gaffuri <d.gaffuri@reply.it> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] PCI: Add PCI quirk for SMBus on the Asus P4B-LXJean Delvare2005-07-011-0/+1
| | | | | | | | | One more Asus motherboard requiring the SMBus quirk (P4B-LX). Original patch from Salah Coronya. Signed-off-by: Salah Coronya <salahx@yahoo.com> Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: MSI functionality broken on Serverworks GC chipsetNarendra Sankar2005-06-091-0/+6
| | | | | | | | | | | | | | | MSI functionality is broken on the GC_LE x86 chipset that Serverworks developed and that is being used in various platforms today. Broadcom is going to push out to the kernel MSI enabled Gigabit drivers (in the very near future), and we would like to make sure that MSI does not get enabled on any platforms using the GC_LE chipset (device id 0x17). Following the AMD 8131 example, I am including a patch to disable MSI functionality when a GCNB_LE is detected. Please let me know if there are any issues with this. This is a permanent fix for this chipset, as the hardware will not be updated. Signed-off-by: Narendra Sankar <nsankar@broadcom.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: do VIA IRQ fixup always, not just in PIC modeBjorn Helgaas2005-06-071-22/+13
| | | | | | | | | | | | At least some VIA chipsets require the fixup even in IO-APIC mode. This was found and debugged with the patient assistance of Stian Jordet <liste@jordet.nu> on an Asus CUV266-DLS motherboard. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] Fixup VIA IRQ quirkAlexander Nyberg2005-05-271-1/+1
| | | | | | | quirk_via_irqpic can't be __devinit for swsuspend Signed-off-by: Alexander Nyberg <alexn@telia.com> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] VIA IRQ quirkLen Brown2005-05-271-16/+24
| | | | | | | | | | | Delete quirk_via_bridge(), restore quirk_via_irqpic() -- but now improved to be invoked upon device ENABLE, and now only for VIA devices -- not all devices behind VIA bridges. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Len Brown <len.brown@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* [PATCH] PCI: Rapid Hance quirkR.Marek@sh.cvut.cz2005-05-031-0/+1
| | | | | | | | This patch just adds Intel's Hance Rapid south bridge IDs to ICH4 region quirk. Patch was successfuly tested by Chunhao Huang from Winbond. Signed-Off-By: Rudolf Marek <r.marek@sh.cvut.cz> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] PCI: Clean up a lot of sparse "Should it be static?" warnings.Greg KH2005-05-031-0/+1
| | | | Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
* [PATCH] ata_piix: IDE mode SATA patch for Intel ESB2Jason Gaston2005-04-161-0/+1
| | | | | | | | | | This patch adds the Intel ESB2 DID's to the ata_piix.c and quirks.c file for IDE mode SATA support. Signed-off-by: Jason Gaston <Jason.d.gaston@intel.com> Cc: Jeff Garzik <jgarzik@pobox.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
* Linux-2.6.12-rc2Linus Torvalds2005-04-161-0/+1352
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
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