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* More AP / SP bits for the 34K, the Malta bits and things. Still wantsRalf Baechle2005-10-294-2/+119
* Cleanups.Ralf Baechle2005-10-291-10/+12
* Move Origin crapola into a machine-specific header file.Ralf Baechle2005-10-292-0/+77
* Detect the MIPS R2 vectored interrupt, external interrupt controllerRalf Baechle2005-10-294-48/+99
* Macros to access the register of processors using the new MIPSRalf Baechle2005-10-292-0/+369
* Fix the fixup_bigphys_addr compile problem.Pete Popov2005-10-292-2/+4
* Removed __ilog2 since it's no longer needed and conflicts with thePete Popov2005-10-291-23/+0
* A few more macros to access MIPS R2 architecture registers.Ralf Baechle2005-10-291-0/+28
* Add EF_MIPS_ARCH_32R2 and EF_MIPS_ARCH_64R2 for tagging of R2 binaries.Ralf Baechle2005-10-291-0/+2
* Add a few more SHN_MIPS_* symbols from glibc.Ralf Baechle2005-10-291-1/+7
* Add inotify syscalls for MIPS.Ralf Baechle2005-10-291-3/+13
* MIPS R2 instruction hazard handling.Ralf Baechle2005-10-291-0/+16
* Detect the 34K.Ralf Baechle2005-10-291-1/+3
* Use ei / di MIPS32 R2 instructions if available.Ralf Baechle2005-10-291-53/+85
* Use clz / dclz on MIPS32 / MIPS64 processors.Ralf Baechle2005-10-291-22/+115
* Define kmap_atomic_pfn() for MIPS.Ralf Baechle2005-10-291-0/+2
* Fix endianess bugs.Ralf Baechle2005-10-291-0/+25
* Protect noat assembly with .set push/pop and make it somewhat readable.Thiemo Seufer2005-10-291-76/+78
* Fix get_saved_sp for 64bit address space. Simplify set_save_sp.Thiemo Seufer2005-10-291-5/+9
* IP30 Identification.Thiemo Seufer2005-10-291-0/+1
* Rename CONFIG_CPU_MIPS{32,64} to CONFIG_CPU_MIPS{32|64}_R1.Ralf Baechle2005-10-296-13/+13
* Use physical addresses at the interface level, letting drivers remapMaciej W. Rozycki2005-10-299-68/+40
* Prevent 64-bit constants from being cropped to 32 bits when used in C code.Maciej W. Rozycki2005-10-291-38/+42
* Inline ioremap() calls for constant addresses that map to KSEG1.Maciej W. Rozycki2005-10-293-2/+82
* More .set to keep 32-bit processors happy.Ralf Baechle2005-10-291-0/+4
* Always use ".set mips3" rather than select between "mips2" or "mips3"Maciej W. Rozycki2005-10-293-29/+27
* System-specific handling of bus errors for DECstation variationsMaciej W. Rozycki2005-10-295-51/+92
* Get the thing to compile again ...Ralf Baechle2005-10-291-1/+1
* Use macros for the RM7k cp0.config bits instead of magic numbers.Maciej W. Rozycki2005-10-291-2/+7
* Mark __die() "noreturn" for real.Maciej W. Rozycki2005-10-291-1/+1
* GCC 4.0.0 broke `attribute(("alias"))' -- resort to an assembly variant.Maciej W. Rozycki2005-10-291-13/+15
* Deal with the bloody KSEG vs CKSEG horror...Maciej W. Rozycki2005-10-295-12/+12
* Redo RM9000 workaround which along with other DSP ASE changes wasRalf Baechle2005-10-295-29/+14
* Enable a suitable ISA for the assembler around ll/sc so that codeMaciej W. Rozycki2005-10-293-28/+110
* Remove dead code which was causing warnings.Ralf Baechle2005-10-291-3/+0
* Fix build with CONFIG_PRINTK disabled.Ralf Baechle2005-10-291-0/+4
* Support the MIPS32 / MIPS64 DSP ASE.Ralf Baechle2005-10-2920-57/+568
* Fix build for CONFIG_BUG=n. Yes, bugs are now a compile time option ;-)Ralf Baechle2005-10-291-2/+2
* Bugs are now a configuration option.Ralf Baechle2005-10-291-0/+6
* On MIPS the struct sigev preamble is only 8 bytes.Ralf Baechle2005-10-291-0/+1
* Now that a struct is the only member left in structRalf Baechle2005-10-291-10/+8
* Get rid of the eir struct mips_fpu_emulator_private member. It'sRalf Baechle2005-10-291-1/+0
* __compute_return_epc() uses CFC1 instruction which might result in aRalf Baechle2005-10-291-2/+7
* Cleanup decoding of MIPSxx config registers.Ralf Baechle2005-10-294-5/+70
* Better interface to run uncached cache setup code.Thiemo Seufer2005-10-292-0/+6
* * use 'unsigned long' as address supplied to au_write[bwl]()Pete Popov2005-10-291-95/+32
* Fix D-cache aliasing problem in the PIO IDE driver potencially resultingRalf Baechle2005-10-291-8/+65
* Fix a few build warnings.Ralf Baechle2005-10-291-2/+2
* Need to include smp.h for the definition of smp_processor_id().Ralf Baechle2005-10-291-1/+1
* Move sync into the delay slot here also.Ralf Baechle2005-10-291-6/+3