From 981a95d37126cdf09e1dba3884305c2e25375bfb Mon Sep 17 00:00:00 2001 From: Shiraz Hashim Date: Mon, 7 Mar 2011 05:57:08 +0100 Subject: ARM: 6794/1: SPEAr: Append UL to device address macros. Reviewed-by: Stanley Miao Signed-off-by: Shiraz Hashim Signed-off-by: Rajeev Kumar Signed-off-by: Viresh Kumar Signed-off-by: Russell King --- arch/arm/mach-spear3xx/include/mach/spear320.h | 35 +++++++++++++------------- 1 file changed, 18 insertions(+), 17 deletions(-) (limited to 'arch/arm/mach-spear3xx/include/mach/spear320.h') diff --git a/arch/arm/mach-spear3xx/include/mach/spear320.h b/arch/arm/mach-spear3xx/include/mach/spear320.h index 95bdb2e..940f0d8 100644 --- a/arch/arm/mach-spear3xx/include/mach/spear320.h +++ b/arch/arm/mach-spear3xx/include/mach/spear320.h @@ -16,23 +16,24 @@ #ifndef __MACH_SPEAR320_H #define __MACH_SPEAR320_H -#define SPEAR320_EMI_CTRL_BASE 0x40000000 -#define SPEAR320_FSMC_BASE 0x4C000000 -#define SPEAR320_I2S_BASE 0x60000000 -#define SPEAR320_SDHCI_BASE 0x70000000 -#define SPEAR320_CLCD_BASE 0x90000000 -#define SPEAR320_PAR_PORT_BASE 0xA0000000 -#define SPEAR320_CAN0_BASE 0xA1000000 -#define SPEAR320_CAN1_BASE 0xA2000000 -#define SPEAR320_UART1_BASE 0xA3000000 -#define SPEAR320_UART2_BASE 0xA4000000 -#define SPEAR320_SSP0_BASE 0xA5000000 -#define SPEAR320_SSP1_BASE 0xA6000000 -#define SPEAR320_I2C_BASE 0xA7000000 -#define SPEAR320_PWM_BASE 0xA8000000 -#define SPEAR320_SMII0_BASE 0xAA000000 -#define SPEAR320_SMII1_BASE 0xAB000000 -#define SPEAR320_SOC_CONFIG_BASE 0xB3000000 +#define SPEAR320_EMI_CTRL_BASE UL(0x40000000) +#define SPEAR320_FSMC_BASE UL(0x4C000000) +#define SPEAR320_NAND_BASE UL(0x50000000) +#define SPEAR320_I2S_BASE UL(0x60000000) +#define SPEAR320_SDHCI_BASE UL(0x70000000) +#define SPEAR320_CLCD_BASE UL(0x90000000) +#define SPEAR320_PAR_PORT_BASE UL(0xA0000000) +#define SPEAR320_CAN0_BASE UL(0xA1000000) +#define SPEAR320_CAN1_BASE UL(0xA2000000) +#define SPEAR320_UART1_BASE UL(0xA3000000) +#define SPEAR320_UART2_BASE UL(0xA4000000) +#define SPEAR320_SSP0_BASE UL(0xA5000000) +#define SPEAR320_SSP1_BASE UL(0xA6000000) +#define SPEAR320_I2C_BASE UL(0xA7000000) +#define SPEAR320_PWM_BASE UL(0xA8000000) +#define SPEAR320_SMII0_BASE UL(0xAA000000) +#define SPEAR320_SMII1_BASE UL(0xAB000000) +#define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000) /* Interrupt registers offsets and masks */ #define INT_STS_MASK_REG 0x04 -- cgit v1.1