From 3d372548b4af1a3d0a40f3dde7af5389a30ce359 Mon Sep 17 00:00:00 2001 From: "James.Yang" Date: Wed, 2 May 2007 16:34:43 -0500 Subject: [POWERPC] Remove CPU_FTR_NEED_COHERENT for 7448. Remove CPU_FTR_NEED_COHERENT for MPC7448 (and single-core MPC86xx). This prevents needlessly setting M=1 when not SMP. Signed-off-by: James.Yang Acked-by: Jon Loeliger Signed-off-by: Kumar Gala --- include/asm-powerpc/cputable.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'include/asm-powerpc') diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h index 4345249..82d595a 100644 --- a/include/asm-powerpc/cputable.h +++ b/include/asm-powerpc/cputable.h @@ -302,6 +302,12 @@ extern void do_feature_fixups(unsigned long value, void *fixup_start, CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \ CPU_FTR_NEED_COHERENT | CPU_FTR_PPC_LE) +#define CPU_FTRS_7448 (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ + CPU_FTR_USE_TB | \ + CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | \ + CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 | \ + CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS | \ + CPU_FTR_PPC_LE) #define CPU_FTRS_82XX (CPU_FTR_COMMON | CPU_FTR_SPLIT_ID_CACHE | \ CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB) #define CPU_FTRS_G2_LE (CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | \ -- cgit v1.1