From 73feb5c09dcf0d64beb67aa5e1f79e11a388e0ff Mon Sep 17 00:00:00 2001 From: Michael Hennerich Date: Wed, 7 Jan 2009 23:14:39 +0800 Subject: Blackfin arch: fix bugs and unify BFIN_KERNEL_CLOCK option - remove duplicated code and headers - add option allowing arbitrary SDRAM/DDR Timing parameters. - mark automatically calculated timings as EXPERIMENTAL - fix comment header block Related to BUGs: - kernel boot up fails with CONFIG_BFIN_KERNEL_CLOCK item on. - kernel does not boot if re-program clocks [ Mike Frysinger - fix comment header - mark do_sync static - document the DMA shutdown - simplify SIC_IWR handling - fix ANOMALY_05000265 handling to work as intended ] Signed-off-by: Michael Hennerich Signed-off-by: Mike Frysinger Signed-off-by: Bryan Wu --- arch/blackfin/mach-common/Makefile | 1 + arch/blackfin/mach-common/clocks-init.c | 93 +++++++++++++++++++++++++++++++++ arch/blackfin/mach-common/head.S | 2 +- 3 files changed, 95 insertions(+), 1 deletion(-) create mode 100644 arch/blackfin/mach-common/clocks-init.c (limited to 'arch/blackfin/mach-common') diff --git a/arch/blackfin/mach-common/Makefile b/arch/blackfin/mach-common/Makefile index 38911c6..1f3228e 100644 --- a/arch/blackfin/mach-common/Makefile +++ b/arch/blackfin/mach-common/Makefile @@ -11,3 +11,4 @@ obj-$(CONFIG_PM) += pm.o dpmc_modes.o obj-$(CONFIG_CPU_FREQ) += cpufreq.o obj-$(CONFIG_CPU_VOLTAGE) += dpmc.o obj-$(CONFIG_SMP) += smp.o +obj-$(CONFIG_BFIN_KERNEL_CLOCK) += clocks-init.o diff --git a/arch/blackfin/mach-common/clocks-init.c b/arch/blackfin/mach-common/clocks-init.c new file mode 100644 index 0000000..39a94b3 --- /dev/null +++ b/arch/blackfin/mach-common/clocks-init.c @@ -0,0 +1,93 @@ +/* + * arch/blackfin/mach-common/clocks-init.c - reprogram clocks / memory + * + * Copyright 2004-2008 Analog Devices Inc. + * + * Licensed under the GPL-2 or later. + */ + +#include +#include +#include + +#include +#include +#include + +#define PLL_CTL_VAL \ + (((CONFIG_VCO_MULT & 63) << 9) | CLKIN_HALF | \ + (PLL_BYPASS << 8) | (ANOMALY_05000265 ? 0x8000 : 0)) + +__attribute__((l1_text)) +static void do_sync(void) +{ + __builtin_bfin_ssync(); +} + +__attribute__((l1_text)) +void init_clocks(void) +{ + /* Kill any active DMAs as they may trigger external memory accesses + * in the middle of reprogramming things, and that'll screw us up. + * For example, any automatic DMAs left by U-Boot for splash screens. + */ + size_t i; + for (i = 0; i < MAX_BLACKFIN_DMA_CHANNEL; ++i) { + struct dma_register *dma = dma_io_base_addr[i]; + dma->cfg = 0; + } + + do_sync(); + +#ifdef SIC_IWR0 + bfin_write_SIC_IWR0(IWR_ENABLE(0)); +# ifdef SIC_IWR1 + /* BF52x system reset does not properly reset SIC_IWR1 which + * will screw up the bootrom as it relies on MDMA0/1 waking it + * up from IDLE instructions. See this report for more info: + * http://blackfin.uclinux.org/gf/tracker/4323 + */ + if (ANOMALY_05000435) + bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11)); + else + bfin_write_SIC_IWR1(IWR_DISABLE_ALL); +# endif +# ifdef SIC_IWR2 + bfin_write_SIC_IWR2(IWR_DISABLE_ALL); +# endif +#else + bfin_write_SIC_IWR(IWR_ENABLE(0)); +#endif + do_sync(); +#ifdef EBIU_SDGCTL + bfin_write_EBIU_SDGCTL(bfin_read_EBIU_SDGCTL() | SRFS); + do_sync(); +#endif + +#ifdef CLKBUFOE + bfin_write16(VR_CTL, bfin_read_VR_CTL() | CLKBUFOE); + do_sync(); + __asm__ __volatile__("IDLE;"); +#endif + bfin_write_PLL_LOCKCNT(0x300); + do_sync(); + bfin_write16(PLL_CTL, PLL_CTL_VAL); + __asm__ __volatile__("IDLE;"); + bfin_write_PLL_DIV(CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV); +#ifdef EBIU_SDGCTL + bfin_write_EBIU_SDRRC(mem_SDRRC); + bfin_write_EBIU_SDGCTL(mem_SDGCTL); +#else + bfin_write_EBIU_RSTCTL(bfin_read_EBIU_RSTCTL() & ~(SRREQ)); + do_sync(); + bfin_write_EBIU_RSTCTL(bfin_read_EBIU_RSTCTL() | 0x1); + bfin_write_EBIU_DDRCTL0(mem_DDRCTL0); + bfin_write_EBIU_DDRCTL1(mem_DDRCTL1); + bfin_write_EBIU_DDRCTL2(mem_DDRCTL2); +#ifdef CONFIG_MEM_EBIU_DDRQUE + bfin_write_EBIU_DDRQUE(CONFIG_MEM_EBIU_DDRQUE); +#endif +#endif + do_sync(); + bfin_read16(0); +} diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S index a621ae4..e1e42c0 100644 --- a/arch/blackfin/mach-common/head.S +++ b/arch/blackfin/mach-common/head.S @@ -147,7 +147,7 @@ ENTRY(__start) /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */ call _bfin_relocate_l1_mem; #ifdef CONFIG_BFIN_KERNEL_CLOCK - call _start_dma_code; + call _init_clocks; #endif /* This section keeps the processor in supervisor mode -- cgit v1.1