From ea76f0b3759283ec3cc06c86e266bf0fa6a981d2 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 23 Apr 2009 00:40:30 +0900 Subject: DMA: TXx9 Soc DMA Controller driver This patch adds support for the integrated DMAC of the TXx9 family. Signed-off-by: Atsushi Nemoto Acked-by: Dan Williams Signed-off-by: Ralf Baechle --- drivers/dma/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/dma/Kconfig') diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index 3b3c01b..070357a 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -81,6 +81,14 @@ config MX3_IPU_IRQS To avoid bloating the irq_desc[] array we allocate a sufficient number of IRQ slots and map them dynamically to specific sources. +config TXX9_DMAC + tristate "Toshiba TXx9 SoC DMA support" + depends on MACH_TX49XX || MACH_TX39XX + select DMA_ENGINE + help + Support the TXx9 SoC internal DMA controller. This can be + integrated in chips such as the Toshiba TX4927/38/39. + config DMA_ENGINE bool -- cgit v1.1 From daf4219dbcbb2efcd638fcd3c29a622e1c18cc38 Mon Sep 17 00:00:00 2001 From: Dan Williams Date: Wed, 1 Jul 2009 16:12:53 -0700 Subject: dmaengine: move HIGHMEM64G restriction to ASYNC_TX_DMA On HIGHMEM64G systems dma_addr_t is known to be larger than (void *) which precludes async_xor from performing dma address conversions by reusing the input parameter address list. However, other parts of the dmaengine infrastructure do not suffer this constraint, so the HIGHMEM64G restriction can be down-levelled. Signed-off-by: Dan Williams --- drivers/dma/Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/dma/Kconfig') diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index 3b3c01b..babf214 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -4,7 +4,7 @@ menuconfig DMADEVICES bool "DMA Engine support" - depends on !HIGHMEM64G && HAS_DMA + depends on HAS_DMA help DMA engines can do asynchronous data transfers without involving the host CPU. Currently, this framework can be @@ -100,7 +100,7 @@ config NET_DMA config ASYNC_TX_DMA bool "Async_tx: Offload support for the async_tx api" - depends on DMA_ENGINE + depends on DMA_ENGINE && !HIGHMEM64G help This allows the async_tx api to take advantage of offload engines for memcpy, memset, xor, and raid6 p+q operations. If your platform has -- cgit v1.1 From dc78baa2b90b289590911b40b6800f77d0dc935a Mon Sep 17 00:00:00 2001 From: Nicolas Ferre Date: Fri, 3 Jul 2009 19:24:33 +0200 Subject: dmaengine: at_hdmac: new driver for the Atmel AHB DMA Controller This AHB DMA Controller (aka HDMA or DMAC on AT91 systems) is availlable on at91sam9rl chip. It will be used on other products in the future. This first release covers only the memory-to-memory tranfer type. This is the only tranfer type supported by this chip. On other products, it will be used also for peripheral DMA transfer (slave API support to come). I used dmatest client without problem in different configurations to test it. Full documentation for this controller can be found in the SAM9RL datasheet: http://www.atmel.com/dyn/products/product_card.asp?part_id=4243 Signed-off-by: Nicolas Ferre Acked-by: Maciej Sosnowski Signed-off-by: Dan Williams --- drivers/dma/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'drivers/dma/Kconfig') diff --git a/drivers/dma/Kconfig b/drivers/dma/Kconfig index babf214..bc8fb41 100644 --- a/drivers/dma/Kconfig +++ b/drivers/dma/Kconfig @@ -46,6 +46,14 @@ config DW_DMAC Support the Synopsys DesignWare AHB DMA controller. This can be integrated in chips such as the Atmel AT32ap7000. +config AT_HDMAC + tristate "Atmel AHB DMA support" + depends on ARCH_AT91SAM9RL + select DMA_ENGINE + help + Support the Atmel AHB DMA controller. This can be integrated in + chips such as the Atmel AT91SAM9RL. + config FSL_DMA tristate "Freescale Elo and Elo Plus DMA support" depends on FSL_SOC -- cgit v1.1