From 456335e2072fb35bf290b45e61d51916c322c145 Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 27 Sep 2006 10:00:54 +0100 Subject: [ARM] Separate page table manipulation code from bootmem initialisation nommu does not require the page table manipulation code in the bootmem initialisation paths. Move this into separate inline functions. Signed-off-by: Russell King --- include/asm-arm/setup.h | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/setup.h b/include/asm-arm/setup.h index ea3ed24..aa4b578 100644 --- a/include/asm-arm/setup.h +++ b/include/asm-arm/setup.h @@ -194,13 +194,15 @@ static struct tagtable __tagtable_##fn __tag = { tag, fn } # define NR_BANKS 8 #endif +struct membank { + unsigned long start; + unsigned long size; + int node; +}; + struct meminfo { int nr_banks; - struct { - unsigned long start; - unsigned long size; - int node; - } bank[NR_BANKS]; + struct membank bank[NR_BANKS]; }; /* -- cgit v1.1 From f12d0d7c7786af39435ef6ae9defe47fb58f6091 Mon Sep 17 00:00:00 2001 From: "Hyok S. Choi" Date: Tue, 26 Sep 2006 17:36:37 +0900 Subject: [ARM] nommu: manage the CP15 things All the current CP15 access codes in ARM arch can be categorized and conditioned by the defines as follows: Related operation Safe condition a. any CP15 access !CPU_CP15 b. alignment trap CPU_CP15_MMU c. D-cache(C-bit) CPU_CP15 d. I-cache CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 || CPU_ARM720 || CPU_ARM740 || CPU_XSCALE || CPU_XSC3 ) e. alternate vector CPU_CP15 && !CPU_ARM740 f. TTB CPU_CP15_MMU g. Domain CPU_CP15_MMU h. FSR/FAR CPU_CP15_MMU For example, alternate vector is supported if and only if "CPU_CP15 && !CPU_ARM740" is satisfied. Signed-off-by: Hyok S. Choi Signed-off-by: Russell King --- include/asm-arm/system.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'include/asm-arm') diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index c19c5b0..f05fbe3 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -46,6 +46,7 @@ #define CPUID_TCM 2 #define CPUID_TLBTYPE 3 +#ifdef CONFIG_CPU_CP15 #define read_cpuid(reg) \ ({ \ unsigned int __val; \ @@ -55,6 +56,9 @@ : "cc"); \ __val; \ }) +#else +#define read_cpuid(reg) (processor_id) +#endif /* * This is used to ensure the compiler did actually allocate the register we -- cgit v1.1 From 07e0da78abdc679714a12e7a60137d950c346681 Mon Sep 17 00:00:00 2001 From: "Hyok S. Choi" Date: Tue, 26 Sep 2006 17:37:36 +0900 Subject: [ARM] nommu: add ARM7TDMI core support This patch adds ARM7TDMI core support which has no cache and no CP15 register(no memory control unit). Signed-off-by: Hyok S. Choi Signed-off-by: Russell King --- include/asm-arm/cacheflush.h | 2 +- include/asm-arm/proc-fns.h | 8 ++++++++ 2 files changed, 9 insertions(+), 1 deletion(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index e4a2569..e7bfff2 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h @@ -33,7 +33,7 @@ # endif #endif -#if defined(CONFIG_CPU_ARM720T) +#if defined(CONFIG_CPU_ARM720T) || defined(CONFIG_CPU_ARM7TDMI) # ifdef _CACHE # define MULTI_CACHE 1 # else diff --git a/include/asm-arm/proc-fns.h b/include/asm-arm/proc-fns.h index 1bde92c..3e8c057 100644 --- a/include/asm-arm/proc-fns.h +++ b/include/asm-arm/proc-fns.h @@ -33,6 +33,14 @@ # define CPU_NAME cpu_arm6 # endif # endif +# ifdef CONFIG_CPU_ARM7TDMI +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm7tdmi +# endif +# endif # ifdef CONFIG_CPU_ARM710 # ifdef CPU_NAME # undef MULTI_CPU -- cgit v1.1 From b731c3118d87f26c8bf3f358ffbbc24450af50a6 Mon Sep 17 00:00:00 2001 From: "Hyok S. Choi" Date: Tue, 26 Sep 2006 17:37:50 +0900 Subject: [ARM] nommu: add ARM740T core support This patch adds ARM740T core support which has a MPU and 4KB or 8KB cache. Signed-off-by: Hyok S. Choi Signed-off-by: Russell King --- include/asm-arm/cacheflush.h | 3 ++- include/asm-arm/proc-fns.h | 8 ++++++++ 2 files changed, 10 insertions(+), 1 deletion(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index e7bfff2..24924e6 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h @@ -25,7 +25,8 @@ #undef _CACHE #undef MULTI_CACHE -#if defined(CONFIG_CPU_ARM610) || defined(CONFIG_CPU_ARM710) +#if defined(CONFIG_CPU_ARM610) || defined(CONFIG_CPU_ARM710) || \ + defined(CONFIG_CPU_ARM740T) # ifdef _CACHE # define MULTI_CACHE 1 # else diff --git a/include/asm-arm/proc-fns.h b/include/asm-arm/proc-fns.h index 3e8c057..17dfc0d 100644 --- a/include/asm-arm/proc-fns.h +++ b/include/asm-arm/proc-fns.h @@ -57,6 +57,14 @@ # define CPU_NAME cpu_arm720 # endif # endif +# ifdef CONFIG_CPU_ARM740T +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm740 +# endif +# endif # ifdef CONFIG_CPU_ARM920T # ifdef CPU_NAME # undef MULTI_CPU -- cgit v1.1 From 43f5f0146ef5c3a3421ea53a0708fd37edcb8905 Mon Sep 17 00:00:00 2001 From: "Hyok S. Choi" Date: Tue, 26 Sep 2006 17:38:05 +0900 Subject: [ARM] nommu: add ARM9TDMI core support This patch adds ARM9TDMI core support which has no cache and no CP15 register(no memory control unit). Signed-off-by: Hyok S. Choi Signed-off-by: Russell King --- include/asm-arm/cacheflush.h | 3 ++- include/asm-arm/proc-fns.h | 8 ++++++++ 2 files changed, 10 insertions(+), 1 deletion(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index 24924e6..77ff6fe 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h @@ -34,7 +34,8 @@ # endif #endif -#if defined(CONFIG_CPU_ARM720T) || defined(CONFIG_CPU_ARM7TDMI) +#if defined(CONFIG_CPU_ARM720T) || defined(CONFIG_CPU_ARM7TDMI) || \ + defined(CONFIG_CPU_ARM9TDMI) # ifdef _CACHE # define MULTI_CACHE 1 # else diff --git a/include/asm-arm/proc-fns.h b/include/asm-arm/proc-fns.h index 17dfc0d..7bb9dab 100644 --- a/include/asm-arm/proc-fns.h +++ b/include/asm-arm/proc-fns.h @@ -65,6 +65,14 @@ # define CPU_NAME cpu_arm740 # endif # endif +# ifdef CONFIG_CPU_ARM9TDMI +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm9tdmi +# endif +# endif # ifdef CONFIG_CPU_ARM920T # ifdef CPU_NAME # undef MULTI_CPU -- cgit v1.1 From d60674eb5d961b2421db16cc373dc163f38cc105 Mon Sep 17 00:00:00 2001 From: "Hyok S. Choi" Date: Tue, 26 Sep 2006 17:38:18 +0900 Subject: [ARM] nommu: add ARM940T core support This patch adds ARM940T core support which has 4KB D-cache, 4KB I-cache and a MPU. Signed-off-by: Hyok S. Choi Signed-off-by: Russell King --- include/asm-arm/cacheflush.h | 8 ++++++++ include/asm-arm/proc-fns.h | 8 ++++++++ 2 files changed, 16 insertions(+) (limited to 'include/asm-arm') diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index 77ff6fe..b0a8603 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h @@ -56,6 +56,14 @@ # endif #endif +#if defined(CONFIG_CPU_ARM940T) +# ifdef _CACHE +# define MULTI_CACHE 1 +# else +# define _CACHE arm940 +# endif +#endif + #if defined(CONFIG_CPU_SA110) || defined(CONFIG_CPU_SA1100) # ifdef _CACHE # define MULTI_CACHE 1 diff --git a/include/asm-arm/proc-fns.h b/include/asm-arm/proc-fns.h index 7bb9dab..87f3ea9 100644 --- a/include/asm-arm/proc-fns.h +++ b/include/asm-arm/proc-fns.h @@ -105,6 +105,14 @@ # define CPU_NAME cpu_arm926 # endif # endif +# ifdef CONFIG_CPU_ARM940T +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm940 +# endif +# endif # ifdef CONFIG_CPU_SA110 # ifdef CPU_NAME # undef MULTI_CPU -- cgit v1.1 From f37f46eb1c0bd0b11c34ef06c7365658be989d80 Mon Sep 17 00:00:00 2001 From: "Hyok S. Choi" Date: Tue, 26 Sep 2006 17:38:32 +0900 Subject: [ARM] nommu: add ARM946E-S core support This patch adds ARM946E-S core support which has typically 8KB I&D cache. It has a MPU and supports ARMv5TE instruction set. Because the ARM946E-S core can be synthesizable with various cache size, CONFIG_CPU_DCACHE_SIZE is defined for vendor specific configurations. Signed-off-by: Hyok S. Choi Signed-off-by: Russell King --- include/asm-arm/cacheflush.h | 8 ++++++++ include/asm-arm/proc-fns.h | 8 ++++++++ 2 files changed, 16 insertions(+) (limited to 'include/asm-arm') diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index b0a8603..b611a8e 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h @@ -64,6 +64,14 @@ # endif #endif +#if defined(CONFIG_CPU_ARM946E) +# ifdef _CACHE +# define MULTI_CACHE 1 +# else +# define _CACHE arm946 +# endif +#endif + #if defined(CONFIG_CPU_SA110) || defined(CONFIG_CPU_SA1100) # ifdef _CACHE # define MULTI_CACHE 1 diff --git a/include/asm-arm/proc-fns.h b/include/asm-arm/proc-fns.h index 87f3ea9..ea7e54c 100644 --- a/include/asm-arm/proc-fns.h +++ b/include/asm-arm/proc-fns.h @@ -113,6 +113,14 @@ # define CPU_NAME cpu_arm940 # endif # endif +# ifdef CONFIG_CPU_ARM946E +# ifdef CPU_NAME +# undef MULTI_CPU +# define MULTI_CPU +# else +# define CPU_NAME cpu_arm946 +# endif +# endif # ifdef CONFIG_CPU_SA110 # ifdef CPU_NAME # undef MULTI_CPU -- cgit v1.1 From 6cc7cbef948ea2660cc40d7aab090a479f7db6a2 Mon Sep 17 00:00:00 2001 From: Russell King Date: Wed, 27 Sep 2006 18:00:35 +0100 Subject: [ARM] Use CPU_CACHE_* where possible in asm/cacheflush.h Three of the generic cache method options were using explicit CPU types, whereas they could use the CPU_CACHE_* definitions instead. Switch them over to use the CPU_CACHE_* definitions. Signed-off-by: Russell King --- include/asm-arm/cacheflush.h | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) (limited to 'include/asm-arm') diff --git a/include/asm-arm/cacheflush.h b/include/asm-arm/cacheflush.h index b611a8e..f084564 100644 --- a/include/asm-arm/cacheflush.h +++ b/include/asm-arm/cacheflush.h @@ -25,8 +25,7 @@ #undef _CACHE #undef MULTI_CACHE -#if defined(CONFIG_CPU_ARM610) || defined(CONFIG_CPU_ARM710) || \ - defined(CONFIG_CPU_ARM740T) +#if defined(CONFIG_CPU_CACHE_V3) # ifdef _CACHE # define MULTI_CACHE 1 # else @@ -34,8 +33,7 @@ # endif #endif -#if defined(CONFIG_CPU_ARM720T) || defined(CONFIG_CPU_ARM7TDMI) || \ - defined(CONFIG_CPU_ARM9TDMI) +#if defined(CONFIG_CPU_CACHE_V4) # ifdef _CACHE # define MULTI_CACHE 1 # else @@ -72,7 +70,7 @@ # endif #endif -#if defined(CONFIG_CPU_SA110) || defined(CONFIG_CPU_SA1100) +#if defined(CONFIG_CPU_CACHE_V4WB) # ifdef _CACHE # define MULTI_CACHE 1 # else -- cgit v1.1