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author | Linus Torvalds <torvalds@linux-foundation.org> | 2009-12-08 08:18:01 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-12-08 08:18:01 -0800 |
commit | 23eb3b64b5e44680c867e165fe1cd18e57fba255 (patch) | |
tree | d6aed2971ef647f7be2986353f830577abd1fab9 /include/linux/pci_ids.h | |
parent | 1c496784a0d317535f846ddb2c93a08ba936266b (diff) | |
parent | 1b52f2a41c41052d2a7c78af0bd9b8b11d70f49a (diff) | |
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Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: (54 commits)
Revert "pata_sis: Implement MWDMA for the UDMA 133 capable chips"
libata: Clarify ata_set_lba_range_entries function
libata: Report zeroed read after TRIM and max discard size
pata_hpt3x2n: fix overclocked MWDMA0 timing
pata_it8213: MWDMA0 is unsupported
[libata] MWDMA0 is unsupported on PIIX-like PATA controllers
pata_via: clear UDMA transfer mode bit for PIO and MWDMA
pata_sis: Power Management fix
pata_rz1000: Power Management fix
pata_radisys: fix UDMA handling
pata_ns87415: Power Management fix
pata_marvell: fix marvell_pre_reset() documentation
pata_legacy: add pointers to QDI65x0 documentation
pata_legacy: fix access to control register for QDI6580
pata_legacy: fix QDI6580DP support
pata_it8213: fix it8213_pre_reset() documentation
pata_it8213: fix wrong MWDMA timings being programmed
pata_it8213: fix PIO2 underclocking
pata_it8213: fix wrong PIO timings being programmed
pata_it8213: fix UDMA handling
...
Diffstat (limited to 'include/linux/pci_ids.h')
-rw-r--r-- | include/linux/pci_ids.h | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h index daecca3..cabf074 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -1496,9 +1496,10 @@ #define PCI_DEVICE_ID_SBE_WANXL400 0x0104 #define PCI_VENDOR_ID_TOSHIBA 0x1179 -#define PCI_DEVICE_ID_TOSHIBA_PICCOLO 0x0102 -#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_1 0x0103 -#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_2 0x0105 +#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_1 0x0101 +#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_2 0x0102 +#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_3 0x0103 +#define PCI_DEVICE_ID_TOSHIBA_PICCOLO_5 0x0105 #define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x060a #define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f #define PCI_DEVICE_ID_TOSHIBA_TOPIC100 0x0617 |