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-rw-r--r--arch/arm/mach-omap2/Kconfig1
-rw-r--r--arch/arm/mach-omap2/board-4430sdp.c25
2 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig
index 7ab80cc..9d35bab 100644
--- a/arch/arm/mach-omap2/Kconfig
+++ b/arch/arm/mach-omap2/Kconfig
@@ -336,6 +336,7 @@ config MACH_OMAP_4430SDP
select TWL6030_GPADC
select OMAP_REBOOT_REASON
select OMAP_RAM_CONSOLE
+ select CDC_TCXO
config MACH_OMAP_BLAZE
bool "OMAP 44xx Tablet2 Board"
diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c
index f7febd9..5009b0a 100644
--- a/arch/arm/mach-omap2/board-4430sdp.c
+++ b/arch/arm/mach-omap2/board-4430sdp.c
@@ -25,6 +25,7 @@
#include <linux/omapfb.h>
#include <linux/wl12xx.h>
#include <linux/memblock.h>
+#include <linux/cdc_tcxo.h>
#include <linux/mfd/twl6040-codec.h>
#include <mach/omap4-common.h>
@@ -654,6 +655,26 @@ static struct bq2415x_platform_data sdp4430_bqdata = {
.max_charger_currentmA = 1550,
};
+/*
+ * The Clock Driver Chip (TCXO) on OMAP4 based SDP needs to
+ * be programmed to output CLK1 based on REQ1 from OMAP.
+ * By default CLK1 is driven based on an internal REQ1INT signal
+ * which is always set to 1.
+ * Doing this helps gate sysclk (from CLK1) to OMAP while OMAP
+ * is in sleep states.
+ */
+static struct cdc_tcxo_platform_data sdp4430_cdc_data = {
+ .buf = {
+ CDC_TCXO_REQ4INT | CDC_TCXO_REQ1INT |
+ CDC_TCXO_REQ4POL | CDC_TCXO_REQ3POL |
+ CDC_TCXO_REQ2POL | CDC_TCXO_REQ1POL,
+ CDC_TCXO_MREQ4 | CDC_TCXO_MREQ3 |
+ CDC_TCXO_MREQ2 | CDC_TCXO_MREQ1,
+ CDC_TCXO_LDOEN1,
+ 0,
+ },
+};
+
static struct i2c_board_info __initdata sdp4430_i2c_boardinfo[] = {
{
I2C_BOARD_INFO("bq24156", 0x6a),
@@ -663,6 +684,10 @@ static struct i2c_board_info __initdata sdp4430_i2c_boardinfo[] = {
I2C_BOARD_INFO("tps6130x", 0x33),
.platform_data = &twl6040_vddhf,
},
+ {
+ I2C_BOARD_INFO("cdc_tcxo_driver", 0x6c),
+ .platform_data = &sdp4430_cdc_data,
+ },
};
static struct i2c_board_info __initdata sdp4430_i2c_3_boardinfo[] = {