diff options
Diffstat (limited to 'arch/powerpc/boot')
46 files changed, 2040 insertions, 311 deletions
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile index 1aded8f..5ba50c6 100644 --- a/arch/powerpc/boot/Makefile +++ b/arch/powerpc/boot/Makefile @@ -40,6 +40,7 @@ $(obj)/ebony.o: BOOTCFLAGS += -mcpu=405 $(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405 $(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405 $(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405 +$(obj)/virtex405-head.o: BOOTCFLAGS += -mcpu=405 zlib := inffast.c inflate.c inftrees.c @@ -64,7 +65,8 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c cuboot-bamboo.c cuboot-mpc7448hpc2.c cuboot-taishan.c \ fixed-head.S ep88xc.c ep405.c \ cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \ - cuboot-warp.c cuboot-85xx-cpm2.c + cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \ + virtex405-head.S src-boot := $(src-wlib) $(src-plat) empty.c src-boot := $(addprefix $(obj)/, $(src-boot)) @@ -192,7 +194,7 @@ image-$(CONFIG_PPC_CHRP) += zImage.chrp image-$(CONFIG_PPC_EFIKA) += zImage.chrp image-$(CONFIG_PPC_PMAC) += zImage.pmac image-$(CONFIG_PPC_HOLLY) += zImage.holly -image-$(CONFIG_PPC_PRPMC2800) += zImage.prpmc2800 +image-$(CONFIG_PPC_PRPMC2800) += dtbImage.prpmc2800 image-$(CONFIG_PPC_ISERIES) += zImage.iseries image-$(CONFIG_DEFAULT_UIMAGE) += uImage @@ -216,6 +218,7 @@ image-$(CONFIG_RAINIER) += cuImage.rainier image-$(CONFIG_TAISHAN) += cuImage.taishan image-$(CONFIG_KATMAI) += cuImage.katmai image-$(CONFIG_WARP) += cuImage.warp +image-$(CONFIG_YOSEMITE) += cuImage.yosemite # Board ports in arch/powerpc/platform/8xx/Kconfig image-$(CONFIG_PPC_MPC86XADS) += cuImage.mpc866ads @@ -255,6 +258,7 @@ image-$(CONFIG_TQM8555) += cuImage.tqm8555 image-$(CONFIG_TQM8560) += cuImage.tqm8560 image-$(CONFIG_SBC8548) += cuImage.sbc8548 image-$(CONFIG_SBC8560) += cuImage.sbc8560 +image-$(CONFIG_KSI8560) += cuImage.ksi8560 # Board ports in arch/powerpc/platform/embedded6xx/Kconfig image-$(CONFIG_STORCENTER) += cuImage.storcenter @@ -285,11 +289,11 @@ $(obj)/zImage.%: vmlinux $(wrapperbits) $(call if_changed,wrap,$*) # dtbImage% - a dtbImage is a zImage with an embedded device tree blob -$(obj)/dtbImage.initrd.%: vmlinux $(wrapperbits) $(dtstree)/%.dts - $(call if_changed,wrap,$*,$(dtstree)/$*.dts,,$(obj)/ramdisk.image.gz) +$(obj)/dtbImage.initrd.%: vmlinux $(wrapperbits) $(obj)/%.dtb + $(call if_changed,wrap,$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz) -$(obj)/dtbImage.%: vmlinux $(wrapperbits) $(dtstree)/%.dts - $(call if_changed,wrap,$*,$(dtstree)/$*.dts) +$(obj)/dtbImage.%: vmlinux $(wrapperbits) $(obj)/%.dtb + $(call if_changed,wrap,$*,,$(obj)/$*.dtb) # This cannot be in the root of $(src) as the zImage rule always adds a $(obj) # prefix @@ -302,14 +306,24 @@ $(obj)/zImage.iseries: vmlinux $(obj)/uImage: vmlinux $(wrapperbits) $(call if_changed,wrap,uboot) -$(obj)/cuImage.%: vmlinux $(dtstree)/%.dts $(wrapperbits) - $(call if_changed,wrap,cuboot-$*,$(dtstree)/$*.dts) +$(obj)/cuImage.%: vmlinux $(obj)/%.dtb $(wrapperbits) + $(call if_changed,wrap,cuboot-$*,,$(obj)/$*.dtb) -$(obj)/treeImage.initrd.%: vmlinux $(dtstree)/%.dts $(wrapperbits) - $(call if_changed,wrap,treeboot-$*,$(dtstree)/$*.dts,,$(obj)/ramdisk.image.gz) +$(obj)/simpleImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits) + $(call if_changed,wrap,simpleboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz) -$(obj)/treeImage.%: vmlinux $(dtstree)/%.dts $(wrapperbits) - $(call if_changed,wrap,treeboot-$*,$(dtstree)/$*.dts) +$(obj)/simpleImage.%: vmlinux $(obj)/%.dtb $(wrapperbits) + $(call if_changed,wrap,simpleboot-$*,,$(obj)/$*.dtb) + +$(obj)/treeImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits) + $(call if_changed,wrap,treeboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz) + +$(obj)/treeImage.%: vmlinux $(obj)/%.dtb $(wrapperbits) + $(call if_changed,wrap,treeboot-$*,,$(obj)/$*.dtb) + +# Rule to build device tree blobs +$(obj)/%.dtb: $(dtstree)/%.dts $(obj)/dtc + $(obj)/dtc -O dtb -o $(obj)/$*.dtb -b 0 $(DTS_FLAGS) $(dtstree)/$*.dts # If there isn't a platform selected then just strip the vmlinux. ifeq (,$(image-y)) @@ -326,7 +340,7 @@ install: $(CONFIGURE) $(addprefix $(obj)/, $(image-y)) # anything not in $(targets) clean-files += $(image-) $(initrd-) zImage zImage.initrd cuImage.* treeImage.* \ - otheros.bld + otheros.bld *.dtb # clean up files cached by wrapper clean-kernel := vmlinux.strip vmlinux.bin diff --git a/arch/powerpc/boot/bamboo.c b/arch/powerpc/boot/bamboo.c index 54b33f1..b82cacb 100644 --- a/arch/powerpc/boot/bamboo.c +++ b/arch/powerpc/boot/bamboo.c @@ -33,7 +33,8 @@ static void bamboo_fixups(void) ibm440ep_fixup_clocks(sysclk, 11059200, 25000000); ibm4xx_sdram_fixup_memsize(); ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00); - dt_fixup_mac_addresses(bamboo_mac0, bamboo_mac1); + dt_fixup_mac_address_by_alias("ethernet0", bamboo_mac0); + dt_fixup_mac_address_by_alias("ethernet1", bamboo_mac1); } void bamboo_init(void *mac0, void *mac1) diff --git a/arch/powerpc/boot/cuboot-rainier.c b/arch/powerpc/boot/cuboot-rainier.c index cf452b6..0a3fdde 100644 --- a/arch/powerpc/boot/cuboot-rainier.c +++ b/arch/powerpc/boot/cuboot-rainier.c @@ -42,7 +42,8 @@ static void rainier_fixups(void) ibm440ep_fixup_clocks(sysclk, 11059200, 50000000); ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); ibm4xx_denali_fixup_memsize(); - dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr); + dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); + dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr); } void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, diff --git a/arch/powerpc/boot/cuboot-sequoia.c b/arch/powerpc/boot/cuboot-sequoia.c index f555575..caf8f2e 100644 --- a/arch/powerpc/boot/cuboot-sequoia.c +++ b/arch/powerpc/boot/cuboot-sequoia.c @@ -42,7 +42,8 @@ static void sequoia_fixups(void) ibm440ep_fixup_clocks(sysclk, 11059200, 50000000); ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); ibm4xx_denali_fixup_memsize(); - dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr); + dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); + dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr); } void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, diff --git a/arch/powerpc/boot/cuboot-taishan.c b/arch/powerpc/boot/cuboot-taishan.c index b55b804..9bc906a 100644 --- a/arch/powerpc/boot/cuboot-taishan.c +++ b/arch/powerpc/boot/cuboot-taishan.c @@ -40,7 +40,8 @@ static void taishan_fixups(void) ibm4xx_sdram_fixup_memsize(); - dt_fixup_mac_addresses(bd.bi_enetaddr, bd.bi_enet1addr); + dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); + dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr); ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); } diff --git a/arch/powerpc/boot/cuboot-warp.c b/arch/powerpc/boot/cuboot-warp.c index 3db93e8..eb108a8 100644 --- a/arch/powerpc/boot/cuboot-warp.c +++ b/arch/powerpc/boot/cuboot-warp.c @@ -24,7 +24,7 @@ static void warp_fixups(void) ibm440ep_fixup_clocks(sysclk, 11059200, 50000000); ibm4xx_sdram_fixup_memsize(); ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); - dt_fixup_mac_addresses(&bd.bi_enetaddr); + dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); } diff --git a/arch/powerpc/boot/cuboot-yosemite.c b/arch/powerpc/boot/cuboot-yosemite.c new file mode 100644 index 0000000..cc6e338 --- /dev/null +++ b/arch/powerpc/boot/cuboot-yosemite.c @@ -0,0 +1,44 @@ +/* + * Old U-boot compatibility for Yosemite + * + * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com> + * + * Copyright 2008 IBM Corporation + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include "ops.h" +#include "stdio.h" +#include "4xx.h" +#include "44x.h" +#include "cuboot.h" + +#define TARGET_4xx +#define TARGET_44x +#include "ppcboot.h" + +static bd_t bd; + +static void yosemite_fixups(void) +{ + unsigned long sysclk = 66666666; + + ibm440ep_fixup_clocks(sysclk, 11059200, 50000000); + ibm4xx_sdram_fixup_memsize(); + ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00); + dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); + dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr); +} + +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7) +{ + CUBOOT_INIT(); + platform_ops.fixups = yosemite_fixups; + platform_ops.exit = ibm44x_dbcr_reset; + fdt_init(_dtb_start); + serial_console_init(); +} diff --git a/arch/powerpc/boot/dts/bamboo.dts b/arch/powerpc/boot/dts/bamboo.dts index 7dc37c9..ba2521b 100644 --- a/arch/powerpc/boot/dts/bamboo.dts +++ b/arch/powerpc/boot/dts/bamboo.dts @@ -204,7 +204,6 @@ }; EMAC0: ethernet@ef600e00 { - linux,network-index = <0>; device_type = "network"; compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; interrupt-parent = <&UIC1>; @@ -225,7 +224,6 @@ }; EMAC1: ethernet@ef600f00 { - linux,network-index = <1>; device_type = "network"; compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; interrupt-parent = <&UIC1>; diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts new file mode 100644 index 0000000..6f3d38a --- /dev/null +++ b/arch/powerpc/boot/dts/canyonlands.dts @@ -0,0 +1,402 @@ +/* + * Device Tree Source for AMCC Canyonlands (460EX) + * + * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + */ + +/ { + #address-cells = <2>; + #size-cells = <1>; + model = "amcc,canyonlands"; + compatible = "amcc,canyonlands"; + dcr-parent = <&/cpus/cpu@0>; + + aliases { + ethernet0 = &EMAC0; + ethernet1 = &EMAC1; + serial0 = &UART0; + serial1 = &UART1; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + model = "PowerPC,460EX"; + reg = <0>; + clock-frequency = <0>; /* Filled in by U-Boot */ + timebase-frequency = <0>; /* Filled in by U-Boot */ + i-cache-line-size = <20>; + d-cache-line-size = <20>; + i-cache-size = <8000>; + d-cache-size = <8000>; + dcr-controller; + dcr-access-method = "native"; + }; + }; + + memory { + device_type = "memory"; + reg = <0 0 0>; /* Filled in by U-Boot */ + }; + + UIC0: interrupt-controller0 { + compatible = "ibm,uic-460ex","ibm,uic"; + interrupt-controller; + cell-index = <0>; + dcr-reg = <0c0 009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + }; + + UIC1: interrupt-controller1 { + compatible = "ibm,uic-460ex","ibm,uic"; + interrupt-controller; + cell-index = <1>; + dcr-reg = <0d0 009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <1e 4 1f 4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + UIC2: interrupt-controller2 { + compatible = "ibm,uic-460ex","ibm,uic"; + interrupt-controller; + cell-index = <2>; + dcr-reg = <0e0 009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <a 4 b 4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + UIC3: interrupt-controller3 { + compatible = "ibm,uic-460ex","ibm,uic"; + interrupt-controller; + cell-index = <3>; + dcr-reg = <0f0 009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <10 4 11 4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + SDR0: sdr { + compatible = "ibm,sdr-460ex"; + dcr-reg = <00e 002>; + }; + + CPR0: cpr { + compatible = "ibm,cpr-460ex"; + dcr-reg = <00c 002>; + }; + + plb { + compatible = "ibm,plb-460ex", "ibm,plb4"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + clock-frequency = <0>; /* Filled in by U-Boot */ + + SDRAM0: sdram { + compatible = "ibm,sdram-460ex", "ibm,sdram-405gp"; + dcr-reg = <010 2>; + }; + + MAL0: mcmal { + compatible = "ibm,mcmal-460ex", "ibm,mcmal2"; + dcr-reg = <180 62>; + num-tx-chans = <2>; + num-rx-chans = <10>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-parent = <&UIC2>; + interrupts = < /*TXEOB*/ 6 4 + /*RXEOB*/ 7 4 + /*SERR*/ 3 4 + /*TXDE*/ 4 4 + /*RXDE*/ 5 4>; + }; + + POB0: opb { + compatible = "ibm,opb-460ex", "ibm,opb"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <b0000000 4 b0000000 50000000>; + clock-frequency = <0>; /* Filled in by U-Boot */ + + EBC0: ebc { + compatible = "ibm,ebc-460ex", "ibm,ebc"; + dcr-reg = <012 2>; + #address-cells = <2>; + #size-cells = <1>; + clock-frequency = <0>; /* Filled in by U-Boot */ + interrupts = <6 4>; + interrupt-parent = <&UIC1>; + }; + + UART0: serial@ef600300 { + device_type = "serial"; + compatible = "ns16550"; + reg = <ef600300 8>; + virtual-reg = <ef600300>; + clock-frequency = <0>; /* Filled in by U-Boot */ + current-speed = <0>; /* Filled in by U-Boot */ + interrupt-parent = <&UIC1>; + interrupts = <1 4>; + }; + + UART1: serial@ef600400 { + device_type = "serial"; + compatible = "ns16550"; + reg = <ef600400 8>; + virtual-reg = <ef600400>; + clock-frequency = <0>; /* Filled in by U-Boot */ + current-speed = <0>; /* Filled in by U-Boot */ + interrupt-parent = <&UIC0>; + interrupts = <1 4>; + }; + + UART2: serial@ef600500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <ef600500 8>; + virtual-reg = <ef600500>; + clock-frequency = <0>; /* Filled in by U-Boot */ + current-speed = <0>; /* Filled in by U-Boot */ + interrupt-parent = <&UIC1>; + interrupts = <1d 4>; + }; + + UART3: serial@ef600600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <ef600600 8>; + virtual-reg = <ef600600>; + clock-frequency = <0>; /* Filled in by U-Boot */ + current-speed = <0>; /* Filled in by U-Boot */ + interrupt-parent = <&UIC1>; + interrupts = <1e 4>; + }; + + IIC0: i2c@ef600700 { + compatible = "ibm,iic-460ex", "ibm,iic"; + reg = <ef600700 14>; + interrupt-parent = <&UIC0>; + interrupts = <2 4>; + }; + + IIC1: i2c@ef600800 { + compatible = "ibm,iic-460ex", "ibm,iic"; + reg = <ef600800 14>; + interrupt-parent = <&UIC0>; + interrupts = <3 4>; + }; + + ZMII0: emac-zmii@ef600d00 { + compatible = "ibm,zmii-460ex", "ibm,zmii"; + reg = <ef600d00 c>; + }; + + RGMII0: emac-rgmii@ef601500 { + compatible = "ibm,rgmii-460ex", "ibm,rgmii"; + reg = <ef601500 8>; + has-mdio; + }; + + TAH0: emac-tah@ef601350 { + compatible = "ibm,tah-460ex", "ibm,tah"; + reg = <ef601350 30>; + }; + + TAH1: emac-tah@ef601450 { + compatible = "ibm,tah-460ex", "ibm,tah"; + reg = <ef601450 30>; + }; + + EMAC0: ethernet@ef600e00 { + device_type = "network"; + compatible = "ibm,emac-460ex", "ibm,emac4"; + interrupt-parent = <&EMAC0>; + interrupts = <0 1>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = </*Status*/ 0 &UIC2 10 4 + /*Wake*/ 1 &UIC2 14 4>; + reg = <ef600e00 70>; + local-mac-address = [000000000000]; /* Filled in by U-Boot */ + mal-device = <&MAL0>; + mal-tx-channel = <0>; + mal-rx-channel = <0>; + cell-index = <0>; + max-frame-size = <2328>; + rx-fifo-size = <1000>; + tx-fifo-size = <800>; + phy-mode = "rgmii"; + phy-map = <00000000>; + rgmii-device = <&RGMII0>; + rgmii-channel = <0>; + tah-device = <&TAH0>; + tah-channel = <0>; + has-inverted-stacr-oc; + has-new-stacr-staopc; + }; + + EMAC1: ethernet@ef600f00 { + device_type = "network"; + compatible = "ibm,emac-460ex", "ibm,emac4"; + interrupt-parent = <&EMAC1>; + interrupts = <0 1>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = </*Status*/ 0 &UIC2 11 4 + /*Wake*/ 1 &UIC2 15 4>; + reg = <ef600f00 70>; + local-mac-address = [000000000000]; /* Filled in by U-Boot */ + mal-device = <&MAL0>; + mal-tx-channel = <1>; + mal-rx-channel = <8>; + cell-index = <1>; + max-frame-size = <2328>; + rx-fifo-size = <1000>; + tx-fifo-size = <800>; + phy-mode = "rgmii"; + phy-map = <00000000>; + rgmii-device = <&RGMII0>; + rgmii-channel = <1>; + tah-device = <&TAH1>; + tah-channel = <1>; + has-inverted-stacr-oc; + has-new-stacr-staopc; + mdio-device = <&EMAC0>; + }; + }; + + PCIX0: pci@c0ec00000 { + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "ibm,plb-pcix-460ex", "ibm,plb-pcix"; + primary; + large-inbound-windows; + enable-msi-hole; + reg = <c 0ec00000 8 /* Config space access */ + 0 0 0 /* no IACK cycles */ + c 0ed00000 4 /* Special cycles */ + c 0ec80000 100 /* Internal registers */ + c 0ec80100 fc>; /* Internal messaging registers */ + + /* Outbound ranges, one memory and one IO, + * later cannot be changed + */ + ranges = <02000000 0 80000000 0000000d 80000000 0 80000000 + 01000000 0 00000000 0000000c 08000000 0 00010000>; + + /* Inbound 2GB range starting at 0 */ + dma-ranges = <42000000 0 0 0 0 0 80000000>; + + /* This drives busses 0 to 0x3f */ + bus-range = <0 3f>; + + /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ + interrupt-map-mask = <0000 0 0 0>; + interrupt-map = < 0000 0 0 0 &UIC1 0 8 >; + }; + + PCIE0: pciex@d00000000 { + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; + primary; + port = <0>; /* port number */ + reg = <d 00000000 20000000 /* Config space access */ + c 08010000 00001000>; /* Registers */ + dcr-reg = <100 020>; + sdr-base = <300>; + + /* Outbound ranges, one memory and one IO, + * later cannot be changed + */ + ranges = <02000000 0 80000000 0000000e 00000000 0 80000000 + 01000000 0 00000000 0000000f 80000000 0 00010000>; + + /* Inbound 2GB range starting at 0 */ + dma-ranges = <42000000 0 0 0 0 0 80000000>; + + /* This drives busses 40 to 0x7f */ + bus-range = <40 7f>; + + /* Legacy interrupts (note the weird polarity, the bridge seems + * to invert PCIe legacy interrupts). + * We are de-swizzling here because the numbers are actually for + * port of the root complex virtual P2P bridge. But I want + * to avoid putting a node for it in the tree, so the numbers + * below are basically de-swizzled numbers. + * The real slot is on idsel 0, so the swizzling is 1:1 + */ + interrupt-map-mask = <0000 0 0 7>; + interrupt-map = < + 0000 0 0 1 &UIC3 c 4 /* swizzled int A */ + 0000 0 0 2 &UIC3 d 4 /* swizzled int B */ + 0000 0 0 3 &UIC3 e 4 /* swizzled int C */ + 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>; + }; + + PCIE1: pciex@d20000000 { + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; + primary; + port = <1>; /* port number */ + reg = <d 20000000 20000000 /* Config space access */ + c 08011000 00001000>; /* Registers */ + dcr-reg = <120 020>; + sdr-base = <340>; + + /* Outbound ranges, one memory and one IO, + * later cannot be changed + */ + ranges = <02000000 0 80000000 0000000e 80000000 0 80000000 + 01000000 0 00000000 0000000f 80010000 0 00010000>; + + /* Inbound 2GB range starting at 0 */ + dma-ranges = <42000000 0 0 0 0 0 80000000>; + + /* This drives busses 80 to 0xbf */ + bus-range = <80 bf>; + + /* Legacy interrupts (note the weird polarity, the bridge seems + * to invert PCIe legacy interrupts). + * We are de-swizzling here because the numbers are actually for + * port of the root complex virtual P2P bridge. But I want + * to avoid putting a node for it in the tree, so the numbers + * below are basically de-swizzled numbers. + * The real slot is on idsel 0, so the swizzling is 1:1 + */ + interrupt-map-mask = <0000 0 0 7>; + interrupt-map = < + 0000 0 0 1 &UIC3 10 4 /* swizzled int A */ + 0000 0 0 2 &UIC3 11 4 /* swizzled int B */ + 0000 0 0 3 &UIC3 12 4 /* swizzled int C */ + 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/cm5200.dts b/arch/powerpc/boot/dts/cm5200.dts index 30737ea..c6ca631 100644 --- a/arch/powerpc/boot/dts/cm5200.dts +++ b/arch/powerpc/boot/dts/cm5200.dts @@ -212,13 +212,30 @@ ethernet@3000 { device_type = "network"; compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; - reg = <3000 800>; + reg = <3000 400>; local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <2 5 0>; interrupt-parent = <&mpc5200_pic>; + phy-handle = <&phy0>; + }; + + mdio@3000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; + reg = <3000 400>; // fec range, since we need to setup fec interrupts + interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. + interrupt-parent = <&mpc5200_pic>; + + phy0: ethernet-phy@0 { + device_type = "ethernet-phy"; + reg = <0>; + }; }; i2c@3d40 { + #address-cells = <1>; + #size-cells = <0>; compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; reg = <3d40 40>; interrupts = <2 10 0>; @@ -231,4 +248,22 @@ reg = <8000 4000>; }; }; + + lpb { + model = "fsl,lpb"; + compatible = "fsl,lpb"; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 fc000000 2000000>; + + // 16-bit flash device at LocalPlus Bus CS0 + flash@0,0 { + compatible = "cfi-flash"; + reg = <0 0 2000000>; + bank-width = <2>; + device-width = <2>; + #size-cells = <1>; + #address-cells = <1>; + }; + }; }; diff --git a/arch/powerpc/boot/dts/ebony.dts b/arch/powerpc/boot/dts/ebony.dts index 0b000cb..5079dc8 100644 --- a/arch/powerpc/boot/dts/ebony.dts +++ b/arch/powerpc/boot/dts/ebony.dts @@ -241,7 +241,6 @@ }; EMAC0: ethernet@40000800 { - linux,network-index = <0>; device_type = "network"; compatible = "ibm,emac-440gp", "ibm,emac"; interrupt-parent = <&UIC1>; @@ -261,7 +260,6 @@ zmii-channel = <0>; }; EMAC1: ethernet@40000900 { - linux,network-index = <1>; device_type = "network"; compatible = "ibm,emac-440gp", "ibm,emac"; interrupt-parent = <&UIC1>; diff --git a/arch/powerpc/boot/dts/glacier.dts b/arch/powerpc/boot/dts/glacier.dts new file mode 100644 index 0000000..958a5ca --- /dev/null +++ b/arch/powerpc/boot/dts/glacier.dts @@ -0,0 +1,467 @@ +/* + * Device Tree Source for AMCC Glacier (460GT) + * + * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + */ + +/ { + #address-cells = <2>; + #size-cells = <1>; + model = "amcc,glacier"; + compatible = "amcc,glacier", "amcc,canyonlands"; + dcr-parent = <&/cpus/cpu@0>; + + aliases { + ethernet0 = &EMAC0; + ethernet1 = &EMAC1; + ethernet2 = &EMAC2; + ethernet3 = &EMAC3; + serial0 = &UART0; + serial1 = &UART1; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + model = "PowerPC,460GT"; + reg = <0>; + clock-frequency = <0>; /* Filled in by U-Boot */ + timebase-frequency = <0>; /* Filled in by U-Boot */ + i-cache-line-size = <20>; + d-cache-line-size = <20>; + i-cache-size = <8000>; + d-cache-size = <8000>; + dcr-controller; + dcr-access-method = "native"; + }; + }; + + memory { + device_type = "memory"; + reg = <0 0 0>; /* Filled in by U-Boot */ + }; + + UIC0: interrupt-controller0 { + compatible = "ibm,uic-460gt","ibm,uic"; + interrupt-controller; + cell-index = <0>; + dcr-reg = <0c0 009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + }; + + UIC1: interrupt-controller1 { + compatible = "ibm,uic-460gt","ibm,uic"; + interrupt-controller; + cell-index = <1>; + dcr-reg = <0d0 009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <1e 4 1f 4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + UIC2: interrupt-controller2 { + compatible = "ibm,uic-460gt","ibm,uic"; + interrupt-controller; + cell-index = <2>; + dcr-reg = <0e0 009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <a 4 b 4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + UIC3: interrupt-controller3 { + compatible = "ibm,uic-460gt","ibm,uic"; + interrupt-controller; + cell-index = <3>; + dcr-reg = <0f0 009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <10 4 11 4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + SDR0: sdr { + compatible = "ibm,sdr-460gt"; + dcr-reg = <00e 002>; + }; + + CPR0: cpr { + compatible = "ibm,cpr-460gt"; + dcr-reg = <00c 002>; + }; + + plb { + compatible = "ibm,plb-460gt", "ibm,plb4"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + clock-frequency = <0>; /* Filled in by U-Boot */ + + SDRAM0: sdram { + compatible = "ibm,sdram-460gt", "ibm,sdram-405gp"; + dcr-reg = <010 2>; + }; + + MAL0: mcmal { + compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; + dcr-reg = <180 62>; + num-tx-chans = <4>; + num-rx-chans = <20>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-parent = <&UIC2>; + interrupts = < /*TXEOB*/ 6 4 + /*RXEOB*/ 7 4 + /*SERR*/ 3 4 + /*TXDE*/ 4 4 + /*RXDE*/ 5 4>; + desc-base-addr-high = <8>; + }; + + POB0: opb { + compatible = "ibm,opb-460gt", "ibm,opb"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <b0000000 4 b0000000 50000000>; + clock-frequency = <0>; /* Filled in by U-Boot */ + + EBC0: ebc { + compatible = "ibm,ebc-460gt", "ibm,ebc"; + dcr-reg = <012 2>; + #address-cells = <2>; + #size-cells = <1>; + clock-frequency = <0>; /* Filled in by U-Boot */ + interrupts = <6 4>; + interrupt-parent = <&UIC1>; + }; + + UART0: serial@ef600300 { + device_type = "serial"; + compatible = "ns16550"; + reg = <ef600300 8>; + virtual-reg = <ef600300>; + clock-frequency = <0>; /* Filled in by U-Boot */ + current-speed = <0>; /* Filled in by U-Boot */ + interrupt-parent = <&UIC1>; + interrupts = <1 4>; + }; + + UART1: serial@ef600400 { + device_type = "serial"; + compatible = "ns16550"; + reg = <ef600400 8>; + virtual-reg = <ef600400>; + clock-frequency = <0>; /* Filled in by U-Boot */ + current-speed = <0>; /* Filled in by U-Boot */ + interrupt-parent = <&UIC0>; + interrupts = <1 4>; + }; + + UART2: serial@ef600500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <ef600500 8>; + virtual-reg = <ef600500>; + clock-frequency = <0>; /* Filled in by U-Boot */ + current-speed = <0>; /* Filled in by U-Boot */ + interrupt-parent = <&UIC1>; + interrupts = <1d 4>; + }; + + UART3: serial@ef600600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <ef600600 8>; + virtual-reg = <ef600600>; + clock-frequency = <0>; /* Filled in by U-Boot */ + current-speed = <0>; /* Filled in by U-Boot */ + interrupt-parent = <&UIC1>; + interrupts = <1e 4>; + }; + + IIC0: i2c@ef600700 { + compatible = "ibm,iic-460gt", "ibm,iic"; + reg = <ef600700 14>; + interrupt-parent = <&UIC0>; + interrupts = <2 4>; + }; + + IIC1: i2c@ef600800 { + compatible = "ibm,iic-460gt", "ibm,iic"; + reg = <ef600800 14>; + interrupt-parent = <&UIC0>; + interrupts = <3 4>; + }; + + ZMII0: emac-zmii@ef600d00 { + compatible = "ibm,zmii-460gt", "ibm,zmii"; + reg = <ef600d00 c>; + }; + + RGMII0: emac-rgmii@ef601500 { + compatible = "ibm,rgmii-460gt", "ibm,rgmii"; + reg = <ef601500 8>; + has-mdio; + }; + + RGMII1: emac-rgmii@ef601600 { + compatible = "ibm,rgmii-460gt", "ibm,rgmii"; + reg = <ef601600 8>; + has-mdio; + }; + + TAH0: emac-tah@ef601350 { + compatible = "ibm,tah-460gt", "ibm,tah"; + reg = <ef601350 30>; + }; + + TAH1: emac-tah@ef601450 { + compatible = "ibm,tah-460gt", "ibm,tah"; + reg = <ef601450 30>; + }; + + EMAC0: ethernet@ef600e00 { + device_type = "network"; + compatible = "ibm,emac-460gt", "ibm,emac4"; + interrupt-parent = <&EMAC0>; + interrupts = <0 1>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = </*Status*/ 0 &UIC2 10 4 + /*Wake*/ 1 &UIC2 14 4>; + reg = <ef600e00 70>; + local-mac-address = [000000000000]; /* Filled in by U-Boot */ + mal-device = <&MAL0>; + mal-tx-channel = <0>; + mal-rx-channel = <0>; + cell-index = <0>; + max-frame-size = <2328>; + rx-fifo-size = <1000>; + tx-fifo-size = <800>; + phy-mode = "rgmii"; + phy-map = <00000000>; + rgmii-device = <&RGMII0>; + rgmii-channel = <0>; + tah-device = <&TAH0>; + tah-channel = <0>; + has-inverted-stacr-oc; + has-new-stacr-staopc; + }; + + EMAC1: ethernet@ef600f00 { + device_type = "network"; + compatible = "ibm,emac-460gt", "ibm,emac4"; + interrupt-parent = <&EMAC1>; + interrupts = <0 1>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = </*Status*/ 0 &UIC2 11 4 + /*Wake*/ 1 &UIC2 15 4>; + reg = <ef600f00 70>; + local-mac-address = [000000000000]; /* Filled in by U-Boot */ + mal-device = <&MAL0>; + mal-tx-channel = <1>; + mal-rx-channel = <8>; + cell-index = <1>; + max-frame-size = <2328>; + rx-fifo-size = <1000>; + tx-fifo-size = <800>; + phy-mode = "rgmii"; + phy-map = <00000000>; + rgmii-device = <&RGMII0>; + rgmii-channel = <1>; + tah-device = <&TAH1>; + tah-channel = <1>; + has-inverted-stacr-oc; + has-new-stacr-staopc; + mdio-device = <&EMAC0>; + }; + + EMAC2: ethernet@ef601100 { + device_type = "network"; + compatible = "ibm,emac-460gt", "ibm,emac4"; + interrupt-parent = <&EMAC2>; + interrupts = <0 1>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = </*Status*/ 0 &UIC2 12 4 + /*Wake*/ 1 &UIC2 16 4>; + reg = <ef601100 70>; + local-mac-address = [000000000000]; /* Filled in by U-Boot */ + mal-device = <&MAL0>; + mal-tx-channel = <2>; + mal-rx-channel = <10>; + cell-index = <2>; + max-frame-size = <2328>; + rx-fifo-size = <1000>; + tx-fifo-size = <800>; + phy-mode = "rgmii"; + phy-map = <00000000>; + rgmii-device = <&RGMII1>; + rgmii-channel = <0>; + has-inverted-stacr-oc; + has-new-stacr-staopc; + mdio-device = <&EMAC0>; + }; + + EMAC3: ethernet@ef601200 { + device_type = "network"; + compatible = "ibm,emac-460gt", "ibm,emac4"; + interrupt-parent = <&EMAC3>; + interrupts = <0 1>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = </*Status*/ 0 &UIC2 13 4 + /*Wake*/ 1 &UIC2 17 4>; + reg = <ef601200 70>; + local-mac-address = [000000000000]; /* Filled in by U-Boot */ + mal-device = <&MAL0>; + mal-tx-channel = <3>; + mal-rx-channel = <18>; + cell-index = <3>; + max-frame-size = <2328>; + rx-fifo-size = <1000>; + tx-fifo-size = <800>; + phy-mode = "rgmii"; + phy-map = <00000000>; + rgmii-device = <&RGMII1>; + rgmii-channel = <1>; + has-inverted-stacr-oc; + has-new-stacr-staopc; + mdio-device = <&EMAC0>; + }; + }; + + PCIX0: pci@c0ec00000 { + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "ibm,plb-pcix-460gt", "ibm,plb-pcix"; + primary; + large-inbound-windows; + enable-msi-hole; + reg = <c 0ec00000 8 /* Config space access */ + 0 0 0 /* no IACK cycles */ + c 0ed00000 4 /* Special cycles */ + c 0ec80000 100 /* Internal registers */ + c 0ec80100 fc>; /* Internal messaging registers */ + + /* Outbound ranges, one memory and one IO, + * later cannot be changed + */ + ranges = <02000000 0 80000000 0000000d 80000000 0 80000000 + 01000000 0 00000000 0000000c 08000000 0 00010000>; + + /* Inbound 2GB range starting at 0 */ + dma-ranges = <42000000 0 0 0 0 0 80000000>; + + /* This drives busses 0 to 0x3f */ + bus-range = <0 3f>; + + /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ + interrupt-map-mask = <0000 0 0 0>; + interrupt-map = < 0000 0 0 0 &UIC1 0 8 >; + }; + + PCIE0: pciex@d00000000 { + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; + primary; + port = <0>; /* port number */ + reg = <d 00000000 20000000 /* Config space access */ + c 08010000 00001000>; /* Registers */ + dcr-reg = <100 020>; + sdr-base = <300>; + + /* Outbound ranges, one memory and one IO, + * later cannot be changed + */ + ranges = <02000000 0 80000000 0000000e 00000000 0 80000000 + 01000000 0 00000000 0000000f 80000000 0 00010000>; + + /* Inbound 2GB range starting at 0 */ + dma-ranges = <42000000 0 0 0 0 0 80000000>; + + /* This drives busses 40 to 0x7f */ + bus-range = <40 7f>; + + /* Legacy interrupts (note the weird polarity, the bridge seems + * to invert PCIe legacy interrupts). + * We are de-swizzling here because the numbers are actually for + * port of the root complex virtual P2P bridge. But I want + * to avoid putting a node for it in the tree, so the numbers + * below are basically de-swizzled numbers. + * The real slot is on idsel 0, so the swizzling is 1:1 + */ + interrupt-map-mask = <0000 0 0 7>; + interrupt-map = < + 0000 0 0 1 &UIC3 c 4 /* swizzled int A */ + 0000 0 0 2 &UIC3 d 4 /* swizzled int B */ + 0000 0 0 3 &UIC3 e 4 /* swizzled int C */ + 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>; + }; + + PCIE1: pciex@d20000000 { + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; + primary; + port = <1>; /* port number */ + reg = <d 20000000 20000000 /* Config space access */ + c 08011000 00001000>; /* Registers */ + dcr-reg = <120 020>; + sdr-base = <340>; + + /* Outbound ranges, one memory and one IO, + * later cannot be changed + */ + ranges = <02000000 0 80000000 0000000e 80000000 0 80000000 + 01000000 0 00000000 0000000f 80010000 0 00010000>; + + /* Inbound 2GB range starting at 0 */ + dma-ranges = <42000000 0 0 0 0 0 80000000>; + + /* This drives busses 80 to 0xbf */ + bus-range = <80 bf>; + + /* Legacy interrupts (note the weird polarity, the bridge seems + * to invert PCIe legacy interrupts). + * We are de-swizzling here because the numbers are actually for + * port of the root complex virtual P2P bridge. But I want + * to avoid putting a node for it in the tree, so the numbers + * below are basically de-swizzled numbers. + * The real slot is on idsel 0, so the swizzling is 1:1 + */ + interrupt-map-mask = <0000 0 0 7>; + interrupt-map = < + 0000 0 0 1 &UIC3 10 4 /* swizzled int A */ + 0000 0 0 2 &UIC3 11 4 /* swizzled int B */ + 0000 0 0 3 &UIC3 12 4 /* swizzled int C */ + 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>; + }; + }; +}; diff --git a/arch/powerpc/boot/dts/haleakala.dts b/arch/powerpc/boot/dts/haleakala.dts index ae68fef..b5d95ac 100644 --- a/arch/powerpc/boot/dts/haleakala.dts +++ b/arch/powerpc/boot/dts/haleakala.dts @@ -12,7 +12,7 @@ #address-cells = <1>; #size-cells = <1>; model = "amcc,haleakala"; - compatible = "amcc,kilauea"; + compatible = "amcc,haleakala", "amcc,kilauea"; dcr-parent = <&/cpus/cpu@0>; aliases { @@ -218,7 +218,7 @@ mal-tx-channel = <0>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <5dc>; + max-frame-size = <2328>; rx-fifo-size = <1000>; tx-fifo-size = <800>; phy-mode = "rgmii"; diff --git a/arch/powerpc/boot/dts/katmai.dts b/arch/powerpc/boot/dts/katmai.dts index fc86e5a..cc2873a 100644 --- a/arch/powerpc/boot/dts/katmai.dts +++ b/arch/powerpc/boot/dts/katmai.dts @@ -212,7 +212,7 @@ mal-tx-channel = <0>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <5dc>; + max-frame-size = <2328>; rx-fifo-size = <1000>; tx-fifo-size = <800>; phy-mode = "gmii"; diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts index 8baef61..48c9a6e 100644 --- a/arch/powerpc/boot/dts/kilauea.dts +++ b/arch/powerpc/boot/dts/kilauea.dts @@ -219,7 +219,7 @@ mal-tx-channel = <0>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <5dc>; + max-frame-size = <2328>; rx-fifo-size = <1000>; tx-fifo-size = <800>; phy-mode = "rgmii"; @@ -247,7 +247,7 @@ mal-tx-channel = <1>; mal-rx-channel = <1>; cell-index = <1>; - max-frame-size = <5dc>; + max-frame-size = <2328>; rx-fifo-size = <1000>; tx-fifo-size = <800>; phy-mode = "rgmii"; diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts new file mode 100644 index 0000000..f869ce3 --- /dev/null +++ b/arch/powerpc/boot/dts/ksi8560.dts @@ -0,0 +1,267 @@ +/* + * Device Tree Source for Emerson KSI8560 + * + * Author: Alexandr Smirnov <asmirnov@ru.mvista.com> + * + * Based on mpc8560ads.dts + * + * 2008 (c) MontaVista, Software, Inc. This file is licensed under + * the terms of the GNU General Public License version 2. This program + * is licensed "as is" without any warranty of any kind, whether express + * or implied. + * + */ + +/dts-v1/; + +/ { + model = "KSI8560"; + compatible = "emerson,KSI8560"; + #address-cells = <1>; + #size-cells = <1>; + + aliases { + ethernet0 = &enet0; + ethernet1 = &enet1; + ethernet2 = &enet2; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + PowerPC,8560@0 { + device_type = "cpu"; + reg = <0>; + d-cache-line-size = <32>; + i-cache-line-size = <32>; + d-cache-size = <0x8000>; /* L1, 32K */ + i-cache-size = <0x8000>; /* L1, 32K */ + timebase-frequency = <0>; /* From U-boot */ + bus-frequency = <0>; /* From U-boot */ + clock-frequency = <0>; /* From U-boot */ + }; + }; + + memory { + device_type = "memory"; + reg = <0x00000000 0x10000000>; /* Fixed by bootwrapper */ + }; + + soc@fdf00000 { + #address-cells = <1>; + #size-cells = <1>; + device_type = "soc"; + ranges = <0x00000000 0xfdf00000 0x00100000>; + bus-frequency = <0>; /* Fixed by bootwrapper */ + + memory-controller@2000 { + compatible = "fsl,8540-memory-controller"; + reg = <0x2000 0x1000>; + interrupt-parent = <&MPIC>; + interrupts = <0x12 0x2>; + }; + + l2-cache-controller@20000 { + compatible = "fsl,8540-l2-cache-controller"; + reg = <0x20000 0x1000>; + cache-line-size = <0x20>; /* 32 bytes */ + cache-size = <0x40000>; /* L2, 256K */ + interrupt-parent = <&MPIC>; + interrupts = <0x10 0x2>; + }; + + i2c@3000 { + #address-cells = <1>; + #size-cells = <0>; + cell-index = <0>; + compatible = "fsl-i2c"; + reg = <0x3000 0x100>; + interrupts = <0x2b 0x2>; + interrupt-parent = <&MPIC>; + dfsrr; + }; + + mdio@24520 { /* For TSECs */ + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,gianfar-mdio"; + reg = <0x24520 0x20>; + + PHY1: ethernet-phy@1 { + interrupt-parent = <&MPIC>; + reg = <0x1>; + device_type = "ethernet-phy"; + }; + + PHY2: ethernet-phy@2 { + interrupt-parent = <&MPIC>; + reg = <0x2>; + device_type = "ethernet-phy"; + }; + }; + + enet0: ethernet@24000 { + device_type = "network"; + model = "TSEC"; + compatible = "gianfar"; + reg = <0x24000 0x1000>; + /* Mac address filled in by bootwrapper */ + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; + interrupt-parent = <&MPIC>; + phy-handle = <&PHY1>; + }; + + enet1: ethernet@25000 { + device_type = "network"; + model = "TSEC"; + compatible = "gianfar"; + reg = <0x25000 0x1000>; + /* Mac address filled in by bootwrapper */ + local-mac-address = [ 00 00 00 00 00 00 ]; + interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; + interrupt-parent = <&MPIC>; + phy-handle = <&PHY2>; + }; + + MPIC: pic@40000 { + #address-cells = <0>; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0x40000 0x40000>; + device_type = "open-pic"; + }; + + cpm@919c0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8560-cpm", "fsl,cpm2"; + reg = <0x919c0 0x30>; + ranges; + + muram@80000 { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x80000 0x10000>; + + data@0 { + compatible = "fsl,cpm-muram-data"; + reg = <0x0 0x4000 0x9000 0x2000>; + }; + }; + + brg@919f0 { + compatible = "fsl,mpc8560-brg", + "fsl,cpm2-brg", + "fsl,cpm-brg"; + reg = <0x919f0 0x10 0x915f0 0x10>; + clock-frequency = <165000000>; /* 166MHz */ + }; + + CPMPIC: pic@90c00 { + #address-cells = <0>; + #interrupt-cells = <2>; + interrupt-controller; + interrupts = <0x2e 0x2>; + interrupt-parent = <&MPIC>; + reg = <0x90c00 0x80>; + compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; + }; + + serial@91a00 { + device_type = "serial"; + compatible = "fsl,mpc8560-scc-uart", + "fsl,cpm2-scc-uart"; + reg = <0x91a00 0x20 0x88000 0x100>; + fsl,cpm-brg = <1>; + fsl,cpm-command = <0x800000>; + current-speed = <0x1c200>; + interrupts = <0x28 0x8>; + interrupt-parent = <&CPMPIC>; + }; + + serial@91a20 { + device_type = "serial"; + compatible = "fsl,mpc8560-scc-uart", + "fsl,cpm2-scc-uart"; + reg = <0x91a20 0x20 0x88100 0x100>; + fsl,cpm-brg = <2>; + fsl,cpm-command = <0x4a00000>; + current-speed = <0x1c200>; + interrupts = <0x29 0x8>; + interrupt-parent = <&CPMPIC>; + }; + + mdio@90d00 { /* For FCCs */ + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,cpm2-mdio-bitbang"; + reg = <0x90d00 0x14>; + fsl,mdio-pin = <24>; + fsl,mdc-pin = <25>; + + PHY0: ethernet-phy@0 { + interrupt-parent = <&MPIC>; + reg = <0x0>; + device_type = "ethernet-phy"; + }; + }; + + enet2: ethernet@91300 { + device_type = "network"; + compatible = "fsl,mpc8560-fcc-enet", + "fsl,cpm2-fcc-enet"; + reg = <0x91300 0x20 0x88400 0x100 0x91390 0x1>; + /* Mac address filled in by bootwrapper */ + local-mac-address = [ 00 00 00 00 00 00 ]; + fsl,cpm-command = <0x12000300>; + interrupts = <0x20 0x8>; + interrupt-parent = <&CPMPIC>; + phy-handle = <&PHY0>; + }; + }; + }; + + localbus@fdf05000 { + #address-cells = <2>; + #size-cells = <1>; + compatible = "fsl,mpc8560-localbus"; + reg = <0xfdf05000 0x68>; + + ranges = <0x0 0x0 0xe0000000 0x00800000 + 0x4 0x0 0xe8080000 0x00080000>; + + flash@0,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec-flash"; + reg = <0x0 0x0 0x800000>; + bank-width = <0x2>; + + partition@0 { + label = "Primary Kernel"; + reg = <0x0 0x180000>; + }; + partition@180000 { + label = "Primary Filesystem"; + reg = <0x180000 0x580000>; + }; + partition@700000 { + label = "Monitor"; + reg = <0x300000 0x100000>; + read-only; + }; + }; + + cpld@4,0 { + compatible = "emerson,KSI8560-cpld"; + reg = <0x4 0x0 0x80000>; + }; + }; + + + chosen { + linux,stdout-path = "/soc/cpm/serial@91a00"; + }; +}; diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts index 0d701c1..09b4e16 100644 --- a/arch/powerpc/boot/dts/lite5200.dts +++ b/arch/powerpc/boot/dts/lite5200.dts @@ -258,6 +258,21 @@ local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <2 5 0>; interrupt-parent = <&mpc5200_pic>; + phy-handle = <&phy0>; + }; + + mdio@3000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,mpc5200-mdio"; + reg = <3000 400>; // fec range, since we need to setup fec interrupts + interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. + interrupt-parent = <&mpc5200_pic>; + + phy0:ethernet-phy@1 { + device_type = "ethernet-phy"; + reg = <1>; + }; }; ata@3a00 { diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts index 571ba02..2e9bc39 100644 --- a/arch/powerpc/boot/dts/lite5200b.dts +++ b/arch/powerpc/boot/dts/lite5200b.dts @@ -270,7 +270,7 @@ mdio@3000 { #address-cells = <1>; #size-cells = <0>; - compatible = "fsl,mpc5200b-mdio"; + compatible = "fsl,mpc5200b-mdio", "fsl,mpc5200-mdio"; reg = <3000 400>; // fec range, since we need to setup fec interrupts interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. interrupt-parent = <&mpc5200_pic>; diff --git a/arch/powerpc/boot/dts/makalu.dts b/arch/powerpc/boot/dts/makalu.dts index 710c011..84cc5e7 100644 --- a/arch/powerpc/boot/dts/makalu.dts +++ b/arch/powerpc/boot/dts/makalu.dts @@ -219,7 +219,7 @@ mal-tx-channel = <0>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <5dc>; + max-frame-size = <2328>; rx-fifo-size = <1000>; tx-fifo-size = <800>; phy-mode = "rgmii"; @@ -247,7 +247,7 @@ mal-tx-channel = <1>; mal-rx-channel = <1>; cell-index = <1>; - max-frame-size = <5dc>; + max-frame-size = <2328>; rx-fifo-size = <1000>; tx-fifo-size = <800>; phy-mode = "rgmii"; diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts index 76951ab..2b0dde0 100644 --- a/arch/powerpc/boot/dts/motionpro.dts +++ b/arch/powerpc/boot/dts/motionpro.dts @@ -148,7 +148,6 @@ interrupt-parent = <&mpc5200_pic>; }; - spi@f00 { compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi"; reg = <f00 20>; @@ -209,10 +208,25 @@ ethernet@3000 { device_type = "network"; compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec"; - reg = <3000 800>; + reg = <3000 400>; local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <2 5 0>; interrupt-parent = <&mpc5200_pic>; + phy-handle = <&phy0>; + }; + + mdio@3000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; + reg = <3000 400>; // fec range, since we need to setup fec interrupts + interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. + interrupt-parent = <&mpc5200_pic>; + + phy0: ethernet-phy@2 { + device_type = "ethernet-phy"; + reg = <2>; + }; }; ata@3a00 { @@ -223,11 +237,19 @@ }; i2c@3d40 { + #address-cells = <1>; + #size-cells = <0>; compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c"; reg = <3d40 40>; interrupts = <2 10 0>; interrupt-parent = <&mpc5200_pic>; fsl5200-clocking; + + rtc@68 { + device_type = "rtc"; + compatible = "dallas,ds1339"; + reg = <68>; + }; }; sram@8000 { @@ -240,7 +262,8 @@ compatible = "fsl,lpb"; #address-cells = <2>; #size-cells = <1>; - ranges = <1 0 50000000 00010000 + ranges = <0 0 ff000000 01000000 + 1 0 50000000 00010000 2 0 50010000 00010000 3 0 50020000 00010000>; @@ -271,31 +294,15 @@ compatible = "promess,pro_module_dio"; reg = <3 800 2>; }; - }; - pci@f0000d00 { - #interrupt-cells = <1>; - #size-cells = <2>; - #address-cells = <3>; - device_type = "pci"; - compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci"; - reg = <f0000d00 100>; - interrupt-map-mask = <f800 0 0 7>; - interrupt-map = <c000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot - c000 0 0 2 &mpc5200_pic 1 1 3 - c000 0 0 3 &mpc5200_pic 1 2 3 - c000 0 0 4 &mpc5200_pic 1 3 3 - - c800 0 0 1 &mpc5200_pic 1 1 3 // 2nd slot - c800 0 0 2 &mpc5200_pic 1 2 3 - c800 0 0 3 &mpc5200_pic 1 3 3 - c800 0 0 4 &mpc5200_pic 0 0 3>; - clock-frequency = <0>; // From boot loader - interrupts = <2 8 0 2 9 0 2 a 0>; - interrupt-parent = <&mpc5200_pic>; - bus-range = <0 0>; - ranges = <42000000 0 80000000 80000000 0 20000000 - 02000000 0 a0000000 a0000000 0 10000000 - 01000000 0 00000000 b0000000 0 01000000>; + // 16-bit flash device at LocalPlus Bus CS0 + flash@0,0 { + compatible = "cfi-flash"; + reg = <0 0 01000000>; + bank-width = <2>; + device-width = <2>; + #size-cells = <1>; + #address-cells = <1>; + }; }; }; diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts index 49c05e9..eac8e1b 100644 --- a/arch/powerpc/boot/dts/mpc8377_mds.dts +++ b/arch/powerpc/boot/dts/mpc8377_mds.dts @@ -255,14 +255,14 @@ }; sata@18000 { - compatible = "fsl,mpc8379-sata"; + compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; reg = <0x18000 0x1000>; interrupts = <44 0x8>; interrupt-parent = <&ipic>; }; sata@19000 { - compatible = "fsl,mpc8379-sata"; + compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; reg = <0x19000 0x1000>; interrupts = <45 0x8>; interrupt-parent = <&ipic>; diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts index 440aa4d..5bc09ad 100644 --- a/arch/powerpc/boot/dts/mpc8377_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts @@ -143,7 +143,6 @@ mode = "cpu"; }; - /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ usb@23000 { compatible = "fsl-usb2-dr"; reg = <0x23000 0x1000>; @@ -151,7 +150,7 @@ #size-cells = <0>; interrupt-parent = <&ipic>; interrupts = <38 0x8>; - phy_type = "utmi"; + phy_type = "ulpi"; }; mdio@24520 { diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts index 9271153..711f9a3 100644 --- a/arch/powerpc/boot/dts/mpc8378_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts @@ -143,7 +143,6 @@ mode = "cpu"; }; - /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ usb@23000 { compatible = "fsl-usb2-dr"; reg = <0x23000 0x1000>; @@ -151,7 +150,7 @@ #size-cells = <0>; interrupt-parent = <&ipic>; interrupts = <38 0x8>; - phy_type = "utmi"; + phy_type = "ulpi"; }; mdio@24520 { diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts index fdb4a92..6f78a9f 100644 --- a/arch/powerpc/boot/dts/mpc8379_mds.dts +++ b/arch/powerpc/boot/dts/mpc8379_mds.dts @@ -255,28 +255,28 @@ }; sata@18000 { - compatible = "fsl,mpc8379-sata"; + compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; reg = <0x18000 0x1000>; interrupts = <44 0x8>; interrupt-parent = <&ipic>; }; sata@19000 { - compatible = "fsl,mpc8379-sata"; + compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; reg = <0x19000 0x1000>; interrupts = <45 0x8>; interrupt-parent = <&ipic>; }; sata@1a000 { - compatible = "fsl,mpc8379-sata"; + compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; reg = <0x1a000 0x1000>; interrupts = <46 0x8>; interrupt-parent = <&ipic>; }; sata@1b000 { - compatible = "fsl,mpc8379-sata"; + compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; reg = <0x1b000 0x1000>; interrupts = <47 0x8>; interrupt-parent = <&ipic>; diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts index 0dda2fc..c11ceb7 100644 --- a/arch/powerpc/boot/dts/mpc8379_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts @@ -143,7 +143,6 @@ mode = "cpu"; }; - /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ usb@23000 { compatible = "fsl-usb2-dr"; reg = <0x23000 0x1000>; @@ -151,7 +150,7 @@ #size-cells = <0>; interrupt-parent = <&ipic>; interrupts = <38 0x8>; - phy_type = "utmi"; + phy_type = "ulpi"; }; mdio@24520 { diff --git a/arch/powerpc/boot/dts/prpmc2800.dts b/arch/powerpc/boot/dts/prpmc2800.dts index 297dfa5..1ee6ff4 100644 --- a/arch/powerpc/boot/dts/prpmc2800.dts +++ b/arch/powerpc/boot/dts/prpmc2800.dts @@ -11,6 +11,8 @@ * if it can determine the exact PrPMC type. */ +/dts-v1/; + / { #address-cells = <1>; #size-cells = <1>; @@ -25,46 +27,46 @@ PowerPC,7447 { device_type = "cpu"; reg = <0>; - clock-frequency = <2bb0b140>; /* Default (733 MHz) */ - bus-frequency = <7f28155>; /* 133.333333 MHz */ - timebase-frequency = <1fca055>; /* 33.333333 MHz */ - i-cache-line-size = <20>; - d-cache-line-size = <20>; - i-cache-size = <8000>; - d-cache-size = <8000>; + clock-frequency = <733333333>; /* Default */ + bus-frequency = <133333333>; + timebase-frequency = <33333333>; + i-cache-line-size = <32>; + d-cache-line-size = <32>; + i-cache-size = <32768>; + d-cache-size = <32768>; }; }; memory { device_type = "memory"; - reg = <00000000 20000000>; /* Default (512MB) */ + reg = <0x0 0x20000000>; /* Default (512MB) */ }; - mv64x60@f1000000 { /* Marvell Discovery */ + system-controller@f1000000 { /* Marvell Discovery mv64360 */ #address-cells = <1>; #size-cells = <1>; model = "mv64360"; /* Default */ - compatible = "marvell,mv64x60"; - clock-frequency = <7f28155>; /* 133.333333 MHz */ - reg = <f1000000 00010000>; - virtual-reg = <f1000000>; - ranges = <88000000 88000000 01000000 /* PCI 0 I/O Space */ - 80000000 80000000 08000000 /* PCI 0 MEM Space */ - a0000000 a0000000 04000000 /* User FLASH */ - 00000000 f1000000 00010000 /* Bridge's regs */ - f2000000 f2000000 00040000>; /* Integrated SRAM */ + compatible = "marvell,mv64360"; + clock-frequency = <133333333>; + reg = <0xf1000000 0x10000>; + virtual-reg = <0xf1000000>; + ranges = <0x88000000 0x88000000 0x1000000 /* PCI 0 I/O Space */ + 0x80000000 0x80000000 0x8000000 /* PCI 0 MEM Space */ + 0xa0000000 0xa0000000 0x4000000 /* User FLASH */ + 0x00000000 0xf1000000 0x0010000 /* Bridge's regs */ + 0xf2000000 0xf2000000 0x0040000>;/* Integrated SRAM */ flash@a0000000 { device_type = "rom"; compatible = "direct-mapped"; - reg = <a0000000 4000000>; /* Default (64MB) */ + reg = <0xa0000000 0x4000000>; /* Default (64MB) */ probe-type = "CFI"; bank-width = <4>; - partitions = <00000000 00100000 /* RO */ - 00100000 00040001 /* RW */ - 00140000 00400000 /* RO */ - 00540000 039c0000 /* RO */ - 03f00000 00100000>; /* RO */ + partitions = <0x00000000 0x00100000 /* RO */ + 0x00100000 0x00040001 /* RW */ + 0x00140000 0x00400000 /* RO */ + 0x00540000 0x039c0000 /* RO */ + 0x03f00000 0x00100000>; /* RO */ partition-names = "FW Image A", "FW Config Data", "Kernel Image", "Filesystem", "FW Image B"; }; @@ -72,171 +74,153 @@ #address-cells = <1>; #size-cells = <0>; device_type = "mdio"; - compatible = "marvell,mv64x60-mdio"; - ethernet-phy@1 { + compatible = "marvell,mv64360-mdio"; + PHY0: ethernet-phy@1 { device_type = "ethernet-phy"; compatible = "broadcom,bcm5421"; - interrupts = <4c>; /* GPP 12 */ - interrupt-parent = <&/mv64x60/pic>; + interrupts = <76>; /* GPP 12 */ + interrupt-parent = <&PIC>; reg = <1>; }; - ethernet-phy@3 { + PHY1: ethernet-phy@3 { device_type = "ethernet-phy"; compatible = "broadcom,bcm5421"; - interrupts = <4c>; /* GPP 12 */ - interrupt-parent = <&/mv64x60/pic>; + interrupts = <76>; /* GPP 12 */ + interrupt-parent = <&PIC>; reg = <3>; }; }; - ethernet@2000 { - reg = <2000 2000>; - eth0 { + ethernet-group@2000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "marvell,mv64360-eth-group"; + reg = <0x2000 0x2000>; + ethernet@0 { device_type = "network"; - compatible = "marvell,mv64x60-eth"; - block-index = <0>; - interrupts = <20>; - interrupt-parent = <&/mv64x60/pic>; - phy = <&/mv64x60/mdio/ethernet-phy@1>; + compatible = "marvell,mv64360-eth"; + reg = <0>; + interrupts = <32>; + interrupt-parent = <&PIC>; + phy = <&PHY0>; local-mac-address = [ 00 00 00 00 00 00 ]; }; - eth1 { + ethernet@1 { device_type = "network"; - compatible = "marvell,mv64x60-eth"; - block-index = <1>; - interrupts = <21>; - interrupt-parent = <&/mv64x60/pic>; - phy = <&/mv64x60/mdio/ethernet-phy@3>; + compatible = "marvell,mv64360-eth"; + reg = <1>; + interrupts = <33>; + interrupt-parent = <&PIC>; + phy = <&PHY1>; local-mac-address = [ 00 00 00 00 00 00 ]; }; }; - sdma@4000 { - device_type = "dma"; - compatible = "marvell,mv64x60-sdma"; - reg = <4000 c18>; - virtual-reg = <f1004000>; - interrupt-base = <0>; - interrupts = <24>; - interrupt-parent = <&/mv64x60/pic>; + SDMA0: sdma@4000 { + compatible = "marvell,mv64360-sdma"; + reg = <0x4000 0xc18>; + virtual-reg = <0xf1004000>; + interrupts = <36>; + interrupt-parent = <&PIC>; }; - sdma@6000 { - device_type = "dma"; - compatible = "marvell,mv64x60-sdma"; - reg = <6000 c18>; - virtual-reg = <f1006000>; - interrupt-base = <0>; - interrupts = <26>; - interrupt-parent = <&/mv64x60/pic>; + SDMA1: sdma@6000 { + compatible = "marvell,mv64360-sdma"; + reg = <0x6000 0xc18>; + virtual-reg = <0xf1006000>; + interrupts = <38>; + interrupt-parent = <&PIC>; }; - brg@b200 { - compatible = "marvell,mv64x60-brg"; - reg = <b200 8>; + BRG0: brg@b200 { + compatible = "marvell,mv64360-brg"; + reg = <0xb200 0x8>; clock-src = <8>; - clock-frequency = <7ed6b40>; - current-speed = <2580>; - bcr = <0>; + clock-frequency = <133333333>; + current-speed = <9600>; }; - brg@b208 { - compatible = "marvell,mv64x60-brg"; - reg = <b208 8>; + BRG1: brg@b208 { + compatible = "marvell,mv64360-brg"; + reg = <0xb208 0x8>; clock-src = <8>; - clock-frequency = <7ed6b40>; - current-speed = <2580>; - bcr = <0>; + clock-frequency = <133333333>; + current-speed = <9600>; }; - cunit@f200 { - reg = <f200 200>; + CUNIT: cunit@f200 { + reg = <0xf200 0x200>; }; - mpscrouting@b400 { - reg = <b400 c>; + MPSCROUTING: mpscrouting@b400 { + reg = <0xb400 0xc>; }; - mpscintr@b800 { - reg = <b800 100>; - virtual-reg = <f100b800>; + MPSCINTR: mpscintr@b800 { + reg = <0xb800 0x100>; + virtual-reg = <0xf100b800>; }; - mpsc@8000 { + MPSC0: mpsc@8000 { device_type = "serial"; - compatible = "marvell,mpsc"; - reg = <8000 38>; - virtual-reg = <f1008000>; - sdma = <&/mv64x60/sdma@4000>; - brg = <&/mv64x60/brg@b200>; - cunit = <&/mv64x60/cunit@f200>; - mpscrouting = <&/mv64x60/mpscrouting@b400>; - mpscintr = <&/mv64x60/mpscintr@b800>; - block-index = <0>; - max_idle = <28>; - chr_1 = <0>; - chr_2 = <0>; - chr_10 = <3>; - mpcr = <0>; - interrupts = <28>; - interrupt-parent = <&/mv64x60/pic>; + compatible = "marvell,mv64360-mpsc"; + reg = <0x8000 0x38>; + virtual-reg = <0xf1008000>; + sdma = <&SDMA0>; + brg = <&BRG0>; + cunit = <&CUNIT>; + mpscrouting = <&MPSCROUTING>; + mpscintr = <&MPSCINTR>; + cell-index = <0>; + interrupts = <40>; + interrupt-parent = <&PIC>; }; - mpsc@9000 { + MPSC1: mpsc@9000 { device_type = "serial"; - compatible = "marvell,mpsc"; - reg = <9000 38>; - virtual-reg = <f1009000>; - sdma = <&/mv64x60/sdma@6000>; - brg = <&/mv64x60/brg@b208>; - cunit = <&/mv64x60/cunit@f200>; - mpscrouting = <&/mv64x60/mpscrouting@b400>; - mpscintr = <&/mv64x60/mpscintr@b800>; - block-index = <1>; - max_idle = <28>; - chr_1 = <0>; - chr_2 = <0>; - chr_10 = <3>; - mpcr = <0>; - interrupts = <2a>; - interrupt-parent = <&/mv64x60/pic>; + compatible = "marvell,mv64360-mpsc"; + reg = <0x9000 0x38>; + virtual-reg = <0xf1009000>; + sdma = <&SDMA1>; + brg = <&BRG1>; + cunit = <&CUNIT>; + mpscrouting = <&MPSCROUTING>; + mpscintr = <&MPSCINTR>; + cell-index = <1>; + interrupts = <42>; + interrupt-parent = <&PIC>; }; wdt@b410 { /* watchdog timer */ - compatible = "marvell,mv64x60-wdt"; - reg = <b410 8>; - timeout = <a>; /* wdt timeout in seconds */ + compatible = "marvell,mv64360-wdt"; + reg = <0xb410 0x8>; }; i2c@c000 { device_type = "i2c"; - compatible = "marvell,mv64x60-i2c"; - reg = <c000 20>; - virtual-reg = <f100c000>; - freq_m = <8>; - freq_n = <3>; - timeout = <3e8>; /* 1000 = 1 second */ - retries = <1>; - interrupts = <25>; - interrupt-parent = <&/mv64x60/pic>; + compatible = "marvell,mv64360-i2c"; + reg = <0xc000 0x20>; + virtual-reg = <0xf100c000>; + interrupts = <37>; + interrupt-parent = <&PIC>; }; - pic { + PIC: pic { #interrupt-cells = <1>; #address-cells = <0>; - compatible = "marvell,mv64x60-pic"; - reg = <0000 88>; + compatible = "marvell,mv64360-pic"; + reg = <0x0 0x88>; interrupt-controller; }; mpp@f000 { - compatible = "marvell,mv64x60-mpp"; - reg = <f000 10>; + compatible = "marvell,mv64360-mpp"; + reg = <0xf000 0x10>; }; gpp@f100 { - compatible = "marvell,mv64x60-gpp"; - reg = <f100 20>; + compatible = "marvell,mv64360-gpp"; + reg = <0xf100 0x20>; }; pci@80000000 { @@ -244,73 +228,75 @@ #size-cells = <2>; #interrupt-cells = <1>; device_type = "pci"; - compatible = "marvell,mv64x60-pci"; - reg = <0cf8 8>; - ranges = <01000000 0 0 88000000 0 01000000 - 02000000 0 80000000 80000000 0 08000000>; - bus-range = <0 ff>; - clock-frequency = <3EF1480>; - interrupt-pci-iack = <0c34>; - interrupt-parent = <&/mv64x60/pic>; - interrupt-map-mask = <f800 0 0 7>; + compatible = "marvell,mv64360-pci"; + reg = <0xcf8 0x8>; + ranges = <0x01000000 0x0 0x0 + 0x88000000 0x0 0x01000000 + 0x02000000 0x0 0x80000000 + 0x80000000 0x0 0x08000000>; + bus-range = <0 255>; + clock-frequency = <66000000>; + interrupt-pci-iack = <0xc34>; + interrupt-parent = <&PIC>; + interrupt-map-mask = <0xf800 0x0 0x0 0x7>; interrupt-map = < /* IDSEL 0x0a */ - 5000 0 0 1 &/mv64x60/pic 50 - 5000 0 0 2 &/mv64x60/pic 51 - 5000 0 0 3 &/mv64x60/pic 5b - 5000 0 0 4 &/mv64x60/pic 5d + 0x5000 0 0 1 &PIC 80 + 0x5000 0 0 2 &PIC 81 + 0x5000 0 0 3 &PIC 91 + 0x5000 0 0 4 &PIC 93 /* IDSEL 0x0b */ - 5800 0 0 1 &/mv64x60/pic 5b - 5800 0 0 2 &/mv64x60/pic 5d - 5800 0 0 3 &/mv64x60/pic 50 - 5800 0 0 4 &/mv64x60/pic 51 + 0x5800 0 0 1 &PIC 91 + 0x5800 0 0 2 &PIC 93 + 0x5800 0 0 3 &PIC 80 + 0x5800 0 0 4 &PIC 81 /* IDSEL 0x0c */ - 6000 0 0 1 &/mv64x60/pic 5b - 6000 0 0 2 &/mv64x60/pic 5d - 6000 0 0 3 &/mv64x60/pic 50 - 6000 0 0 4 &/mv64x60/pic 51 + 0x6000 0 0 1 &PIC 91 + 0x6000 0 0 2 &PIC 93 + 0x6000 0 0 3 &PIC 80 + 0x6000 0 0 4 &PIC 81 /* IDSEL 0x0d */ - 6800 0 0 1 &/mv64x60/pic 5d - 6800 0 0 2 &/mv64x60/pic 50 - 6800 0 0 3 &/mv64x60/pic 51 - 6800 0 0 4 &/mv64x60/pic 5b + 0x6800 0 0 1 &PIC 93 + 0x6800 0 0 2 &PIC 80 + 0x6800 0 0 3 &PIC 81 + 0x6800 0 0 4 &PIC 91 >; }; cpu-error@0070 { - compatible = "marvell,mv64x60-cpu-error"; - reg = <0070 10 0128 28>; - interrupts = <03>; - interrupt-parent = <&/mv64x60/pic>; + compatible = "marvell,mv64360-cpu-error"; + reg = <0x70 0x10 0x128 0x28>; + interrupts = <3>; + interrupt-parent = <&PIC>; }; sram-ctrl@0380 { - compatible = "marvell,mv64x60-sram-ctrl"; - reg = <0380 80>; - interrupts = <0d>; - interrupt-parent = <&/mv64x60/pic>; + compatible = "marvell,mv64360-sram-ctrl"; + reg = <0x380 0x80>; + interrupts = <13>; + interrupt-parent = <&PIC>; }; pci-error@1d40 { - compatible = "marvell,mv64x60-pci-error"; - reg = <1d40 40 0c28 4>; - interrupts = <0c>; - interrupt-parent = <&/mv64x60/pic>; + compatible = "marvell,mv64360-pci-error"; + reg = <0x1d40 0x40 0xc28 0x4>; + interrupts = <12>; + interrupt-parent = <&PIC>; }; mem-ctrl@1400 { - compatible = "marvell,mv64x60-mem-ctrl"; - reg = <1400 60>; - interrupts = <11>; - interrupt-parent = <&/mv64x60/pic>; + compatible = "marvell,mv64360-mem-ctrl"; + reg = <0x1400 0x60>; + interrupts = <17>; + interrupt-parent = <&PIC>; }; }; chosen { bootargs = "ip=on"; - linux,stdout-path = "/mv64x60@f1000000/mpsc@8000"; + linux,stdout-path = &MPSC0; }; }; diff --git a/arch/powerpc/boot/dts/rainier.dts b/arch/powerpc/boot/dts/rainier.dts index f947c75..6a8fa70 100644 --- a/arch/powerpc/boot/dts/rainier.dts +++ b/arch/powerpc/boot/dts/rainier.dts @@ -254,7 +254,6 @@ }; EMAC0: ethernet@ef600e00 { - linux,network-index = <0>; device_type = "network"; compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; interrupt-parent = <&EMAC0>; @@ -270,7 +269,7 @@ mal-tx-channel = <0>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <5dc>; + max-frame-size = <2328>; rx-fifo-size = <1000>; tx-fifo-size = <800>; phy-mode = "rgmii"; @@ -284,7 +283,6 @@ }; EMAC1: ethernet@ef600f00 { - linux,network-index = <1>; device_type = "network"; compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; interrupt-parent = <&EMAC1>; @@ -300,7 +298,7 @@ mal-tx-channel = <1>; mal-rx-channel = <1>; cell-index = <1>; - max-frame-size = <5dc>; + max-frame-size = <2328>; rx-fifo-size = <1000>; tx-fifo-size = <800>; phy-mode = "rgmii"; diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts index 8db9515..a1ae4d6 100644 --- a/arch/powerpc/boot/dts/sequoia.dts +++ b/arch/powerpc/boot/dts/sequoia.dts @@ -269,7 +269,6 @@ }; EMAC0: ethernet@ef600e00 { - linux,network-index = <0>; device_type = "network"; compatible = "ibm,emac-440epx", "ibm,emac4"; interrupt-parent = <&EMAC0>; @@ -285,7 +284,7 @@ mal-tx-channel = <0>; mal-rx-channel = <0>; cell-index = <0>; - max-frame-size = <5dc>; + max-frame-size = <2328>; rx-fifo-size = <1000>; tx-fifo-size = <800>; phy-mode = "rgmii"; @@ -299,7 +298,6 @@ }; EMAC1: ethernet@ef600f00 { - linux,network-index = <1>; device_type = "network"; compatible = "ibm,emac-440epx", "ibm,emac4"; interrupt-parent = <&EMAC1>; @@ -315,7 +313,7 @@ mal-tx-channel = <1>; mal-rx-channel = <1>; cell-index = <1>; - max-frame-size = <5dc>; + max-frame-size = <2328>; rx-fifo-size = <1000>; tx-fifo-size = <800>; phy-mode = "rgmii"; diff --git a/arch/powerpc/boot/dts/taishan.dts b/arch/powerpc/boot/dts/taishan.dts index 8278068..e808e1c 100644 --- a/arch/powerpc/boot/dts/taishan.dts +++ b/arch/powerpc/boot/dts/taishan.dts @@ -104,6 +104,16 @@ // FIXME: anything else? }; + L2C0: l2c { + compatible = "ibm,l2-cache-440gx", "ibm,l2-cache"; + dcr-reg = <20 8 /* Internal SRAM DCR's */ + 30 8>; /* L2 cache DCR's */ + cache-line-size = <20>; /* 32 bytes */ + cache-size = <40000>; /* L2, 256K */ + interrupt-parent = <&UIC2>; + interrupts = <17 1>; + }; + plb { compatible = "ibm,plb-440gx", "ibm,plb4"; #address-cells = <2>; @@ -232,10 +242,18 @@ reg = <40000790 8>; }; + TAH0: emac-tah@40000b50 { + compatible = "ibm,tah-440gx", "ibm,tah"; + reg = <40000b50 30>; + }; + + TAH1: emac-tah@40000d50 { + compatible = "ibm,tah-440gx", "ibm,tah"; + reg = <40000d50 30>; + }; EMAC0: ethernet@40000800 { unused = <1>; - linux,network-index = <2>; device_type = "network"; compatible = "ibm,emac-440gx", "ibm,emac4"; interrupt-parent = <&UIC1>; @@ -256,7 +274,6 @@ }; EMAC1: ethernet@40000900 { unused = <1>; - linux,network-index = <3>; device_type = "network"; compatible = "ibm,emac-440gx", "ibm,emac4"; interrupt-parent = <&UIC1>; @@ -277,7 +294,6 @@ }; EMAC2: ethernet@40000c00 { - linux,network-index = <0>; device_type = "network"; compatible = "ibm,emac-440gx", "ibm,emac4"; interrupt-parent = <&UIC2>; @@ -288,7 +304,7 @@ mal-tx-channel = <2>; mal-rx-channel = <2>; cell-index = <2>; - max-frame-size = <5dc>; + max-frame-size = <2328>; rx-fifo-size = <1000>; tx-fifo-size = <800>; phy-mode = "rgmii"; @@ -297,10 +313,11 @@ rgmii-channel = <0>; zmii-device = <&ZMII0>; zmii-channel = <2>; + tah-device = <&TAH0>; + tah-channel = <0>; }; EMAC3: ethernet@40000e00 { - linux,network-index = <1>; device_type = "network"; compatible = "ibm,emac-440gx", "ibm,emac4"; interrupt-parent = <&UIC2>; @@ -311,7 +328,7 @@ mal-tx-channel = <3>; mal-rx-channel = <3>; cell-index = <3>; - max-frame-size = <5dc>; + max-frame-size = <2328>; rx-fifo-size = <1000>; tx-fifo-size = <800>; phy-mode = "rgmii"; @@ -320,6 +337,8 @@ rgmii-channel = <1>; zmii-device = <&ZMII0>; zmii-channel = <3>; + tah-device = <&TAH1>; + tah-channel = <0>; }; diff --git a/arch/powerpc/boot/dts/tqm5200.dts b/arch/powerpc/boot/dts/tqm5200.dts index c86464f..65bcea6 100644 --- a/arch/powerpc/boot/dts/tqm5200.dts +++ b/arch/powerpc/boot/dts/tqm5200.dts @@ -127,10 +127,25 @@ ethernet@3000 { device_type = "network"; compatible = "fsl,mpc5200-fec"; - reg = <3000 800>; + reg = <3000 400>; local-mac-address = [ 00 00 00 00 00 00 ]; interrupts = <2 5 0>; interrupt-parent = <&mpc5200_pic>; + phy-handle = <&phy0>; + }; + + mdio@3000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio"; + reg = <3000 400>; // fec range, since we need to setup fec interrupts + interrupts = <2 5 0>; // these are for "mii command finished", not link changes & co. + interrupt-parent = <&mpc5200_pic>; + + phy0: ethernet-phy@0 { + device_type = "ethernet-phy"; + reg = <0>; + }; }; ata@3a00 { @@ -141,11 +156,19 @@ }; i2c@3d40 { + #address-cells = <1>; + #size-cells = <0>; compatible = "fsl,mpc5200-i2c","fsl-i2c"; reg = <3d40 40>; interrupts = <2 10 0>; interrupt-parent = <&mpc5200_pic>; fsl5200-clocking; + + rtc@68 { + device_type = "rtc"; + compatible = "dallas,ds1307"; + reg = <68>; + }; }; sram@8000 { @@ -154,6 +177,23 @@ }; }; + lpb { + model = "fsl,lpb"; + compatible = "fsl,lpb"; + #address-cells = <2>; + #size-cells = <1>; + ranges = <0 0 fc000000 02000000>; + + flash@0,0 { + compatible = "cfi-flash"; + reg = <0 0 02000000>; + bank-width = <4>; + device-width = <2>; + #size-cells = <1>; + #address-cells = <1>; + }; + }; + pci@f0000d00 { #interrupt-cells = <1>; #size-cells = <2>; diff --git a/arch/powerpc/boot/dts/walnut.dts b/arch/powerpc/boot/dts/walnut.dts index dcc21b0..a328607 100644 --- a/arch/powerpc/boot/dts/walnut.dts +++ b/arch/powerpc/boot/dts/walnut.dts @@ -125,7 +125,6 @@ }; EMAC: ethernet@ef600800 { - linux,network-index = <0>; device_type = "network"; compatible = "ibm,emac-405gp", "ibm,emac"; interrupt-parent = <&UIC0>; diff --git a/arch/powerpc/boot/dts/warp.dts b/arch/powerpc/boot/dts/warp.dts index dc1499d..b04a52e 100644 --- a/arch/powerpc/boot/dts/warp.dts +++ b/arch/powerpc/boot/dts/warp.dts @@ -204,7 +204,6 @@ }; EMAC0: ethernet@ef600e00 { - linux,network-index = <0>; device_type = "network"; compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; interrupt-parent = <&UIC1>; diff --git a/arch/powerpc/boot/dts/yosemite.dts b/arch/powerpc/boot/dts/yosemite.dts new file mode 100644 index 0000000..0d6d332 --- /dev/null +++ b/arch/powerpc/boot/dts/yosemite.dts @@ -0,0 +1,304 @@ +/* + * Device Tree Source for AMCC Yosemite + * + * Copyright 2008 IBM Corp. + * Josh Boyer <jwboyer@linux.vnet.ibm.com> + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without + * any warranty of any kind, whether express or implied. + */ + +/ { + #address-cells = <2>; + #size-cells = <1>; + model = "amcc,yosemite"; + compatible = "amcc,yosemite","amcc,bamboo"; + dcr-parent = <&/cpus/cpu@0>; + + aliases { + ethernet0 = &EMAC0; + ethernet1 = &EMAC1; + serial0 = &UART0; + serial1 = &UART1; + serial2 = &UART2; + serial3 = &UART3; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + model = "PowerPC,440EP"; + reg = <0>; + clock-frequency = <0>; /* Filled in by zImage */ + timebase-frequency = <0>; /* Filled in by zImage */ + i-cache-line-size = <20>; + d-cache-line-size = <20>; + i-cache-size = <8000>; + d-cache-size = <8000>; + dcr-controller; + dcr-access-method = "native"; + }; + }; + + memory { + device_type = "memory"; + reg = <0 0 0>; /* Filled in by zImage */ + }; + + UIC0: interrupt-controller0 { + compatible = "ibm,uic-440ep","ibm,uic"; + interrupt-controller; + cell-index = <0>; + dcr-reg = <0c0 009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + }; + + UIC1: interrupt-controller1 { + compatible = "ibm,uic-440ep","ibm,uic"; + interrupt-controller; + cell-index = <1>; + dcr-reg = <0d0 009>; + #address-cells = <0>; + #size-cells = <0>; + #interrupt-cells = <2>; + interrupts = <1e 4 1f 4>; /* cascade */ + interrupt-parent = <&UIC0>; + }; + + SDR0: sdr { + compatible = "ibm,sdr-440ep"; + dcr-reg = <00e 002>; + }; + + CPR0: cpr { + compatible = "ibm,cpr-440ep"; + dcr-reg = <00c 002>; + }; + + plb { + compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; + #address-cells = <2>; + #size-cells = <1>; + ranges; + clock-frequency = <0>; /* Filled in by zImage */ + + SDRAM0: sdram { + compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; + dcr-reg = <010 2>; + }; + + DMA0: dma { + compatible = "ibm,dma-440ep", "ibm,dma-440gp"; + dcr-reg = <100 027>; + }; + + MAL0: mcmal { + compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; + dcr-reg = <180 62>; + num-tx-chans = <4>; + num-rx-chans = <2>; + interrupt-parent = <&MAL0>; + interrupts = <0 1 2 3 4>; + #interrupt-cells = <1>; + #address-cells = <0>; + #size-cells = <0>; + interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 + /*RXEOB*/ 1 &UIC0 b 4 + /*SERR*/ 2 &UIC1 0 4 + /*TXDE*/ 3 &UIC1 1 4 + /*RXDE*/ 4 &UIC1 2 4>; + }; + + POB0: opb { + compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; + #address-cells = <1>; + #size-cells = <1>; + /* Bamboo is oddball in the 44x world and doesn't use the ERPN + * bits. + */ + ranges = <00000000 0 00000000 80000000 + 80000000 0 80000000 80000000>; + interrupt-parent = <&UIC1>; + interrupts = <7 4>; + clock-frequency = <0>; /* Filled in by zImage */ + + EBC0: ebc { + compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; + dcr-reg = <012 2>; + #address-cells = <2>; + #size-cells = <1>; + clock-frequency = <0>; /* Filled in by zImage */ + interrupts = <5 1>; + interrupt-parent = <&UIC1>; + }; + + UART0: serial@ef600300 { + device_type = "serial"; + compatible = "ns16550"; + reg = <ef600300 8>; + virtual-reg = <ef600300>; + clock-frequency = <0>; /* Filled in by zImage */ + current-speed = <1c200>; + interrupt-parent = <&UIC0>; + interrupts = <0 4>; + }; + + UART1: serial@ef600400 { + device_type = "serial"; + compatible = "ns16550"; + reg = <ef600400 8>; + virtual-reg = <ef600400>; + clock-frequency = <0>; + current-speed = <0>; + interrupt-parent = <&UIC0>; + interrupts = <1 4>; + }; + + UART2: serial@ef600500 { + device_type = "serial"; + compatible = "ns16550"; + reg = <ef600500 8>; + virtual-reg = <ef600500>; + clock-frequency = <0>; + current-speed = <0>; + interrupt-parent = <&UIC0>; + interrupts = <3 4>; + status = "disabled"; + }; + + UART3: serial@ef600600 { + device_type = "serial"; + compatible = "ns16550"; + reg = <ef600600 8>; + virtual-reg = <ef600600>; + clock-frequency = <0>; + current-speed = <0>; + interrupt-parent = <&UIC0>; + interrupts = <4 4>; + status = "disabled"; + }; + + IIC0: i2c@ef600700 { + compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; + reg = <ef600700 14>; + interrupt-parent = <&UIC0>; + interrupts = <2 4>; + }; + + IIC1: i2c@ef600800 { + compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; + reg = <ef600800 14>; + interrupt-parent = <&UIC0>; + interrupts = <7 4>; + }; + + spi@ef600900 { + compatible = "amcc,spi-440ep"; + reg = <ef600900 6>; + interrupts = <8 4>; + interrupt-parent = <&UIC0>; + }; + + ZMII0: emac-zmii@ef600d00 { + compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; + reg = <ef600d00 c>; + }; + + EMAC0: ethernet@ef600e00 { + device_type = "network"; + compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; + interrupt-parent = <&UIC1>; + interrupts = <1c 4 1d 4>; + reg = <ef600e00 70>; + local-mac-address = [000000000000]; + mal-device = <&MAL0>; + mal-tx-channel = <0 1>; + mal-rx-channel = <0>; + cell-index = <0>; + max-frame-size = <5dc>; + rx-fifo-size = <1000>; + tx-fifo-size = <800>; + phy-mode = "rmii"; + phy-map = <00000000>; + zmii-device = <&ZMII0>; + zmii-channel = <0>; + }; + + EMAC1: ethernet@ef600f00 { + device_type = "network"; + compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; + interrupt-parent = <&UIC1>; + interrupts = <1e 4 1f 4>; + reg = <ef600f00 70>; + local-mac-address = [000000000000]; + mal-device = <&MAL0>; + mal-tx-channel = <2 3>; + mal-rx-channel = <1>; + cell-index = <1>; + max-frame-size = <5dc>; + rx-fifo-size = <1000>; + tx-fifo-size = <800>; + phy-mode = "rmii"; + phy-map = <00000000>; + zmii-device = <&ZMII0>; + zmii-channel = <1>; + }; + + usb@ef601000 { + compatible = "ohci-be"; + reg = <ef601000 80>; + interrupts = <8 4 9 4>; + interrupt-parent = < &UIC1 >; + }; + }; + + PCI0: pci@ec000000 { + device_type = "pci"; + #interrupt-cells = <1>; + #size-cells = <2>; + #address-cells = <3>; + compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; + primary; + reg = <0 eec00000 8 /* Config space access */ + 0 eed00000 4 /* IACK */ + 0 eed00000 4 /* Special cycle */ + 0 ef400000 40>; /* Internal registers */ + + /* Outbound ranges, one memory and one IO, + * later cannot be changed. Chip supports a second + * IO range but we don't use it for now + */ + ranges = <02000000 0 a0000000 0 a0000000 0 20000000 + 01000000 0 00000000 0 e8000000 0 00010000>; + + /* Inbound 2GB range starting at 0 */ + dma-ranges = <42000000 0 0 0 0 0 80000000>; + + /* Bamboo has all 4 IRQ pins tied together per slot */ + interrupt-map-mask = <f800 0 0 0>; + interrupt-map = < + /* IDSEL 1 */ + 0800 0 0 0 &UIC0 1c 8 + + /* IDSEL 2 */ + 1000 0 0 0 &UIC0 1b 8 + + /* IDSEL 3 */ + 1800 0 0 0 &UIC0 1a 8 + + /* IDSEL 4 */ + 2000 0 0 0 &UIC0 19 8 + >; + }; + }; + + chosen { + linux,stdout-path = "/plb/opb/serial@ef600300"; + }; +}; diff --git a/arch/powerpc/boot/ebony.c b/arch/powerpc/boot/ebony.c index f61364c..5532ab3 100644 --- a/arch/powerpc/boot/ebony.c +++ b/arch/powerpc/boot/ebony.c @@ -75,7 +75,8 @@ static void ebony_fixups(void) ibm440gp_fixup_clocks(sysclk, 6 * 1843200); ibm4xx_sdram_fixup_memsize(); - dt_fixup_mac_addresses(ebony_mac0, ebony_mac1); + dt_fixup_mac_address_by_alias("ethernet0", ebony_mac0); + dt_fixup_mac_address_by_alias("ethernet1", ebony_mac1); ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); ebony_flashsel_fixup(); } diff --git a/arch/powerpc/boot/libfdt-wrapper.c b/arch/powerpc/boot/libfdt-wrapper.c index 59016be..c541fd8 100644 --- a/arch/powerpc/boot/libfdt-wrapper.c +++ b/arch/powerpc/boot/libfdt-wrapper.c @@ -35,7 +35,7 @@ #define check_err(err) \ ({ \ if (BAD_ERROR(err) || ((err < 0) && DEBUG)) \ - printf("%s():%d %s\n\r", __FUNCTION__, __LINE__, \ + printf("%s():%d %s\n\r", __func__, __LINE__, \ fdt_strerror(err)); \ if (BAD_ERROR(err)) \ exit(); \ diff --git a/arch/powerpc/boot/mpsc.c b/arch/powerpc/boot/mpsc.c index 802ea53..425ad88 100644 --- a/arch/powerpc/boot/mpsc.c +++ b/arch/powerpc/boot/mpsc.c @@ -141,7 +141,7 @@ int mpsc_console_init(void *devp, struct serial_console_data *scdp) if (mpscintr_base == NULL) goto err_out; - n = getprop(devp, "block-index", &v, sizeof(v)); + n = getprop(devp, "cell-index", &v, sizeof(v)); if (n != sizeof(v)) goto err_out; reg_set = (int)v; diff --git a/arch/powerpc/boot/mv64x60.c b/arch/powerpc/boot/mv64x60.c index b432594..d9bb302 100644 --- a/arch/powerpc/boot/mv64x60.c +++ b/arch/powerpc/boot/mv64x60.c @@ -535,7 +535,7 @@ u8 *mv64x60_get_bridge_pbase(void) u32 v[2]; void *devp; - devp = finddevice("/mv64x60"); + devp = find_node_by_compatible(NULL, "marvell,mv64360"); if (devp == NULL) goto err_out; if (getprop(devp, "reg", v, sizeof(v)) != sizeof(v)) @@ -553,7 +553,7 @@ u8 *mv64x60_get_bridge_base(void) u32 v; void *devp; - devp = finddevice("/mv64x60"); + devp = find_node_by_compatible(NULL, "marvell,mv64360"); if (devp == NULL) goto err_out; if (getprop(devp, "virtual-reg", &v, sizeof(v)) != sizeof(v)) diff --git a/arch/powerpc/boot/mv64x60_i2c.c b/arch/powerpc/boot/mv64x60_i2c.c index d085377..52a3212 100644 --- a/arch/powerpc/boot/mv64x60_i2c.c +++ b/arch/powerpc/boot/mv64x60_i2c.c @@ -185,7 +185,7 @@ int mv64x60_i2c_open(void) u32 v; void *devp; - devp = finddevice("/mv64x60/i2c"); + devp = find_node_by_compatible(NULL, "marvell,mv64360-i2c"); if (devp == NULL) goto err_out; if (getprop(devp, "virtual-reg", &v, sizeof(v)) != sizeof(v)) diff --git a/arch/powerpc/boot/prpmc2800.c b/arch/powerpc/boot/prpmc2800.c index 05c3245..da31d60 100644 --- a/arch/powerpc/boot/prpmc2800.c +++ b/arch/powerpc/boot/prpmc2800.c @@ -344,20 +344,20 @@ static void prpmc2800_bridge_setup(u32 mem_size) acc_bits); /* Get the cpu -> pci i/o & mem mappings from the device tree */ - devp = finddevice("/mv64x60/pci@80000000"); + devp = find_node_by_compatible(NULL, "marvell,mv64360-pci"); if (devp == NULL) - fatal("Error: Missing /mv64x60/pci@80000000" + fatal("Error: Missing marvell,mv64360-pci" " device tree node\n\r"); rc = getprop(devp, "ranges", v, sizeof(v)); if (rc != sizeof(v)) - fatal("Error: Can't find /mv64x60/pci@80000000/ranges" + fatal("Error: Can't find marvell,mv64360-pci ranges" " property\n\r"); /* Get the cpu -> pci i/o & mem mappings from the device tree */ - devp = finddevice("/mv64x60"); + devp = find_node_by_compatible(NULL, "marvell,mv64360"); if (devp == NULL) - fatal("Error: Missing /mv64x60 device tree node\n\r"); + fatal("Error: Missing marvell,mv64360 device tree node\n\r"); enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE)); enables |= 0x0007fe00; /* Disable all cpu->pci windows */ @@ -429,9 +429,9 @@ static void prpmc2800_fixups(void) setprop(devp, "model", model, l); /* Set /cpus/PowerPC,7447/clock-frequency */ - devp = finddevice("/cpus/PowerPC,7447"); + devp = find_node_by_prop_value_str(NULL, "device_type", "cpu"); if (devp == NULL) - fatal("Error: Missing proper /cpus device tree node\n\r"); + fatal("Error: Missing proper cpu device tree node\n\r"); v[0] = bip->core_speed; setprop(devp, "clock-frequency", &v[0], sizeof(v[0])); @@ -443,16 +443,17 @@ static void prpmc2800_fixups(void) v[1] = bip->mem_size; setprop(devp, "reg", v, sizeof(v)); - /* Update /mv64x60/model, if this is a mv64362 */ + /* Update model, if this is a mv64362 */ if (bip->bridge_type == BRIDGE_TYPE_MV64362) { - devp = finddevice("/mv64x60"); + devp = find_node_by_compatible(NULL, "marvell,mv64360"); if (devp == NULL) - fatal("Error: Missing /mv64x60 device tree node\n\r"); + fatal("Error: Missing marvell,mv64360" + " device tree node\n\r"); setprop(devp, "model", "mv64362", strlen("mv64362") + 1); } /* Set User FLASH size */ - devp = finddevice("/mv64x60/flash@a0000000"); + devp = find_node_by_compatible(NULL, "direct-mapped"); if (devp == NULL) fatal("Error: Missing User FLASH device tree node\n\r"); rc = getprop(devp, "reg", v, sizeof(v)); diff --git a/arch/powerpc/boot/ps3-head.S b/arch/powerpc/boot/ps3-head.S index a55c273..b6fcbaf 100644 --- a/arch/powerpc/boot/ps3-head.S +++ b/arch/powerpc/boot/ps3-head.S @@ -27,8 +27,9 @@ /* * __system_reset_overlay - The PS3 first stage entry. * - * The bootwraper build script copies the 0x100 bytes at symbol - * __system_reset_overlay to offset 0x100 of the rom image. + * The bootwraper build script copies the 512 bytes at symbol + * __system_reset_overlay to offset 0x100 of the rom image. This symbol + * must occupy 512 or less bytes. * * The PS3 has a single processor with two threads. */ @@ -47,8 +48,6 @@ __system_reset_overlay: mfspr r3, 0x88 cntlzw. r3, r3 - li r4, 0 - li r5, 0 beq 1f /* Secondary goes to __secondary_hold in kernel. */ @@ -57,8 +56,14 @@ __system_reset_overlay: mtctr r4 bctr - /* Primary delays then goes to _zimage_start in wrapper. */ 1: + /* Save the value at addr zero for a null pointer write check later. */ + + li r4, 0 + lwz r3, 0(r4) + + /* Primary delays then goes to _zimage_start in wrapper. */ + or 31, 31, 31 /* db16cyc */ or 31, 31, 31 /* db16cyc */ @@ -67,16 +72,18 @@ __system_reset_overlay: mtctr r4 bctr + . = __system_reset_overlay + 512 + /* * __system_reset_kernel - Place holder for the kernel reset vector. * - * The bootwrapper build script copies 0x100 bytes from offset 0x100 + * The bootwrapper build script copies 512 bytes from offset 0x100 * of the rom image to the symbol __system_reset_kernel. At runtime - * the bootwrapper program copies the 0x100 bytes at __system_reset_kernel - * to ram address 0x100. This symbol must occupy 0x100 bytes. + * the bootwrapper program copies the 512 bytes at __system_reset_kernel + * to ram address 0x100. This symbol must occupy 512 bytes. */ .globl __system_reset_kernel __system_reset_kernel: - . = __system_reset_kernel + 0x100 + . = __system_reset_kernel + 512 diff --git a/arch/powerpc/boot/ps3.c b/arch/powerpc/boot/ps3.c index 3b0ac4d..9954d98 100644 --- a/arch/powerpc/boot/ps3.c +++ b/arch/powerpc/boot/ps3.c @@ -27,10 +27,10 @@ #include "page.h" #include "ops.h" -extern s64 lv1_panic(u64 in_1); -extern s64 lv1_get_logical_partition_id(u64 *out_1); -extern s64 lv1_get_logical_ppe_id(u64 *out_1); -extern s64 lv1_get_repository_node_value(u64 in_1, u64 in_2, u64 in_3, +extern int lv1_panic(u64 in_1); +extern int lv1_get_logical_partition_id(u64 *out_1); +extern int lv1_get_logical_ppe_id(u64 *out_1); +extern int lv1_get_repository_node_value(u64 in_1, u64 in_2, u64 in_3, u64 in_4, u64 in_5, u64 *out_1, u64 *out_2); #ifdef DEBUG @@ -46,6 +46,7 @@ BSS_STACK(4096); * edit the command line passed to vmlinux (by setting /chosen/bootargs). * The buffer is put in it's own section so that tools may locate it easier. */ + static char cmdline[COMMAND_LINE_SIZE] __attribute__((__section__("__builtin_cmdline"))); @@ -75,7 +76,7 @@ static void ps3_exit(void) static int ps3_repository_read_rm_size(u64 *rm_size) { - s64 result; + int result; u64 lpar_id; u64 ppe_id; u64 v2; @@ -114,16 +115,17 @@ void ps3_copy_vectors(void) { extern char __system_reset_kernel[]; - memcpy((void *)0x100, __system_reset_kernel, 0x100); - flush_cache((void *)0x100, 0x100); + memcpy((void *)0x100, __system_reset_kernel, 512); + flush_cache((void *)0x100, 512); } -void platform_init(void) +void platform_init(unsigned long null_check) { const u32 heapsize = 0x1000000 - (u32)_end; /* 16MiB */ void *chosen; unsigned long ft_addr; u64 rm_size; + unsigned long val; console_ops.write = ps3_console_write; platform_ops.exit = ps3_exit; @@ -151,6 +153,11 @@ void platform_init(void) printf(" flat tree at 0x%lx\n\r", ft_addr); + val = *(unsigned long *)0; + + if (val != null_check) + printf("null check failed: %lx != %lx\n\r", val, null_check); + ((kernel_entry_t)0)(ft_addr, 0, NULL); ps3_exit(); diff --git a/arch/powerpc/boot/serial.c b/arch/powerpc/boot/serial.c index 9960421..8b3607c 100644 --- a/arch/powerpc/boot/serial.c +++ b/arch/powerpc/boot/serial.c @@ -119,7 +119,7 @@ int serial_console_init(void) if (dt_is_compatible(devp, "ns16550")) rc = ns16550_console_init(devp, &serial_cd); - else if (dt_is_compatible(devp, "marvell,mpsc")) + else if (dt_is_compatible(devp, "marvell,mv64360-mpsc")) rc = mpsc_console_init(devp, &serial_cd); else if (dt_is_compatible(devp, "fsl,cpm1-scc-uart") || dt_is_compatible(devp, "fsl,cpm1-smc-uart") || diff --git a/arch/powerpc/boot/simpleboot.c b/arch/powerpc/boot/simpleboot.c new file mode 100644 index 0000000..86cd285 --- /dev/null +++ b/arch/powerpc/boot/simpleboot.c @@ -0,0 +1,84 @@ +/* + * The simple platform -- for booting when firmware doesn't supply a device + * tree or any platform configuration information. + * All data is extracted from an embedded device tree + * blob. + * + * Authors: Scott Wood <scottwood@freescale.com> + * Grant Likely <grant.likely@secretlab.ca> + * + * Copyright (c) 2007 Freescale Semiconductor, Inc. + * Copyright (c) 2008 Secret Lab Technologies Ltd. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include "ops.h" +#include "types.h" +#include "io.h" +#include "stdio.h" +#include "libfdt/libfdt.h" + +BSS_STACK(4*1024); + +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, + unsigned long r6, unsigned long r7) +{ + const u32 *na, *ns, *reg, *timebase; + u64 memsize64; + int node, size, i; + + /* Make sure FDT blob is sane */ + if (fdt_check_header(_dtb_start) != 0) + fatal("Invalid device tree blob\n"); + + /* Find the #address-cells and #size-cells properties */ + node = fdt_path_offset(_dtb_start, "/"); + if (node < 0) + fatal("Cannot find root node\n"); + na = fdt_getprop(_dtb_start, node, "#address-cells", &size); + if (!na || (size != 4)) + fatal("Cannot find #address-cells property"); + ns = fdt_getprop(_dtb_start, node, "#size-cells", &size); + if (!ns || (size != 4)) + fatal("Cannot find #size-cells property"); + + /* Find the memory range */ + node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type", + "memory", sizeof("memory")); + if (node < 0) + fatal("Cannot find memory node\n"); + reg = fdt_getprop(_dtb_start, node, "reg", &size); + if (size < (*na+*ns) * sizeof(u32)) + fatal("cannot get memory range\n"); + + /* Only interested in memory based at 0 */ + for (i = 0; i < *na; i++) + if (*reg++ != 0) + fatal("Memory range is not based at address 0\n"); + + /* get the memsize and trucate it to under 4G on 32 bit machines */ + memsize64 = 0; + for (i = 0; i < *ns; i++) + memsize64 = (memsize64 << 32) | *reg++; + if (sizeof(void *) == 4 && memsize64 >= 0x100000000ULL) + memsize64 = 0xffffffff; + + /* finally, setup the timebase */ + node = fdt_node_offset_by_prop_value(_dtb_start, -1, "device_type", + "cpu", sizeof("cpu")); + if (!node) + fatal("Cannot find cpu node\n"); + timebase = fdt_getprop(_dtb_start, node, "timebase-frequency", &size); + if (timebase && (size == 4)) + timebase_period_ns = 1000000000 / *timebase; + + /* Now we have the memory size; initialize the heap */ + simple_alloc_init(_end, memsize64 - (unsigned long)_end, 32, 64); + + /* prepare the device tree and find the console */ + fdt_init(_dtb_start); + serial_console_init(); +} diff --git a/arch/powerpc/boot/treeboot-walnut.c b/arch/powerpc/boot/treeboot-walnut.c index 472e366..097974e 100644 --- a/arch/powerpc/boot/treeboot-walnut.c +++ b/arch/powerpc/boot/treeboot-walnut.c @@ -68,7 +68,7 @@ static void walnut_fixups(void) ibm4xx_quiesce_eth((u32 *)0xef600800, NULL); ibm4xx_fixup_ebc_ranges("/plb/ebc"); walnut_flashsel_fixup(); - dt_fixup_mac_addresses((u8 *) WALNUT_OPENBIOS_MAC_OFF); + dt_fixup_mac_address_by_alias("ethernet0", (u8 *) WALNUT_OPENBIOS_MAC_OFF); } void platform_init(void) diff --git a/arch/powerpc/boot/virtex405-head.S b/arch/powerpc/boot/virtex405-head.S new file mode 100644 index 0000000..3edb13f --- /dev/null +++ b/arch/powerpc/boot/virtex405-head.S @@ -0,0 +1,30 @@ +#include "ppc_asm.h" + + .text + .global _zimage_start +_zimage_start: + + /* PPC errata 213: needed by Virtex-4 FX */ + mfccr0 0 + oris 0,0,0x50000000@h + mtccr0 0 + + /* + * Invalidate the data cache if the data cache is turned off. + * - The 405 core does not invalidate the data cache on power-up + * or reset but does turn off the data cache. We cannot assume + * that the cache contents are valid. + * - If the data cache is turned on this must have been done by + * a bootloader and we assume that the cache contents are + * valid. + */ + mfdccr r9 + cmplwi r9,0 + bne 2f + lis r9,0 + li r8,256 + mtctr r8 +1: dccci r0,r9 + addi r9,r9,0x20 + bdnz 1b +2: b _zimage_start_lib diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper index 8f8b849..d6c96d9 100755 --- a/arch/powerpc/boot/wrapper +++ b/arch/powerpc/boot/wrapper @@ -174,7 +174,7 @@ cuboot*) *-mpc83*) platformo=$object/cuboot-83xx.o ;; - *-tqm8541|*-mpc8560*|*-tqm8560|*-tqm8555) + *-tqm8541|*-mpc8560*|*-tqm8560|*-tqm8555|*-ksi8560*) platformo=$object/cuboot-85xx-cpm2.o ;; *-mpc85*|*-tqm8540|*-sbc85*) @@ -199,6 +199,10 @@ adder875-redboot) platformo="$object/fixed-head.o $object/redboot-8xx.o" binary=y ;; +simpleboot-virtex405-*) + platformo="$object/virtex405-head.o $object/simpleboot.o" + binary=y + ;; esac vmz="$tmpdir/`basename \"$kernel\"`.$ext" @@ -226,10 +230,13 @@ if [ -n "$version" ]; then uboot_version="-n Linux-$version" fi +# physical offset of kernel image +membase=`${CROSS}objdump -p "$kernel" | grep -m 1 LOAD | awk '{print $7}'` + case "$platform" in uboot) rm -f "$ofile" - mkimage -A ppc -O linux -T kernel -C gzip -a 00000000 -e 00000000 \ + mkimage -A ppc -O linux -T kernel -C gzip -a $membase -e $membase \ $uboot_version -d "$vmz" "$ofile" if [ -z "$cacheit" ]; then rm -f "$vmz" @@ -298,15 +305,16 @@ treeboot*) exit 0 ;; ps3) - # The ps3's loader supports loading gzipped binary images from flash - # rom to addr zero. The loader enters the image at addr 0x100. A - # bootwrapper overlay is use to arrange for the kernel to be loaded - # to addr zero and to have a suitable bootwrapper entry at 0x100. - # To construct the rom image, 0x100 bytes from offset 0x100 in the - # kernel is copied to the bootwrapper symbol __system_reset_kernel. - # The 0x100 bytes at the bootwrapper symbol __system_reset_overlay is - # then copied to offset 0x100. At runtime the bootwrapper program - # copies the 0x100 bytes at __system_reset_kernel to addr 0x100. + # The ps3's loader supports loading a gzipped binary image from flash + # rom to ram addr zero. The loader then enters the system reset + # vector at addr 0x100. A bootwrapper overlay is used to arrange for + # a binary image of the kernel to be at addr zero, and yet have a + # suitable bootwrapper entry at 0x100. To construct the final rom + # image 512 bytes from offset 0x100 is copied to the bootwrapper + # place holder at symbol __system_reset_kernel. The 512 bytes of the + # bootwrapper entry code at symbol __system_reset_overlay is then + # copied to offset 0x100. At runtime the bootwrapper program copies + # the data at __system_reset_kernel back to addr 0x100. system_reset_overlay=0x`${CROSS}nm "$ofile" \ | grep ' __system_reset_overlay$' \ @@ -317,7 +325,7 @@ ps3) | cut -d' ' -f1` system_reset_kernel=`printf "%d" $system_reset_kernel` overlay_dest="256" - overlay_size="256" + overlay_size="512" ${CROSS}objcopy -O binary "$ofile" "$ofile.bin" |