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* x86: style cleanup of ioremap codeThomas Gleixner2008-01-302-75/+70
| | | | | | | | Fix the coding style before going further. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: fix ioremap pgprot inconsistencyThomas Gleixner2008-01-301-2/+2
| | | | | | | | | | | The pgprot flags which are handed into ioremap_page_range() are different to those which are set in change_page_attr(). The ioremap_page_range flags are executable, while the c_p_a flags are not. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: fix ioremap pgprot inconsistencyThomas Gleixner2008-01-301-2/+1
| | | | | | | | | | | | | The pgprot flags which are handed into ioremap_page_range() are different to those which are set in change_page_attr(). The ioremap_page_range flags are executable, while the c_p_a flags are not. Also make the mappings global (which is a NOP currently on 32bit, although CPUs from PPRO+ onwards support it, but that's a separate fix.) Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Ingo Molnar <mingo@elte.hu>
* x86: turn the check_exec function into function thatArjan van de Ven2008-01-301-10/+37
| | | | | | | | | | | | | | | | | | | What the check_exec() function really is trying to do is enforce certain bits in the pgprot that are required by the x86 architecture, but that callers might not be aware of (such as NX bit exclusion of the BIOS area for BIOS based PCI access; it's not uncommon to ioremap the BIOS region for various purposes and normally ioremap() memory has the NX bit set). This patch turns the check_exec() function into static_protections() which also is now used to make sure the kernel text area remains non-NX and that the .rodata section remains read-only. If the architecture ends up requiring more such mandatory prot settings for specific areas, this is now a reasonable place to add these. Signed-off-by: Arjan van de Ven <arjan@linux.intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: cpa: make self-test depend on DEBUG_KERNELIngo Molnar2008-01-301-0/+1
| | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: ioremap_nocache fixHuang, Ying2008-01-301-0/+7
| | | | | | | | | | | | | | This patch fixes a bug of ioremap_nocache. ioremap_nocache() will call __ioremap() with flags != 0 to do the real work, which will call change_page_attr_addr() if phys_addr + size - 1 < (end_pfn_map << PAGE_SHIFT). But some pages between 0 ~ end_pfn_map << PAGE_SHIFT are not mapped by identity map, this will make change_page_attr_addr failed. This patch is based on latest x86 git and has been tested on x86_64 platform. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: add PAGE_KERNEL_EXEC_NOCACHEIngo Molnar2008-01-301-0/+2
| | | | | | | add PAGE_KERNEL_EXEC_NOCACHE. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: fix NX bit handling in change_page_attr()Huang, Ying2008-01-301-1/+6
| | | | | | | | | | | | | | | | This patch fixes a bug of change_page_attr/change_page_attr_addr on Intel i386/x86_64 CPUs. After changing page attribute to be executable with these functions, the page remains un-executable on Intel i386/x86_64 CPU. Because on Intel i386/x86_64 CPU, only if the "NX" bits of all three level page tables are cleared (PAE is enabled), the corresponding page is executable (refer to section 4.13.2 of Intel 64 and IA-32 Architectures Software Developer's Manual). So, the bug is fixed through clearing the "NX" bit of PMD when splitting the huge PMD. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: change cpa to pfn basedIngo Molnar2008-01-301-5/+8
| | | | | | | change CPA to pfn based. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: keep the BIOS area executableIngo Molnar2008-01-301-7/+22
| | | | | | | keep the BIOS area executable. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: add PG_LEVEL enumThomas Gleixner2008-01-303-6/+13
| | | | | | | this way PG_LEVEL_1GB will be an easy change. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: clean up lookup_address() declarationsThomas Gleixner2008-01-303-10/+8
| | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: clean up arch/x86/mm/pageattr.cIngo Molnar2008-01-302-8/+7
| | | | | | | | do some leftover cleanups in the now unified arch/x86/mm/pageattr.c file. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: re-add clflush_cache_range()Ingo Molnar2008-01-301-0/+8
| | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: unify pageattr_32.c and pageattr_64.cIngo Molnar2008-01-304-286/+2
| | | | | | | unify the now perfectly identical pageattr_32/64.c files - no code changed. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: prepare for pageattr.c unificationIngo Molnar2008-01-301-8/+0
| | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: backmerge 64-bit details into 32-bit pageattr.cIngo Molnar2008-01-301-47/+87
| | | | | | | | | backmerge 64-bit details into 32-bit pageattr.c. the pageattr_32.c and pageattr_64.c files are now identical. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: enable DEBUG_PAGEALLOC on 64-bitIngo Molnar2008-01-301-1/+0
| | | | | | | | | enable CONFIG_DEBUG_PAGEALLOC=y on 64-bit kernels too. preliminary testing shows that it's working fine. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: add kernel_map_pages() to 64-bitIngo Molnar2008-01-301-0/+30
| | | | | | | needed for DEBUG_PAGEALLOC support and for unification. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: return -EINVAL in __change_page_attr(), instead of 0Ingo Molnar2008-01-301-1/+1
| | | | | | | | careful: might change driver behavior - but this is the right return value. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: clean up differences between 64-bit and 32-bitIngo Molnar2008-01-301-5/+11
| | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: 64-bit, add the new split_large_page() functionIngo Molnar2008-01-301-24/+71
| | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: 64-bit pageattr.c, prepare for unificationIngo Molnar2008-01-301-4/+8
| | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: change 64-bit pageattr to use set_pte_atomic()Ingo Molnar2008-01-301-2/+2
| | | | | | | NOP change - same as set_pte(). Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: change 64-bit __change_page_attr() to struct pageIngo Molnar2008-01-301-4/+4
| | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: simplify __change_page_attr()Ingo Molnar2008-01-301-29/+18
| | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: introduce native_set_pte_atomic() on 64-bit tooIngo Molnar2008-01-301-0/+5
| | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: clean up and simplify 64-bit split_large_page()Ingo Molnar2008-01-301-7/+7
| | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: unify header part of pageattr_64.cIngo Molnar2008-01-301-1/+2
| | | | | Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: simplify pageattr_64.cIngo Molnar2008-01-301-113/+55
| | | | | | | simplify pageattr_64.c. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: prepare for the unification of the cpa codeIngo Molnar2008-01-301-8/+3
| | | | | | | | prepare for the unification of the cpa code, by unifying the lookup_address() logic between 32-bit and 64-bit. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: prepare for the unification of the cpa codeIngo Molnar2008-01-302-5/+5
| | | | | | | | prepare for the unification of the cpa code, by unifying the lookup_address() logic between 32-bit and 64-bit. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: cpa self-test, WARN_ON()Ingo Molnar2008-01-301-2/+4
| | | | | | | add a WARN_ON() to the cpa-self-test failure branch. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: do not PSE on CONFIG_DEBUG_PAGEALLOC=yIngo Molnar2008-01-305-14/+29
| | | | | | | | | | | | | | get more testing of the c_p_a() code done by not turning off PSE on DEBUG_PAGEALLOC. this simplifies the early pagetable setup code, and tests the largepage-splitup code quite heavily. In the end, all the largepages will be split up pretty quickly, so there's no difference to how DEBUG_PAGEALLOC worked before. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: cpa: simplify lockingIngo Molnar2008-01-301-7/+5
| | | | | | | | | | | further simplify cpa locking: since the largepage-split is a slowpath, use the pgd_lock for the whole operation, intead of the mmap_sem. This also makes it suitable for DEBUG_PAGEALLOC purposes again. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: simplify cpa largepage split, #3Ingo Molnar2008-01-301-14/+5
| | | | | | | | simplify cpa largepage split: push the reference protection bits into the largepage-splitting function. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: cpa self-test fixesIngo Molnar2008-01-302-11/+7
| | | | | | | | cpa self-test fixes. change_page_attr_addr() was buggy, it passed in a virtual address as a physical one. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: further cpa largepage-split cleanupsIngo Molnar2008-01-301-40/+49
| | | | | | | | further cpa largepage-split cleanups: make the splitup isolated functionality, without leaking details back into __change_page_attr(). Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: simplify 32-bit cpa largepage splittingIngo Molnar2008-01-301-6/+8
| | | | | | | | simplify 32-bit cpa largepage splitting: do a pure split and repeat the pte lookup to get the new pte modified. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: simplify the 32-bit cpa codeIngo Molnar2008-01-301-123/+56
| | | | | | | simplify the 32-bit cpa code. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: fix some bugs about EFI runtime code mappingHuang, Ying2008-01-303-26/+36
| | | | | | | | | | | | | | | | | This patch fixes some bugs of making EFI runtime code executable. - Use change_page_attr in i386 too. Because the runtime code may be mapped not through ioremap. - If there is no _PAGE_NX in __supported_pte_mask, the change_page_attr is not called. - Make efi_ioremap map pages as PAGE_KERNEL_EXEC_NOCACHE, because EFI runtime code may be mapped through efi_ioremap. Signed-off-by: Huang Ying <ying.huang@intel.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: fix more non-global TLB flushesIngo Molnar2008-01-301-1/+1
| | | | | | | fix more __flush_tlb() instances, out of caution. Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: fix early_ioremap() on 64-bitAndi Kleen2008-01-301-3/+3
| | | | | | | | | | | | | | | | | | | | | Fix early_ioremap() on x86-64 I had ACPI failures on several machines since a few days. Symptom was NUMA nodes not getting detected or worse cores not getting detected. They all came from ACPI not being able to read various of its tables. I finally bisected it down to Jeremy's "put _PAGE_GLOBAL into PAGE_KERNEL" change. With that the fix was fairly obvious. The problem was that early_ioremap() didn't use a "_all" flush that would affect the global PTEs too. So with global bits getting used everywhere now an early_ioremap would not actually flush a mapping if something else was mapped previously on that slot (which can happen with early_iounmap inbetween) This patch changes all flushes in init_64.c to be __flush_tlb_all() and fixes the problem here. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: remove set_kernel_exec()Andi Kleen2008-01-303-52/+0
| | | | | | | | | | | | The SMP trampoline always runs in real mode, so making it executable in the page tables doesn't make much sense because it executes before page tables are set up. That was the only user of set_kernel_exec(). Remove set_kernel_exec(). Signed-off-by: Andi Kleen <ak@suse.de> Acked-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: introduce canon_pgprot()Andi Kleen2008-01-301-0/+2
| | | | | | | | Introduce canon_pgprot() Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: c_p_a() make it more robust against use of PAT bitsAndi Kleen2008-01-302-4/+4
| | | | | | | | | | | | Use the page table level instead of the PSE bit to check if the PTE is for a 4K page or not. This makes the code more robust when the PAT bit is changed because the PAT bit on 4K pages is in the same position as the PSE bit. Signed-off-by: Andi Kleen <ak@suse.de> Acked-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: c_p_a() fix: reorder TLB / cache flushes to follow Intel recommendationAndi Kleen2008-01-302-7/+8
| | | | | | | | | | | | | | | | | | | | | Intel recommends to first flush the TLBs and then the caches on caching attribute changes. c_p_a() previously did it the other way round. Reorder that. The procedure is still not fully compliant to the Intel documentation because Intel recommends a all CPU synchronization step between the TLB flushes and the cache flushes. However on all new Intel CPUs this is now meaningless anyways because they support Self-Snoop and can skip the cache flush step anyway. [ mingo@elte.hu: decoupled from clflush and ported it to x86.git ] Signed-off-by: Andi Kleen <ak@suse.de> Acked-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: fix c_p_a() boot crashAndi Kleen2008-01-301-2/+2
| | | | | | | | | | | | | | | | | | | | fix: > hm, i just found a failing 64-bit .config while testing your CPA > patchset: > > [ 1.916541] CPA mapping 4k 0 large 2048 gb 0 x 0[0-0] miss 0 > [ 1.919874] Unable to handle kernel paging request at 000000000335aea8 RIP: > [ 1.919874] [<ffffffff8021d2d3>] change_page_attr+0x3/0x61 > [ 1.919874] PGD 0 > [ 1.919874] Oops: 0000 [1] > [ 1.919874] CPU 0 This handles addresses which don't have a mem_map entry. Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: don't drop NX bit in pte modifier functions on 32-bitAndi Kleen2008-01-301-6/+6
| | | | | | | | | | | | | | | The pte_* modifier functions that cleared bits dropped the NX bit on 32bit PAE because they only worked in int, but NX is in bit 63. Fix that by adding appropiate casts so that the arithmetic happens as long long on PAE kernels. I decided to just use 64bit arithmetic instead of open coding like pte_modify() because gcc should generate good enough code for that now. Signed-off-by: Andi Kleen <ak@suse.de> Acked-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
* x86: add pte_pgprot to 32-bitAndi Kleen2008-01-302-2/+2
| | | | | | | | | | | 64bit already had it. Needed for later patches. Signed-off-by: Andi Kleen <ak@suse.de> Acked-by: Jan Beulich <jbeulich@novell.com> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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