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* | | | | sh: Restore RTC IRQ setting for SH7763 setup.Nobuhiro Iwamatsu2009-03-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was accidentally dropped in the multiple vectors per irq conversion. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | | sh: multiple vectors per irq - sh7763Nobuhiro Iwamatsu2009-03-061-76/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs. This fixes potential irq masking issues for sh7763 hardware blocks such as RTC/SCIF/DMAC/GETHER/PCIC5/MMCIF/SIM/GPIO/USBF. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | | sh: Add support for SH7786 CPU subtype.Kuninori Morimoto2009-03-037-0/+1517
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds preliminary support for the SH7786 CPU subtype. While this is a dual-core CPU, only UP is supported for now. L2 cache support is likewise not yet implemented. More information on this particular CPU subtype is available at: http://www.renesas.com/fmwk.jsp?cnt=sh7786_root.jsp&fp=/products/mpumcu/superh_family/sh7780_series/sh7786_group/ Signed-off-by: Kuninori Morimoto <morimoto.kuninori@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | | sh: Fix up SH-X3 general exception handler build.Paul Mundt2009-02-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the recent entry.S refactoring, the SH-X3 path had a mov.l for a register to register copy, resulting in: AS arch/sh/kernel/cpu/sh4/../sh3/entry.o arch/sh/kernel/cpu/sh4/../sh3/entry.S: Assembler messages: arch/sh/kernel/cpu/sh4/../sh3/entry.S:366: Error: invalid operands for opcode make[3]: *** [arch/sh/kernel/cpu/sh4/../sh3/entry.o] Error 1 Switch it over to a mov to fix it up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | | sh: multiple vectors per irq - sh7785Magnus Damm2009-02-271-63/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs. This fixes potential irq masking issues for sh7785 hardware blocks such as SCIF/DMAC/PCIC5/MMCIF/GDTA/FLCTL/GPIO Signed-off-by: Magnus Damm <damm@igel.co.jp> Tested-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | | sh: multiple vectors per irq - sh7780Magnus Damm2009-02-271-67/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs. This fixes potential irq masking issues for sh7780 hardware blocks such as SCIF/RTC/DMAC/PCIC5/MMCIF/FLCTL/GPIO Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | | sh: multiple vectors per irq - sh7750Magnus Damm2009-02-271-62/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update intc tables and platform data to use one linux irq per maskable interrupt source instead of keeping the one-to-one mapping between vectors and linux irqs. This fixes potential irq masking issues for sh775x hardware blocks such as SCI/SCIF/RTC/DMAC/TMU2/REF. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | | sh: multiple vectors per irq - baseMagnus Damm2009-02-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of keeping the single vector -> single linux irq mapping we extend the intc code to support merging of vectors to a single linux irq. This helps processors such as sh7750, sh7780 and sh7785 which have more vectors than masking ability. With this patch in place we can modify the intc tables to use one irq per maskable irq source. Please note the following: - If multiple vectors share the same enum then only the first vector will be available as a linux irq. - Drivers may need to be rewritten to get pending irq source from the hardware block instead of irq number. This patch together with the sh7785 specific intc tables solves DMA controller irq issues related to buggy interrupt masking. Reported-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | | sh: prefetch early exception data on sh4/sh4a.Magnus Damm2009-02-271-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prefetch early exception data. There is unused space in our exception handler cache line anyway, so this is almost free. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | | sh: remove EXPEVT vector from stack on sh3/sh4/sh4aMagnus Damm2009-02-271-4/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove EXPEVT vector from the stack, lookup_exception_vector() for sh3/sh4/sh4a is already using k2 to get the vector. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | | sh: rework register restore code for sh3/sh4/sh4aMagnus Damm2009-02-271-35/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch reworks the sh3/sh4/sh4a register restore code in the following ways: - break out restore_regs() from restore_all() - the register saving order is unchanged - use restore_regs() in sh_bios_handler and restore_all - document the function Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | | sh: shared register saving code for sh3/sh4/sh4aMagnus Damm2009-02-271-126/+147
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch reworks the sh3/sh4/sh4a register saving code in the following ways: - break out prepare_stack_save_dsp() from handle_exception() - break out save_regs() from handle_exception() - the register saving order is unchanged - align new functions to fit in cache lines - separate exception code from interrupt code - keep main code flow in a single cache line per exception vector - use bsr/rts for regular functions (save pr first) - keep data in one shared cache line (exception_data) - document the functions - tie in the hp6xx code Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | | Merge branch 'sh/stable-updates'Paul Mundt2009-02-121-2/+2
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| * | | | sh: Storage class should be before const qualifierTobias Klauser2009-02-121-2/+2
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The C99 specification states in section 6.11.5: The placement of a storage-class specifier other than at the beginning of the declaration specifiers in a declaration is an obsolescent feature. Signed-off-by: Tobias Klauser <tklauser@distanz.ch> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | sh: Don't enable GENERIC_TIME for the CMT clockevent driver yet.Paul Mundt2009-01-291-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | GENERIC_TIME still depends on the clocksource bits being there, which is presently not supported. This allows the CMT clockevent driver to be used alongside alternate system timers that do not yet provide a clocksource of their own (MTU2 and so on in the case of SH-2A). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | sh: Fix up MTU2 support for SH7203.Paul Mundt2009-01-291-1/+2
| | | | | | | | | | | | | | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | sh: CMT platform data for sh7723/sh7722/sh7366/sh7343Magnus Damm2009-01-294-0/+136
| | | | | | | | | | | | | | | | | | | | | | | | | | | | CMT platform data for SuperH Mobile sh7723/sh7722/sh7343/sh7366. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | sh: fix no sys_timer caseMagnus Damm2009-01-291-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Handle the case with a sys_timer set to NULL. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | sh: tmu disable supportMagnus Damm2009-01-291-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add TMU disable support so we can use other clockevents. Also, setup the clockevent rating. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | sh: rework clocksource and sched_clockMagnus Damm2009-01-292-52/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rework and simplify the sched_clock and clocksource code. Instead of registering the clocksource in a shared file we move it into the tmu driver. Also, add code to handle sched_clock in the case of no clocksource. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | Merge branch 'sh/stable-updates'Paul Mundt2009-01-294-11/+7
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| * | | sh: Fix up spurious syscall restarting.Paul Mundt2009-01-292-6/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The T-bit manipulation for syscall error checking had the side effect of spuriously returning ERESTART* errno values over EINTR. So, we simplify the error checking a bit and leave the T-bit alone. Reported-by: Kaz Kojima <kkojima@rr.iij4u.or.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | sh: fcnvds fix with denormalized numbers on SH-4 FPU.Carmelo AMOROSO2009-01-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This fixes a bug in the FPU exception handler for the FCNVDS instruction. To get the register number the instruction is shifted right by 9, though it should be shifted right by 8. More information at ST Linux bugzilla: https://bugzilla.stlinux.com/show_bug.cgi?id=4892 Signed-off-by: Giuseppe Di Giore <giuseppe.di-giore@st.com> Signed-off-by: Carmelo Amoroso <carmelo.amoroso@st.com> Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
| * | | sh: Only reserve memory under CONFIG_ZERO_PAGE_OFFSET when it != 0.Christopher SMITH2009-01-291-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Chris Smith <chris.smith@st.com> Signed-off-by: Stuart Menefy <stuart.menefy@st.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | sh: Fix up GENERIC_GPIO build for ARCH_WANT_OPTIONAL_GPIO cases.Paul Mundt2009-01-272-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CPUs define pinmux tables through the optional interface, while boards that require demux of their own require it explicitly. Roll the Makefile rules back to depend on GENERIC_GPIO, which covers both cases. Fixes a link error with an undefined reference to register_pinmux() on optional platforms. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | sh: use gpiolibMagnus Damm2009-01-273-55/+55
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch updates the SuperH gpio code to make use of gpiolib. The gpiolib callbacks get() and set() are lockless, but we use our own spinlock for the other operations to make sure hardware register bitfield accesses stay atomic. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | sh: lockless gpio_set_value()Magnus Damm2009-01-271-25/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch optimizes the gpio data register handling for gpio_set_value(). Instead of using the good old spinlock-plus-read-modify-write strategy we now use a shadow register and atomic operations. This improves the bitbanging mmc performance on Migo-R from 26 Kbytes/s to 40 Kbytes/s. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | sh: lockless gpio_get_value()Magnus Damm2009-01-271-63/+63
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch separates the register read and write functions to allow lockless gpio_get_value(). Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | | sh: make gpio_get/set_value() O(1)Magnus Damm2009-01-271-11/+37
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch modifies the table based SuperH gpio implementation to make use of direct table lookups. With this change the functions gpio_get_value() and gpio_set_value() are O(1). Tested on Migo-R using bitbanging mmc. Performance is improved from 11 KBytes/s to 26 Kbytes/s. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | sh: fix unaligned and nonexistent address handlingSUGIOKA Toshinobu2009-01-211-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | unaligned and nonexistent address causes wrong exception handling in traps_32.c(handle_unaligned_access). 'handle_unalinged_ins' should return -EFAULT if address error is fixed up with kernel exception table, otherwise 'handle_unaligned_access' increases already fixed program counter and then crash. for example ioctl(fd, TCGETA, (struct termio *)-1) never return and stay in TASK_UNINTERRUPTIBLE state forever in my kernel. Signed-off-by: SUGIOKA Toshinobu <sugioka@itonet.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | sh: export the sh7343 JPU to user spaceMagnus Damm2009-01-212-1/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch exports the sh7343 JPU to user space using uio_pdrv_genirq, very similar to the sh7722 JPU patch by Hayama-san. While at it fix up the end of the sh7722 JPU iomem resource. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | | sh: Drop the BKL from sys_execve() on SH-5.Paul Mundt2009-01-211-2/+0
|/ / | | | | | | | | | | | | Brings it in line with the SH implementation, the BKL is not necessary here. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | [CVE-2009-0029] Remove __attribute__((weak)) from sys_pipe/sys_pipe2Heiko Carstens2009-01-142-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | Remove __attribute__((weak)) from common code sys_pipe implemantation. IA64, ALPHA, SUPERH (32bit) and SPARC (32bit) have own implemantations with the same name. Just rename them. For sys_pipe2 there is no architecture specific implementation. Cc: Richard Henderson <rth@twiddle.net> Cc: David S. Miller <davem@davemloft.net> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Tony Luck <tony.luck@intel.com> Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
* | [CVE-2009-0029] Rename old_readdir to sys_old_readdirHeiko Carstens2009-01-142-2/+2
|/ | | | | | This way it matches the generic system call name convention. Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com>
* remove linux/hardirq.h from asm-generic/local.hRussell King2009-01-061-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While looking at reducing the amount of architecture namespace pollution in the generic kernel, I found that asm/irq.h is included in the vast majority of compilations on ARM (around 650 files.) Since asm/irq.h includes a sub-architecture include file on ARM, this causes a negative impact on the ccache's ability to re-use the build results from other sub-architectures, so we have a desire to reduce the dependencies on asm/irq.h. It turns out that a major cause of this is the needless include of linux/hardirq.h into asm-generic/local.h. The patch below removes this include, resulting in some 250 to 300 files (around half) of the kernel then omitting asm/irq.h. My test builds still succeed, provided two ARM files are fixed (arch/arm/kernel/traps.c and arch/arm/mm/fault.c) - so there may be negative impacts for this on other architectures. Note that x86 does not include asm/irq.h nor linux/hardirq.h in its asm/local.h, so this patch can be viewed as bringing the generic version into line with the x86 version. [kosaki.motohiro@jp.fujitsu.com: add #include <linux/irqflags.h> to acpi/processor_idle.c] [adobriyan@gmail.com: fix sparc64] Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'cpus4096-for-linus-2' of ↵Linus Torvalds2009-01-023-10/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip * 'cpus4096-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (66 commits) x86: export vector_used_by_percpu_irq x86: use logical apicid in x2apic_cluster's x2apic_cpu_mask_to_apicid_and() sched: nominate preferred wakeup cpu, fix x86: fix lguest used_vectors breakage, -v2 x86: fix warning in arch/x86/kernel/io_apic.c sched: fix warning in kernel/sched.c sched: move test_sd_parent() to an SMP section of sched.h sched: add SD_BALANCE_NEWIDLE at MC and CPU level for sched_mc>0 sched: activate active load balancing in new idle cpus sched: bias task wakeups to preferred semi-idle packages sched: nominate preferred wakeup cpu sched: favour lower logical cpu number for sched_mc balance sched: framework for sched_mc/smt_power_savings=N sched: convert BALANCE_FOR_xx_POWER to inline functions x86: use possible_cpus=NUM to extend the possible cpus allowed x86: fix cpu_mask_to_apicid_and to include cpu_online_mask x86: update io_apic.c to the new cpumask code x86: Introduce topology_core_cpumask()/topology_thread_cpumask() x86: xen: use smp_call_function_many() x86: use work_on_cpu in x86/kernel/cpu/mcheck/mce_amd_64.c ... Fixed up trivial conflict in kernel/time/tick-sched.c manually
| * cpumask: convert struct clock_event_device to cpumask pointers.Rusty Russell2008-12-133-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Impact: change calling convention of existing clock_event APIs struct clock_event_timer's cpumask field gets changed to take pointer, as does the ->broadcast function. Another single-patch change. For safety, we BUG_ON() in clockevents_register_device() if it's not set. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Cc: Ingo Molnar <mingo@elte.hu>
| * cpumask: centralize cpu_online_map and cpu_possible_mapRusty Russell2008-12-131-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Impact: cleanup Each SMP arch defines these themselves. Move them to a central location. Twists: 1) Some archs (m32, parisc, s390) set possible_map to all 1, so we add a CONFIG_INIT_ALL_POSSIBLE for this rather than break them. 2) mips and sparc32 '#define cpu_possible_map phys_cpu_present_map'. Those archs simply have phys_cpu_present_map replaced everywhere. 3) Alpha defined cpu_possible_map to cpu_present_map; this is tricky so I just manipulate them both in sync. 4) IA64, cris and m32r have gratuitous 'extern cpumask_t cpu_possible_map' declarations. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au> Reviewed-by: Grant Grundler <grundler@parisc-linux.org> Tested-by: Tony Luck <tony.luck@intel.com> Acked-by: Ingo Molnar <mingo@elte.hu> Cc: Mike Travis <travis@sgi.com> Cc: ink@jurassic.park.msu.ru Cc: rmk@arm.linux.org.uk Cc: starvik@axis.com Cc: tony.luck@intel.com Cc: takata@linux-m32r.org Cc: ralf@linux-mips.org Cc: grundler@parisc-linux.org Cc: paulus@samba.org Cc: schwidefsky@de.ibm.com Cc: lethal@linux-sh.org Cc: wli@holomorphy.com Cc: davem@davemloft.net Cc: jdike@addtoit.com Cc: mingo@redhat.com
* | take init_fs to saner placeAl Viro2008-12-311-1/+0
| | | | | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* | Merge branch 'for-linus' of git://git390.osdl.marist.edu/pub/scm/linux-2.6Linus Torvalds2008-12-281-2/+1
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'for-linus' of git://git390.osdl.marist.edu/pub/scm/linux-2.6: (85 commits) [S390] provide documentation for hvc_iucv kernel parameter. [S390] convert ctcm printks to dev_xxx and pr_xxx macros. [S390] convert zfcp printks to pr_xxx macros. [S390] convert vmlogrdr printks to pr_xxx macros. [S390] convert zfcp dumper printks to pr_xxx macros. [S390] convert cpu related printks to pr_xxx macros. [S390] convert qeth printks to dev_xxx and pr_xxx macros. [S390] convert sclp printks to pr_xxx macros. [S390] convert iucv printks to dev_xxx and pr_xxx macros. [S390] convert ap_bus printks to pr_xxx macros. [S390] convert dcssblk and extmem printks messages to pr_xxx macros. [S390] convert monwriter printks to pr_xxx macros. [S390] convert s390 debug feature printks to pr_xxx macros. [S390] convert monreader printks to pr_xxx macros. [S390] convert appldata printks to pr_xxx macros. [S390] convert setup printks to pr_xxx macros. [S390] convert hypfs printks to pr_xxx macros. [S390] convert time printks to pr_xxx macros. [S390] convert cpacf printks to pr_xxx macros. [S390] convert cio printks to pr_xxx macros. ...
| * | [S390] arch_setup_additional_pages argumentsMartin Schwidefsky2008-12-251-2/+1
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch_setup_additional_pages currently gets two arguments, the binary format descripton and an indication if the process uses an executable stack or not. The second argument is not used by anybody, it could be removed without replacement. What actually does make sense is to pass an indication if the process uses the elf interpreter or not. The glibc code will not use anything from the vdso if the process does not use the dynamic linker, so for statically linked binaries the architecture backend can choose not to map the vdso. Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Martin Schwidefsky <schwidefsky@de.ibm.com>
* | sh: add UIO support for JPU on SH7722.Takanari Hayama2008-12-221-0/+31
| | | | | | | | | | | | | | | | | | Add JPU support on Migo-R via UIO. This make use of Magnus's generic UIO platform driver. Chunk of contiguous memory to hold intermediate image and compressed data during encode and decode. Signed-off-by: Takanari Hayama <taki@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Conditionalize the code dumper on CONFIG_DUMP_CODE.Paul Mundt2008-12-221-1/+2
| | | | | | | | | | | | | | | | We don't really want this enabled by default, but it is still quite useful for debugging. So, make it conditional and leave it off by default. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Enable skipping of bss on debug platforms for sh32 also.Paul Mundt2008-12-221-2/+10
| | | | | | | | | | | | | | | | | | This enables the same functionality that sh64 has for sh32. When running on simulated hardware or via remote memory via the debug interface, memory is gauranteed to be zero on boot already, and skipping the zeroing of BSS has measurable boot time benefits. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Kill off cf-enabler with extreme prejudice.Paul Mundt2008-12-223-170/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that the rest of the boards that were using cf-enabler "generically" have switched to setting up their mappings on their own, only the mach-se boards were left using it. All of the cf-enabler using mach-se boards use a special initialization of the MRSHPC windows rather than going through the special PTE as other SH-4 platforms do. This consolidates the MRSHPC setup logic, hooks it up on the boards that care, and gets rid of any and all remaining references to cf-enabler. This has been long overdue, as cf-enabler has been the bane of arch/sh/kernel for the last 7 years. Good riddance. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Simplify kernel_thread_helper() for sh32.Paul Mundt2008-12-221-15/+4
| | | | | | | | | | | | | | | | | | | | | | This can use the same implementation as sh64, the generated assembly is the same between the new and old version, so there is not much point in leaving it open coded in inline assembly. This is preparatory work for future consolidation of the _32/_64 variants. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Kill off mv_heartbeat() from the machvec.Paul Mundt2008-12-222-10/+0
| | | | | | | | | | | | | | Nothing is using this any more, so get rid of it before anyone gets the bright idea to start using it again. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Kill off sh_bios_in_gdb_mode().Paul Mundt2008-12-221-17/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | With the reworked kgdb support, we always detach and reinitialize the stub. This was mostly a feature for handoffs between sh-ipl+g and the kgdb stub, but virtually no sh-ipl+g versions ever had this working right in the first place. Given that the sh-ipl+g stubs in general use today don't even support the GDB stub, and we have already killed off the special casing in the sh-sci serial driver, kill off this now unused symbol too. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: export sh_bios_get_node_addr() symbol for stnic module.Paul Mundt2008-12-221-2/+2
| | | | | | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
* | sh: Run sh_bios through a long overdue Lindent.Paul Mundt2008-12-221-36/+34
| | | | | | | | Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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