aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/dma
Commit message (Collapse)AuthorAgeFilesLines
* Merge branch 'for-linus' of ↵Linus Torvalds2011-03-183-4/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (47 commits) doc: CONFIG_UNEVICTABLE_LRU doesn't exist anymore Update cpuset info & webiste for cgroups dcdbas: force SMI to happen when expected arch/arm/Kconfig: remove one to many l's in the word. asm-generic/user.h: Fix spelling in comment drm: fix printk typo 'sracth' Remove one to many n's in a word Documentation/filesystems/romfs.txt: fixing link to genromfs drivers:scsi Change printk typo initate -> initiate serial, pch uart: Remove duplicate inclusion of linux/pci.h header fs/eventpoll.c: fix spelling mm: Fix out-of-date comments which refers non-existent functions drm: Fix printk typo 'failled' coh901318.c: Change initate to initiate. mbox-db5500.c Change initate to initiate. edac: correct i82975x error-info reported edac: correct i82975x mci initialisation edac: correct commented info fs: update comments to point correct document target: remove duplicate include of target/target_core_device.h from drivers/target/target_core_hba.c ... Trivial conflict in fs/eventpoll.c (spelling vs addition)
| * Remove one to many n's in a wordJustin P. Mattock2011-03-011-1/+1
| | | | | | | | | | Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
| * coh901318.c: Change initate to initiate.Justin P. Mattock2011-02-171-2/+2
| | | | | | | | | | | | Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
| * Merge branch 'master' into for-nextJiri Kosina2011-02-1510-794/+935
| |\
| * | Comment typo fixes for 'descriptor'Justin P. Mattock2011-01-191-1/+1
| | | | | | | | | | | | | | | Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
| | |
| \ \
| \ \
| \ \
*---. \ \ Merge branches 'defcfg', 'drivers' and 'cyberpro-next' of ↵Linus Torvalds2011-03-172-2/+2
|\ \ \ \ \ | | | | |/ | | | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | master.kernel.org:/home/rmk/linux-2.6-arm * 'defcfg' of master.kernel.org:/home/rmk/linux-2.6-arm: ARM: 6647/1: add Versatile Express defconfig ARM: 6644/1: mach-ux500: update the U8500 defconfig * 'drivers' of master.kernel.org:/home/rmk/linux-2.6-arm: ARM: 6764/1: pl011: factor out FIFO to TTY code ARM: 6763/1: pl011: add optional RX DMA to PL011 v2 ARM: 6758/1: amba: support pm ops ARM: amba: make amba_driver id_table const ARM: amba: make internal ID table handling const ARM: amba: make probe() functions take const id tables ARM: 6662/1: amba: make amba_bustype non-static ARM: mmci: add dmaengine-based DMA support ARM: mmci: no need for separate host->data_xfered ARM: mmci: avoid unnecessary switch to data available PIO interrupts ARM: mmci: no need to call flush_dcache_page() with sg_miter API ARM: mmci: avoid reporting too many completed bytes on fifo overrun ALSA: AACI: make fifo variables more explanitory ALSA: AACI: no need to call snd_pcm_period_elapsed() for each period ALSA: AACI: use snd_pcm_lib_period_bytes() ALSA: AACI: clean up AACI announcement printk ALSA: AACI: fix channel mask selection ALSA: AACI: fix number of channels for record ALSA: AACI: fix multiple IRQ claiming * 'cyberpro-next' of master.kernel.org:/home/rmk/linux-2.6-arm: VIDEO: cyberpro: remove unused cyber2000fb_get_fb_var() VIDEO: cyberpro: remove useless function extreg pointers VIDEO: cyberpro: update handling of device structures VIDEO: cyberpro: add support for video capture I2C VIDEO: cyberpro: make 'reg_b0_lock' always present VIDEO: cyberpro: add I2C support VIDEO: cyberpro: select lowest multipler/divisor for PLL
| | * | | ARM: amba: make probe() functions take const id tablesRussell King2011-02-232-2/+2
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make Primecell driver probe functions take a const pointer to their ID tables. Drivers should never modify their ID tables in their probe handler. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* | | | dt/powerpc: Eliminate users of of_platform_{,un}register_driverGrant Likely2011-02-283-22/+12
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | Get rid of old users of of_platform_driver in arch/powerpc. Most of_platform_driver users can be converted to use the platform_bus directly. Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
* | | Merge branch 'imx' into dmaengine-fixesDan Williams2011-02-142-39/+63
|\ \ \
| * \ \ Merge branch 'dmaengine-shawn' into dmaengineSascha Hauer2011-01-311-10/+6
| |\ \ \
| | * | | dmaengine: imx-sdma: fix up param for the last BD in sdma_prep_slave_sg()Shawn Guo2011-01-311-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As per the reference manual, bit "L" should be set while bit "C" should be cleared for the last buffer descriptor in the non-cyclic chain, so that sdma can stop trying to find the next BD and end the transfer. In case of sdma_prep_slave_sg(), BD_LAST needs to be set and BD_CONT be cleared for the last BD. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | dmaengine: imx-sdma: correct sdmac->status in sdma_handle_channel_loop()Shawn Guo2011-01-311-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sdma_handle_channel_loop() is the handler of cyclic tx. One period success does not really mean the success of the tx. Instead of DMA_SUCCESS, DMA_IN_PROGRESS should be the one to tell. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | dmaengine: imx-sdma: return sdmac->status in sdma_tx_status()Shawn Guo2011-01-311-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The sdmac->status was designed to reflect the status of the tx, so simply return it in sdma_tx_status(). Then dma client can call dma_async_is_tx_complete() to know the status of the tx. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | dmaengine: imx-sdma: set sdmac->status to DMA_ERROR in err_out of ↵Shawn Guo2011-01-311-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | sdma_prep_slave_sg() sdma_prep_dma_cyclic() sets sdmac->status to DMA_ERROR in err_out, and sdma_prep_slave_sg() needs to do the same. Otherwise, sdmac->status stays at DMA_IN_PROGRESS, which will make the function return immediately next time it gets called. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | dmaengine: imx-sdma: remove IMX_DMA_SG_LOOP handling in sdma_prep_slave_sg()Shawn Guo2011-01-311-6/+0
| | |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a leftover from the time that the driver did not have sdma_prep_dma_cyclic callback and implemented sound dma as a looped sg chain. And it can be removed now. Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | Merge branch 'dmaengine-sdma' into dmaengineSascha Hauer2011-01-311-25/+35
| |\ \ \
| | * | | dmaengine i.MX SDMA: reserve channel 0 by not registering itSascha Hauer2011-01-311-18/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need channel 0 of the sdma engine for internal purposes. We accomplished this by calling dma_request_channel() in the probe function. This does not work when multiple dma engines are present which is the case when IPU support for i.MX31/35 is compiled in. So instead of registering channel 0 and reserving it afterwards simply do not register it in the first place. With this the dmaengine channel counting does not match sdma channel counting anymore, so we have to use sdma channel counting in the driver. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | dmaengine i.MX SDMA: initialize dma capabilities outside channel loopSascha Hauer2011-01-311-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The capabilities are device specific fields, not channel specific fields. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | dmaengine i.MX SDMA: do not initialize chan_id fieldSascha Hauer2011-01-311-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is bogus as the dmaengine core will overwrite this field. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | dmaengine i.MX sdma: check sg entries for valid addresses and lengthsSascha Hauer2011-01-311-3/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch lets sdma_prep_slave_sg fail if the entries of an sg list do not start on multiples of the word size or if the lengths are not multiple of the word size. Also, catch the previously unhandled DMA_SLAVE_BUSWIDTH_8_BYTES and DMA_SLAVE_BUSWIDTH_UNDEFINED cases. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| | * | | dmaengine i.MX sdma: set maximum segment size for our deviceSascha Hauer2011-01-311-0/+3
| | |/ / | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | dmaengine i.MX dma: initialize dma capabilities outside channel loopSascha Hauer2011-01-311-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | The capabilities are device specific fields, not channel specific fields. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | dmaengine i.MX DMA: do not initialize chan_id fieldSascha Hauer2011-01-311-1/+0
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | dmaengine i.MX dma: check sg entries for valid addresses and lengthsSascha Hauer2011-01-311-0/+15
| | | | | | | | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| * | | dmaengine i.MX dma: set maximum segment size for our deviceSascha Hauer2011-01-311-0/+4
| |/ / | | | | | | | | | Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
* | | dma: ipu_idmac: do not lose valid received data in the irq handlerAnatolij Gustschin2011-02-141-50/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently when two or more buffers are queued by the camera driver and so the double buffering is enabled in the idmac, we lose one frame comming from CSI since the reporting of arrival of the first frame is deferred by the DMAIC_7_EOF interrupt handler and reporting of the arrival of the last frame is not done at all. So when requesting N frames from the image sensor we actually receive N - 1 frames in user space. The reason for this behaviour is that the DMAIC_7_EOF interrupt handler misleadingly assumes that the CUR_BUF flag is pointing to the buffer used by the IDMAC. Actually it is not the case since the CUR_BUF flag will be flipped by the FSU when the FSU is sending the <TASK>_NEW_FRM_RDY signal when new frame data is delivered by the CSI. When sending this singal, FSU updates the DMA_CUR_BUF and the DMA_BUFx_RDY flags: the DMA_CUR_BUF is flipped, the DMA_BUFx_RDY is cleared, indicating that the frame data is beeing written by the IDMAC to the pointed buffer. DMA_BUFx_RDY is supposed to be set to the ready state again by the MCU, when it has handled the received data. DMAIC_7_CUR_BUF flag won't be flipped here by the IPU, so waiting for this event in the EOF interrupt handler is wrong. Actually there is no spurious interrupt as described in the comments, this is the valid DMAIC_7_EOF interrupt indicating reception of the frame from CSI. The patch removes code that waits for flipping of the DMAIC_7_CUR_BUF flag in the DMAIC_7_EOF interrupt handler. As the comment in the current code denotes, this waiting doesn't help anyway. As a result of this removal the reporting of the first arrived frame is not deferred to the time of arrival of the next frame and the drivers software flag 'ichan->active_buffer' is in sync with DMAIC_7_CUR_BUF flag, so the reception of all requested frames works. This has been verified on the hardware which is triggering the image sensor by the programmable state machine, allowing to obtain exact number of frames. On this hardware we do not tolerate losing frames. This patch also removes resetting the DMA_BUFx_RDY flags of all channels in ipu_disable_channel() since transfers on other DMA channels might be triggered by other running tasks and the buffers should always be ready for data sending or reception. Signed-off-by: Anatolij Gustschin <agust@denx.de> Reviewed-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* | | DMA: PL08x: fix channel pausing to timeout rather than lockupRussell King - ARM Linux2011-01-301-6/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a transfer is initiated from memory to a peripheral, then data is fetched and the channel is marked busy. This busy status persists until the HALT bit is set and the queued data has been transfered to the peripheral. Waiting indefinitely after setting the HALT bit results in system lockups. Timeout this operation, and print an error when this happens. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* | | DMA: PL08x: fix infinite wait when terminating transfersRussell King - ARM Linux2011-01-301-14/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we try to pause a channel when terminating a transfer, we could end up spinning for it to become inactive indefinitely, and can result in an uninterruptible wait requiring a reset to recover from. Terminating a transfer is supposed to take effect immediately, but may result in data loss. To make this clear, rename the function to pl08x_terminate_phy_chan(). Also, make sure it is always consistently called - with the spinlock held and IRQs disabled, and ensure that the TC and ERR interrupt status is always cleared. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* | | dmaengine: imx-sdma: fix inconsistent naming in sdma_assign_cookie()Shawn Guo2011-01-291-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Variable name sdma and sdmac are consistently used as the pointer to sdma_engine and sdma_channel respectively throughout the file. The patch fixes the inconsistency seen in function sdma_assign_cookie(). Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* | | dmaengine: imx-sdma: propagate error in sdma_probe() instead of returning 0Shawn Guo2011-01-291-1/+1
| | | | | | | | | | | | | | | | | | Signed-off-by: Shawn Guo <shawn.guo@freescale.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* | | dmaengine i.MX SDMA: Fix firmware loadingSascha Hauer2011-01-291-1/+1
|/ / | | | | | | | | | | | | | | | | | | | | When loading the microcode to the SDMA engine we have to use the ram_code_start_addr found in the firmware image. The copy in the sdma engine is not initialized correctly. This is broken since: 5b28aa3 dmaengine i.MX SDMA: Allow to run without firmware Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
* | Merge branch 'next' of ↵Linus Torvalds2011-01-1710-794/+935
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx * 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (63 commits) ARM: PL08x: cleanup comments Update CONFIG_MD_RAID6_PQ to CONFIG_RAID6_PQ in drivers/dma/iop-adma.c ARM: PL08x: fix a warning Fix dmaengine_submit() return type dmaengine: at_hdmac: fix race while monitoring channel status dmaengine: at_hdmac: flags located in first descriptor dmaengine: at_hdmac: use subsys_initcall instead of module_init dmaengine: at_hdmac: no need set ACK in new descriptor dmaengine: at_hdmac: trivial add precision to unmapping comment dmaengine: at_hdmac: use dma_address to program DMA hardware pch_dma: support new device ML7213 IOH ARM: PL08x: prevent dma_set_runtime_config() reconfiguring memcpy channels ARM: PL08x: allow dma_set_runtime_config() to return errors ARM: PL08x: fix locking between prepare function and submit function ARM: PL08x: introduce 'phychan_hold' to hold on to physical channels ARM: PL08x: put txd's on the pending list in pl08x_tx_submit() ARM: PL08x: rename 'desc_list' as 'pend_list' ARM: PL08x: implement unmapping of memcpy buffers ARM: PL08x: store prep_* flags in async_tx structure ARM: PL08x: shrink srcbus/dstbus in txd structure ...
| * ARM: PL08x: cleanup commentsRussell King - ARM Linux2011-01-161-94/+52
| | | | | | | | | | | | | | | | | | Cleanup the formatting of comments, remove some which don't make sense anymore. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> [fix conflict with 96a608a4] Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * Update CONFIG_MD_RAID6_PQ to CONFIG_RAID6_PQ in drivers/dma/iop-adma.cWei Yongquan2011-01-141-2/+2
| | | | | | | | | | | | | | | | Commit f5e70d0fe3ea990cfb3fc8d7f76a719adcb1e0b5 renamed MD_RAID6_PQ to RAID6_PQ, but iop-adma.c didn't update synchronously. Signed-off-by: Wei Yongquan <weiyqlq@gmail.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * dmaengine: at_hdmac: fix race while monitoring channel statusNicolas Ferre2011-01-141-2/+2
| | | | | | | | | | | | | | | | We were reading channel status then taking a lock. This lead to a race because this lock may delay us and then make this channel not idle anymore. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * dmaengine: at_hdmac: flags located in first descriptorNicolas Ferre2011-01-141-3/+3
| | | | | | | | | | | | | | | | Place flags on first descriptor of chain instead of last. This is the one used by atc_chain_complete() function while unmapping. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * dmaengine: at_hdmac: use subsys_initcall instead of module_initEric Xu2011-01-141-1/+1
| | | | | | | | | | | | | | | | | | Use subsys_initcall instead of module_init in order to keep DMA engine rolling before other peripheral drivers. Signed-off-by: Eric Xu <hong.xu@atmel.com> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * dmaengine: at_hdmac: no need set ACK in new descriptorNicolas Ferre2011-01-141-1/+0
| | | | | | | | | | | | | | | | Following descriptor flow in at_hdmac driver, descriptor comming from atc_desc_get() as already DMA_CTRL_ACK flag set. No need to set it again. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * dmaengine: at_hdmac: trivial add precision to unmapping commentNicolas Ferre2011-01-141-1/+1
| | | | | | | | | | Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * dmaengine: at_hdmac: use dma_address to program DMA hardwareNicolas Ferre2011-01-141-2/+2
| | | | | | | | | | | | | | | | | | In atc_prep_slave_sg() function we use dma_address field of scatterlist with sg_dma_address() macro instead of sg_phys(). DMA address is already computed by dma_map_sg() or another mapping function in calling driver. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| * pch_dma: support new device ML7213 IOHTomoya MORINAGA2011-01-142-7/+21
| | | | | | | | | | | | | | | | | | | | Support new device OKI SEMICONDUCTOR's ML7213 IOH(Input/Output Hub) which is for IVI(In-Vehicle Infotainment) use. The ML7213 is companion chip for Intel Atom E6xx series. The ML7213 is completely compatible for Intel EG20T PCH. Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| *-. Merge branches 'amba' and 'dma40' into dmaengineDan Williams2011-01-074-680/+833
| |\ \
| | | * dmaengine: dma40: Add support to split up large elementsPer Forlin2011-01-043-130/+343
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The maximum transfer size of the stedma40 is (64k-1) x data-width. If the transfer size of one element exceeds this limit the job is split up and sent as linked transfer. Signed-off-by: Per Forlin <per.forlin@linaro.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| | * | ARM: PL08x: prevent dma_set_runtime_config() reconfiguring memcpy channelsRussell King - ARM Linux2011-01-041-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Prevent dma_set_runtime_config() being used to alter the configuration supplied by the platform for memcpy channel configuration. No one should be trying to change this configuration. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| | * | ARM: PL08x: allow dma_set_runtime_config() to return errorsRussell King - ARM Linux2011-01-041-10/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are cases in dma_set_runtime_config() where we fail to perform the requested action - and we just issue a KERN_ERR message in that case. We have the facility to return an error to the caller, so that is what we should do. When we encounter an error due to invalid parameters, we should not modify driver state. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| | * | ARM: PL08x: fix locking between prepare function and submit functionRussell King - ARM Linux2011-01-041-19/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PL08x driver holds on to the channel lock with interrupts disabled between the prepare and the subsequent submit API functions. This means that the locking state when the prepare function returns is dependent on whether it suceeeds or not. It did this to ensure that the physical channel wasn't released, and as it used to add the descriptor onto the pending list at prepare time rather than submit time. Now that we have reorganized the code to remove those reasons, we can now safely release the spinlock at the end of preparation and reacquire it in our submit function. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| | * | ARM: PL08x: introduce 'phychan_hold' to hold on to physical channelsRussell King - ARM Linux2011-01-041-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce 'phychan_hold' to hold on to physical DMA channels while we're preparing a new descriptor for it. This will be incremented when we allocate a physical channel and set the MUX registers during the preparation of the TXD, and will only be decremented when the TXD is submitted. This prevents the physical channel being given up before the new TXD is placed on the queue. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| | * | ARM: PL08x: put txd's on the pending list in pl08x_tx_submit()Russell King - ARM Linux2011-01-041-14/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't place TXDs on the pending list when they're prepared - place them on the list when they're ready to be submitted. Also, only place memcpy requests in the wait state when they're submitted and don't have a physical channel associated. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| | * | ARM: PL08x: rename 'desc_list' as 'pend_list'Russell King - ARM Linux2011-01-041-10/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This 'desc_list' is actually a list of pending descriptors, so name it after its function (pending list) rather than what it contains (descriptors). Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
| | * | ARM: PL08x: implement unmapping of memcpy buffersRussell King - ARM Linux2011-01-041-13/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DMA engine API requires DMA engine implementations to unmap buffers passed into the non-slave DMA methods unless the relevant completion flag is set. We aren't doing this, so implement this facility. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Acked-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
generated by cgit v1.1 at 2025-02-05 02:16:36 +0000