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* e1000e: 82579 unaccounted missed packetsBruce Allan2010-09-221-0/+1
| | | | | | | | | | | | | On 82579, there is a hardware bug that can cause received packets to not get transferred from the PHY to the MAC due to K1 (a power saving feature of the PHY-MAC interconnect similar to ASPM L1). Since the MAC controls the accounting of missed packets, these will go unnoticed. Workaround the issue by setting the K1 beacon duration according to the link speed. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: correct MAC-PHY interconnect register offset for 82579Bruce Allan2010-08-031-1/+1
| | | | | | | | | | | | The MAC-PHY interconnect register set on ICH/PCH parts is accessed through a peephole mechanism by writing an offset to a CSR register. The offset for the interconnect's half-duplex control register (which is used in a jumbo frame workaround for 82579) is incorrect. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* Merge branch 'master' of ↵David S. Miller2010-08-021-1/+1
|\ | | | | | | | | | | | | | | | | master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6 Conflicts: drivers/net/e1000e/hw.h net/bridge/br_device.c net/bridge/br_input.c
| * e1000e: 82577/82578 PHY register access issuesBruce Allan2010-07-271-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The MAC-PHY interconnect on 82577/82578 uses a power management feature (called K1) which must be disabled when in 1Gbps due to a hardware issue on these parts. The #define bit setting used to enable/disable K1 is incorrect and can cause PHY register accesses to stop working altogether until the next device reset. This patch sets the register correctly. This issue is present in kernels since 2.6.32. CC: stable@kernel.org Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | e1000e: update copyright informationBruce Allan2010-06-181-1/+1
| | | | | | | | | | | | | | Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | e1000e: enable support for EEE on 82579Bruce Allan2010-06-181-0/+1
| | | | | | | | | | | | | | | | | | | | | | This patch enables IEEE802.3az (a.k.a. Energy Efficient Ethernet) on the new 82579 LOMs. An optional module parameter is provided to disable the feature if desired. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* | e1000e: initial support for 82579 LOMsBruce Allan2010-06-181-2/+10
|/ | | | | | | Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: add PCI device id to enable support for 82567V-4Bruce Allan2010-05-121-0/+1
| | | | | | Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: move settting of flow control refresh timer to link setup codeBruce Allan2010-05-121-0/+1
| | | | | | | | | | The flow control refresh timer value needs to be saved off so that it can be programmed into the approrpiate register when applicable but without a reset, e.g. when changing flow control parameters via ethtool. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: fix checks for manageability enabled and management pass-throughBruce Allan2010-05-121-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The mac->arc_subsystem was being incorrectly used to flag whether or not manageability was enabled when it should only be used to state whether the ARC (Host interface) subsystem is available on a particular MAC _and_ only valid when any manageability is enabled. The ARC subsystem is currently only available on 80003es2lan and 82573 parts supported by the driver. A new flag, has_fwsm, is introduced to be used when checking if manageability is enabled but only on parts that acutally have an FWSM register. While the above parts have an FWSM register, there are other parts that have FWSM but do not have support for the ARC subsystem, namely 82571/2 and ICHx/PCH. And then there are parts that have manageability, but do not have either FWSM register or support for the ARC subsystem - these are 82574 and 82583. For 80003es2lan, 82571/2/3 and ICH/PCH parts, this patch makes no functional changes, it only corrects the usage of the manageability flags. For 82574 and 82583, it fixes the incorrect accesses of the non-existent FWSM register and ARC subsystem as well as corrects the check for management pass-through. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: initialize manageability (IPMI) pass-through in 82574/82583Bruce Allan2010-05-121-0/+2
| | | | | | | | | | 82574/82583 uses different registers/bits to setup manageability filters than all other parts supported by e1000e; set them accordingly for IPMI pass-through. Rename the function to better reflect what it does. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: genericize the update multicast address listBruce Allan2010-01-131-1/+5
| | | | | | | | | | Make updating the multicast address list generic for all families and enforce the requirement to update the entire multicast table array all at once instead of piecemeal which causes problems on some parts. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: provide MAC-family-specific function to set LAN IDBruce Allan2010-01-131-0/+1
| | | | | | | | | | | Provide MAC-specific function pointer to determine the LAN ID (PCI func). The LAN ID is used internally by the driver to determine which h/w lock to use to protect accessing the PHY on ESB2 as well as help to determine the alternate MAC address on some parts. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: use alternate MAC address on ESB2 if availableBruce Allan2010-01-131-1/+4
| | | | | | | | | | | Similar to 82571/2/3 parts that already do this, if ESB2/80003es2lan parts have an alternate MAC address provided in the EEPROM use it instead of the default MAC address. This patch makes the the actual code that does this generic so that it can be better used by both MAC families. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: perform 10/100 adaptive IFS only on parts that support itBruce Allan2010-01-081-0/+1
| | | | | | | | | | | | Adaptive IFS which involves writing to the Adaptive IFS Throttle register was being done for all devices supported by the driver even though it is not supported (i.e. the register doesn't even exist) on some devices. The feature is supported on 8257x/82583 and ICH/PCH based devices, but not on ESB2. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: only perform ESB2 MDIC workaround on certain configurationsBruce Allan2009-12-081-0/+5
| | | | | | | | | | | | A workaround added for all ESB2 devices (adds a delay for all MDIC accesses which resolves an issue with the MDIC ready bit being set prematurely) is applicable only to devices in which the MAC-PHY interconnect is not operating in a certain mode with in-band MDIO. Check the control register for the operating mode and enable the workaround accordingly. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: replace incorrect use of GG82563_REG macroBruce Allan2009-12-081-0/+2
| | | | | | | | | | | | The GG82563_REG() macro should not be used to determine the offset provided to the e1000e_[read|write]_kmrn_reg() functions since the first argument to the macro is already implied and gets masked off anyway in the functions. The resultant register reads/writes with this patch are functionally the same as before. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: refactor PHY ID detection workaroundBruce Allan2009-12-021-1/+1
| | | | | | | | | | | | The workaround that detects the correct PHY ID when an initial read of the PHY ID registers returns an invalid one should retry up to ten times with a small delay between attempts using a single PHY address and then repeat using the remaining possible PHY addresses. Do this instead of trying each possible PHY address repeating that up to 100 times. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: enable new 82567V-3 deviceBruce Allan2009-12-021-0/+1
| | | | | | | | | | | | This new PCI device ID is for a new combination of MAC and PHY both of which already have supporting code in the driver, just not yet in this combination. During validation of the device, an intermittent issue was discovered with waking it from a suspended state which can be resolved with the pre-existing workaround to disable gigabit speed prior to suspending. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: provide family-specific PHY power up/down operationsBruce Allan2009-12-021-0/+2
| | | | | | | | | | | | | | The different families (80003es2lan, 8257x, ICHx/PCH) supported by the driver each have their own conditions when the PHY can be powered down. This patch rewrites the PHY power up/down code to fit with the family- specific style used in the driver. All pre-existing calls to power up or down the PHY remain untouched. A new call to power down the PHY when removing the driver when the interface is down replaces the current call to reset the PHY in order to reduce power consumption. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: provide family-specific functions to manage VLAN filter arraysBruce Allan2009-12-021-0/+2
| | | | | | | | | | | | The two MAC-families that have VLAN filter table register arrays manage each a bit differently from one another, so provide family-specific functions for managing the register arrays and function pointers to access the appropriate function. Also make sure attempts to access these register arrays are not done on parts not supporting that feature. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: update copyright informationBruce Allan2009-11-211-1/+1
| | | | | | Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: cleanup ops function pointersBruce Allan2009-11-211-16/+16
| | | | | | | | | | The phy and nvm operations structures have function pointers that contain "phy" and "nvm" in the pointer names which are redundant since the structures are already obviously in phy and nvm structures. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: consolidate two dbug macros into one simpler oneBruce Allan2009-11-211-11/+0
| | | | | | | | This patch depends on a previous one that cleans up redundant #includes. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: rework disable K1 at 1000Mbps for 82577/82578Bruce Allan2009-10-291-0/+1
| | | | | | | | | | | | | This patch reworks a previous workaround (commit 7d3cabbcc) for an issue in hardware where noise on the interconnect between the MAC and PHY could be generated by a lower power mode (K1) at 1000Mbps resulting in bad packets. Disable K1 while at 1000 Mbps but keep it enabled for 10/100Mbps and when the cable is disconnected. The original version of this workaround was found to be incomplete. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: allow for swflag to be held over consecutive PHY accessesBruce Allan2009-10-261-0/+2
| | | | | | | | | | | | | | | | | | | | PCH-based parts (82577/82578) and some ICH8-based parts (82566) need to hold the swflag (sw/fw/hw hardware semaphore) over consecutive PHY accesses in order to perform sw-driven PHY configuration during initialization to workaround known hardware issues (see follow-on patch). This patch provides new PHY read/write functions (and function pointers) that will allow accessing the PHY registers assuming the swflag has already been acquired. The actual PHY register access code has moved into helper functions that are called with a flag indicating whether or not the swflag has already been acquired and acquires/releases it if not. The functions called from within the updated PHY access functions had to be updated to assume the swflag was already acquired, and other functions that called those functions were also updated to acquire/release the swflag. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: disable K1 at 1000Mbps for 82577/82578Bruce Allan2009-07-031-0/+4
| | | | | | | | | | | This workaround is required for an issue in hardware where noise on the interconnect between the MAC and PHY could be generated by a lower power mode (K1) at 1000Mbps resulting in bad packets. Disable K1 while at 1000 Mbps but keep it enabled for 10/100Mbps and when the cable is disconnected. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: Fixes possible phy corrupton on 82571 designs.Dave Graham2009-06-091-0/+2
| | | | | | | | | | | | | | | Phy corruption has been observed on 2-port 82571 adapters, and is root-caused to lack of synchronization between the 2 driver instances, which conflict when attempting to access the phy via the single MDIC register. A semaphore exists for this purpose, and is now used on these designs. Because PXE &/or EFI boot code (which we cannot expect to be built with this fix) may leave the inter-instance semaphore in an invalid initial state when the driver first loads, this fix also includes a one-time (per driver load) fix-up of the semaphore initial state. Signed-off-by: dave graham <david.graham@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: add support for 82577/82578 GbE LOM partsBruce Allan2009-06-031-1/+15
| | | | | | | | | | | | | | This patch provides support for the next generation Intel desktop and mobile gigabit ethernet LOM adapters. These adapters are the follow-on parts to the LOMs tied to the prior ICH chipsets and are comprised of a MAC in the PCH chipset and an external PHY (82577 for mobile and 82578 for desktop versions). New features consist of PHY wakeup to save power by completely turning off the MAC while in Sx state, and 4K jumbo frames. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* igb/e1000e: update PSSR_MDIX value to reflect correct bitAlexander Duyck2009-05-261-1/+1
| | | | | | | | | | | The phy port status register has the MDI-X status bit on bit 11, not bit 3 as is currently setup in the define. This patch corrects that so the correct bit is checked on igp PHY types. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Acked-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: add support for 82574 device ID 0x10F6Bruce Allan2009-03-241-0/+1
| | | | | | | | | Add device ID for a new variant of the 82574 adapter. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Acked-by: John Ronciak <john.ronciak@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: add support for 82583 device idAlexander Duyck2009-03-201-0/+2
| | | | | | | | | | Add device ID and related support for 82583 mac. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Acked-by: Radheka Godse <radheka.godse@intel.com> Acked-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: Serdes - attempt autoneg when link restored.dave graham2009-02-101-0/+8
| | | | | | | | | | | | This patch addresses an issue where we did not restart auto-negotiation on serdes links when the link partner was disabled and re-enabled. It includes reworking the serdes link detect mechanism to be a state machine for 82571 and 82572 parts only. Signed-off-by: dave graham <david.graham@intel.com> Acked-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: workaround hw errataJesse Brandeburg2009-01-261-0/+1
| | | | | | | | | | | | | There is a hardware errata in some revisions of the 82574 that needs to be worked around in the driver by setting a register bit at init. If this bit is not set A0 versions of the 82574 can generate tx hangs. Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: sync change flow control variables with ixgbeBruce Allan2008-11-211-3/+3
| | | | | | | | | Sync flow control variables and usage model with that found in the ixgbe driver. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: ESB2 config after link upBruce Allan2008-11-211-0/+1
| | | | | | | | | | | | | | On ESB2, the MAC-to-PHY (Kumeran) interface must be configured after link is up before any traffic is sent; a new PHY operations function pointer is provided for this. To facilitate read/write of the Kumeran registers without blocking PHY register writes, the driver/firmware synchronization method which previously used a hardware semaphore for both PHY and Kumeran register accesses is now split. New Kumeran register read/write functions utilize this new synchronization method. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: enable ECC correction on 82571 siliconAlexander Duyck2008-11-161-0/+1
| | | | | | | | | This change enables ECC correction for the packet buffer on all 82571 silicon. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
* e1000e: add support for new 82574L partBruce Allan2008-09-031-2/+9
| | | | | | | | | This new part has the same feature set as previous parts with the addition of MSI-X support. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* e1000e: add support for 82567LM-3 and 82567LF-3 (ICH10D) partsBruce Allan2008-09-031-0/+3
| | | | | | | | Add support for new LOM devices on the latest generation ICHx platforms. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* e1000e: add support for the 82567LM-4 deviceBruce Allan2008-09-031-0/+1
| | | | | | | | | Enable PCI device ID for a new combination of MAC and PHY already supported in the driver. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* e1000e: Add support for BM PHYs on ICH9Bruce Allan2008-05-061-0/+22
| | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the BM PHY, a new PHY model being used on ICH9-based implementations. This new PHY exposes issues in the ICH9 silicon when receiving jumbo frames large enough to use more than a certain part of the Rx FIFO, and this unfortunately breaks packet split jumbo receives. For this reason we re-introduce (for affected adapters only) the jumbo single-skb receive routine back so that people who do wish to use jumbo frames on these ich9 platforms can do so. Part of this problem has to do with CPU sleep states and to make sure that all the wake up timings are correctly we force them with the recently merged pm_qos infrastructure written by Mark Gross. (See http://lkml.org/lkml/2007/10/4/400). To make code read a bit easier we introduce a _IS_ICH flag so that we don't need to do mac type checks over the code. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* e1000e: cleanup several stats issuesBruce Allan2008-04-251-8/+4
| | | | | | | | | | | | | | | | | | | | | Several stats registers are completely unused and we just waste pci bus time reading them. We also omit using the high 32 bits of the GORC/ GOTC counters. We can just read clear them and only read the low registers. Mii-tool can also break es2lan if it executes a MII PHY register ioctl while the device is in autonegotiation. Unfortunately it seems that several applications and installations still perform this ioctl call periodically and especially in this crucial startup time. We can fool the ioctl by providing fail safe information that mimics the "down" link state and only perform the dangerous PHY reads once after link comes up to fill in the real values. As long as link stays up the information will not change. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* e1000e: Make arrays out of these Rx/Tx registersJeff Kirsher2008-04-161-4/+6
| | | | | | | | | With multiple queues coming into the code these base control registers need to be made into arrays. Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* e1000e: reorganize PHY and flow control interfaceJeff Kirsher2008-03-281-11/+15
| | | | | | | | | | | | | | | | | This reorganization moves the PHY status into a separate struct. Flow Control setup is moved into this struct as well and frame size away from here into the adapter struct where its inly use is. The post-link-up code is now a separate function and moved out of the watchdog function itself. This allows us to track the es2lan restart issue a bit easier. Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* e1000e: rename mc_addr_list_updateJeff Kirsher2008-03-281-1/+1
| | | | | | | | Rename this function to be consistent with function naming (verb first) Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* e1000e: reformat comment blocks, cosmetic changes onlyBruce Allan2008-03-281-73/+72
| | | | | | | | | | | | | Adjusting the comment blocks here to be code-style compliant. no code changes. Changed some copyright dates to 2008. Indentation fixes. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* e1000e: fix spelling errors in commentsAuke Kok2008-02-241-2/+2
| | | | | | | Fix some spelling errors and inconsistencies in comment blocks. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* e1000e endianness annotationsAl Viro2008-01-281-41/+41
| | | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* e1000/e1000e: Move PCI-Express device IDs over to e1000eAuke Kok2008-01-281-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | e1000e will from now on support the PCI-Express adapters that previously were supported by e1000. This support means better performance and easier debugging from now on for both the old PCI-X/PCI hardware and PCI-Express adapters. This patch also moves 3 recently merged device IDs over to e1000e that are identical to quad-port versions of already existing dual port versions. With this last bit every former e1000 pci-e device should work now with e1000e. Here is a brief list of which gigabit driver to use with which adapter: e1000: 82540 -> 82547 e1000e: 82571 -> 82573 ich8, ich9 (82562 or 82566) es2lan (80003eslan) igb: (not yet merged, only available from e1000.sf.net) 82575 Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
* e1000e: alternate MAC address supportBill Hayes2008-01-281-0/+1
| | | | | | | | | Port alternate MAC address support from the sourceforge e1000 driver to the upstream e1000e driver. Signed-off-by: Bill Hayes <bill.hayes@hp.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
generated by cgit v1.1 at 2024-09-19 14:35:21 +0000