From 911a62d42365076209e2c327e7688db296e35d62 Mon Sep 17 00:00:00 2001 From: Venkatesh Pallipadi Date: Sat, 3 Sep 2005 15:56:31 -0700 Subject: [PATCH] x86: sutomatically enable bigsmp when we have more than 8 CPUs i386 generic subarchitecture requires explicit dmi strings or command line to enable bigsmp mode. The patch below removes that restriction, and uses bigsmp as soon as it finds more than 8 logical CPUs, Intel processors and xAPIC support. Signed-off-by: Venkatesh Pallipadi Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/i386/kernel/mpparse.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/i386/kernel/mpparse.c') diff --git a/arch/i386/kernel/mpparse.c b/arch/i386/kernel/mpparse.c index ce838ab..788efff 100644 --- a/arch/i386/kernel/mpparse.c +++ b/arch/i386/kernel/mpparse.c @@ -65,6 +65,8 @@ int nr_ioapics; int pic_mode; unsigned long mp_lapic_addr; +unsigned int def_to_bigsmp = 0; + /* Processor that is doing the boot up */ unsigned int boot_cpu_physical_apicid = -1U; /* Internal processor count */ @@ -213,6 +215,13 @@ static void __init MP_processor_info (struct mpc_config_processor *m) ver = 0x10; } apic_version[m->mpc_apicid] = ver; + if ((num_processors > 8) && + APIC_XAPIC(ver) && + (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)) + def_to_bigsmp = 1; + else + def_to_bigsmp = 0; + bios_cpu_apicid[num_processors - 1] = m->mpc_apicid; } -- cgit v1.1