/* arch/arm/mach-omap2/board-espresso10-muxset-r00.c * * Copyright (C) 2012 Samsung Electronics Co, Ltd. * * This software is licensed under the terms of the GNU General Public * License version 2, as published by the Free Software Foundation, and * may be copied, distributed, and modified under those terms. * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ #include #include "board-espresso.h" #include "mux.h" #include "mux44xx.h" #include "omap_muxtbl.h" #include "omap44xx_muxtbl.h" #include "sec_muxtbl.h" static struct omap_muxtbl muxtbl[] __initdata = { /* [-----] gpmc_ad0.sdmmc2_dat0 - NAND_D(0) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_AD0, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_INPUT_PULLDOWN, OMAP_MUXTBL_NO_GPIO, "NAND_D(0)"), /* [-----] gpmc_ad1.sdmmc2_dat1 - NAND_D(1) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_AD1, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_INPUT_PULLDOWN, OMAP_MUXTBL_NO_GPIO, "NAND_D(1)"), /* [-----] gpmc_ad2.sdmmc2_dat2 - NAND_D(2) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_AD2, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_INPUT_PULLDOWN, OMAP_MUXTBL_NO_GPIO, "NAND_D(2)"), /* [-----] gpmc_ad3.sdmmc2_dat3 - NAND_D(3) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_AD3, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_INPUT_PULLDOWN, OMAP_MUXTBL_NO_GPIO, "NAND_D(3)"), /* [-----] gpmc_ad4.sdmmc2_dat4 - NAND_D(4) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_AD4, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_INPUT_PULLDOWN, OMAP_MUXTBL_NO_GPIO, "NAND_D(4)"), /* [-----] gpmc_ad5.sdmmc2_dat5 - NAND_D(5) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_AD5, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_INPUT_PULLDOWN, OMAP_MUXTBL_NO_GPIO, "NAND_D(5)"), /* [-----] gpmc_ad6.sdmmc2_dat6 - NAND_D(6) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_AD6, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_INPUT_PULLDOWN, OMAP_MUXTBL_NO_GPIO, "NAND_D(6)"), /* [-----] gpmc_ad7.sdmmc2_dat7 - NAND_D(7) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_AD7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_INPUT_PULLDOWN, OMAP_MUXTBL_NO_GPIO, "NAND_D(7)"), /* [IN---] gpmc_ad8.gpio_32 - TA_nCONNECTED */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_AD8, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE, 32, "TA_nCONNECTED"), /* [IN---] gpmc_ad9.gpio_33 - ALS_INT_18 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_AD9, OMAP_MUX_MODE3 | OMAP_PIN_INPUT | OMAP_PIN_OFF_WAKEUPENABLE, 33, "ALS_INT_18"), /* [-N-C-] gpmc_ad10.gpio_34 - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_AD10, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLDOWN, 34, "gpmc_ad10.nc"), /* [IN---] gpmc_ad11.gpio_35 - SIM_DETECT */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_AD11, OMAP_MUX_MODE3 | OMAP_PIN_INPUT, 35, "SIM_DETECT"), /* [IN---] gpmc_ad12.gpio_36 - ADC_INT_1.8V */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_AD12, OMAP_MUX_MODE3 | OMAP_PIN_INPUT, 36, "ADC_INT_1.8V"), /* [--OUT] gpmc_ad13.gpio_37 - CP_ON */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_AD13, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT | OMAP_PIN_OFF_OUTPUT_LOW, 37, "CP_ON"), /* [-N-C-] gpmc_ad14.gpio_38 - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_AD14, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLDOWN, 38, "gpmc_ad14.nc"), /* [IN---] gpmc_ad15.gpio_39 - ACCESSORY_INT_1.8V */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_AD15, OMAP_MUX_MODE3 | OMAP_PIN_INPUT | OMAP_PIN_OFF_WAKEUPENABLE, 39, "ACCESSORY_INT_1.8V"), /* [IN---] gpmc_a16.gpio_40 - 2M_nSTBY */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_A16, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLDOWN, 40, "2M_nSTBY"), /* [-N-C-] gpmc_a17.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_A17, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 41, "gpmc_a17.nc"), /* [-----] gpmc_a18.safe_mode - LCD_SELECT(nc) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_A18, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 42, "LCD_SELECT(nc)"), /* [-N-C-] gpmc_a19.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_A19, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 43, "gpmc_a19.nc"), /* [IN---] gpmc_a20.gpio_44 - FUEL_ALERT */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_A20, OMAP_MUX_MODE3 | OMAP_PIN_INPUT | OMAP_PIN_OFF_WAKEUPENABLE, 44, "FUEL_ALERT"), /* [--OUT] gpmc_a21.gpio_45 - CODEC_LDO_EN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_A21, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 45, "CODEC_LDO_EN"), /* [IN---] gpmc_a22.gpio_46 - TSP_INT */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_A22, OMAP_MUX_MODE3 | OMAP_PIN_INPUT, 46, "TSP_INT"), /* [--OUT] gpmc_a23.gpio_47 - UART_SEL */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_A23, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 47, "UART_SEL"), /* [--OUT] gpmc_a24.gpio_48 - MICBIAS_EN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_A24, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 48, "MICBIAS_EN"), /* [--OUT] gpmc_a25.gpio_49 - EAR_MICBIAS_EN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_A25, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 49, "EAR_MICBIAS_EN"), /* [--OUT] gpmc_ncs0.gpio_50 - RESET_REQ_N */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_NCS0, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT | OMAP_PIN_OFF_OUTPUT_HIGH, 50, "RESET_REQ_N"), /* [IN---] gpmc_ncs1.gpio_51 - VT_CAM_nSTBY */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_NCS1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLDOWN, 51, "VT_CAM_nSTBY"), /* [IN---] gpmc_ncs2.gpio_52 - GPS_CNTL */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_NCS2, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 52, "GPS_CNTL"), /* [IN---] gpmc_ncs3.gpio_53 - eMMC_EN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_NCS3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP, 53, "eMMC_EN"), /* [--OUT] gpmc_nwp.gpio_54 - TSP_LDO_ON */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_NWP, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 54, "TSP_LDO_ON"), /* [IN---] gpmc_clk.gpio_55 - JIG_ON_18 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_CLK, OMAP_MUX_MODE3 | OMAP_PIN_INPUT | OMAP_PIN_OFF_WAKEUPENABLE, 55, "JIG_ON_18"), /* [IN---] gpmc_nadv_ale.gpio_56 - CP_DUMP_INT */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_NADV_ALE, OMAP_MUX_MODE3 | OMAP_PIN_INPUT, 56, "CP_DUMP_INT"), /* [-----] gpmc_noe.sdmmc2_clk - NAND_CLK */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_NOE, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLDOWN, OMAP_MUXTBL_NO_GPIO, "NAND_CLK"), /* [-----] gpmc_nwe.sdmmc2_cmd - NAND_CMD */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_NWE, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_INPUT_PULLDOWN, OMAP_MUXTBL_NO_GPIO, "NAND_CMD"), /* [--OUT] gpmc_nbe0_cle.gpio_59 - IRDA_EN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_NBE0_CLE, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 59, "IRDA_EN"), /* [--OUT] gpmc_nbe1.gpio_60 - USB_SEL2 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_NBE1, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 60, "USB_SEL2"), /* [IN---] gpmc_wait0.gpio_61 - FUEL_SCL_1.8V */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_WAIT0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP, 61, "FUEL_SCL_1.8V"), /* [IN---] gpmc_wait1.gpio_62 - FUEL_SDA_1.8V */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_WAIT1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP, 62, "FUEL_SDA_1.8V"), /* [-----] gpmc_wait2.safe_mode - eMMC_EN(nc) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_WAIT2, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 100, "eMMC_EN(nc)"), /* [--OUT] gpmc_ncs4.gpio_101 - 26M_EN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_NCS4, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 101, "CODEC_CLK_REQ"), /* [-N-C-] gpmc_ncs5.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_NCS5, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 102, "gpmc_ncs5.nc"), /* [--OUT] gpmc_ncs6.gpio_103 - BT_EN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_NCS6, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 103, "BT_EN"), /* [--OUT] gpmc_ncs7.gpio_104 - WLAN_EN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, GPMC_NCS7, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 104, "WLAN_EN"), /* [-N-C-] hdmi_hpd.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, HDMI_HPD, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 63, "hdmi_hpd.nc"), /* [-N-C-] hdmi_cec.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, HDMI_CEC, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 64, "hdmi_cec.nc"), /* [IN---] hdmi_ddc_scl.gpio_65 - ADC_I2C_SCL_1.8V */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, HDMI_DDC_SCL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP, 65, "ADC_I2C_SCL_1.8V"), /* [IN---] hdmi_ddc_sda.gpio_66 - ADC_I2C_SDA_1.8V */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, HDMI_DDC_SDA, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP, 66, "ADC_I2C_SDA_1.8V"), /* [-----] csi21_dx0.csi21_dx0 - 2M_CLK_P */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, CSI21_DX0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT | OMAP_PIN_OFF_OUTPUT_LOW, 67, "2M_CLK_P"), /* [-----] csi21_dy0.csi21_dy0 - 2M_CLK_N */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, CSI21_DY0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT | OMAP_PIN_OFF_OUTPUT_LOW, 68, "2M_CLK_N"), /* [-----] csi21_dx1.csi21_dx1 - 2M_DP */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, CSI21_DX1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT | OMAP_PIN_OFF_OUTPUT_LOW, 69, "2M_DP"), /* [-----] csi21_dy1.csi21_dy1 - 2M_DN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, CSI21_DY1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT | OMAP_PIN_OFF_OUTPUT_LOW, 70, "2M_DN"), /* [IN---] csi21_dx2.gpi_71 - TSP_VENDOR1 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, CSI21_DX2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT, 71, "TSP_VENDOR1"), /* [IN---] csi21_dy2.gpi_72 - TSP_VENDOR2 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, CSI21_DY2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT, 72, "TSP_VENDOR2"), /* [IN---] csi21_dx3.gpi_73 - HW_REV3 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, CSI21_DX3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT, 73, "HW_REV3"), /* [IN---] csi21_dy3.gpi_74 - HW_REV2 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, CSI21_DY3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT, 74, "HW_REV2"), /* [IN---] csi21_dx4.gpi_75 - HW_REV1 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, CSI21_DX4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT, 75, "HW_REV1"), /* [IN---] csi21_dy4.gpi_76 - HW_REV0 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, CSI21_DY4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT, 76, "HW_REV0"), /* [-----] csi22_dx0.csi22_dx0 - VT_CAM_CLK_P */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, CSI22_DX0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT | OMAP_PIN_OFF_OUTPUT_LOW, 77, "VT_CAM_CLK_P"), /* [-----] csi22_dy0.csi22_dy0 - VT_CAM_CLK_N */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, CSI22_DY0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT | OMAP_PIN_OFF_OUTPUT_LOW, 78, "VT_CAM_CLK_N"), /* [-----] csi22_dx1.csi22_dx1 - VT_CAM_DP */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, CSI22_DX1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT | OMAP_PIN_OFF_OUTPUT_LOW, 79, "VT_CAM_DP"), /* [-----] csi22_dy1.csi22_dy1 - VT_CAM_DN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, CSI22_DY1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT | OMAP_PIN_OFF_OUTPUT_LOW, 80, "VT_CAM_DN"), /* [IN---] cam_shutter.gpio_81 - WLAN_HOST_WAKE */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, CAM_SHUTTER, OMAP_MUX_MODE3 | OMAP_PIN_INPUT | OMAP_PIN_OFF_WAKEUPENABLE, 81, "WLAN_HOST_WAKE"), /* [--OUT] cam_strobe.gpio_82 - BT_nRST */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, CAM_STROBE, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 82, "BT_nRST"), /* [IN---] cam_globalreset.gpio_83 - BT_HOST_WAKE */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, CAM_GLOBALRESET, OMAP_MUX_MODE3 | OMAP_PIN_INPUT | OMAP_PIN_OFF_WAKEUPENABLE, 83, "BT_HOST_WAKE"), /* [-----] usbb1_ulpitll_clk.hsi1_cawake - MIPI_HSI_TX_WAKE */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB1_ULPITLL_CLK, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLDOWN | OMAP_PIN_OFF_WAKEUPENABLE, 84, "MIPI_HSI_TX_WAKE"), /* [-----] usbb1_ulpitll_stp.hsi1_cadata - MIPI_HSI_TX_DATA */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB1_ULPITLL_STP, OMAP_MUX_MODE1 | OMAP_PIN_INPUT, 85, "MIPI_HSI_TX_DATA"), /* [-----] usbb1_ulpitll_dir.hsi1_caflag - MIPI_HSI_TX_FLG */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB1_ULPITLL_DIR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT, 86, "MIPI_HSI_TX_FLG"), /* [-----] usbb1_ulpitll_nxt.hsi1_acready - MIPI_HSI_TX_RDY */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB1_ULPITLL_NXT, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT | OMAP_PIN_OFF_OUTPUT_LOW, 87, "MIPI_HSI_TX_RDY"), /* [-----] usbb1_ulpitll_dat0.hsi1_acwake - MIPI_HSI_RX_WAKE */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB1_ULPITLL_DAT0, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT | OMAP_PIN_OFF_OUTPUT_LOW, 88, "MIPI_HSI_RX_WAKE"), /* [-----] usbb1_ulpitll_dat1.hsi1_acdata - MIPI_HSI_RX_DATA */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB1_ULPITLL_DAT1, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT | OMAP_PIN_OFF_OUTPUT_LOW, 89, "MIPI_HSI_RX_DATA"), /* [-----] usbb1_ulpitll_dat2.hsi1_acflag - MIPI_HSI_RX_FLG */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB1_ULPITLL_DAT2, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT | OMAP_PIN_OFF_OUTPUT_LOW, 90, "MIPI_HSI_RX_FLG"), /* [-----] usbb1_ulpitll_dat3.hsi1_caready - MIPI_HSI_RX_RDY */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB1_ULPITLL_DAT3, OMAP_MUX_MODE1 | OMAP_PIN_INPUT, 91, "MIPI_HSI_RX_RDY"), /* [-N-C-] usbb1_ulpitll_dat4.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB1_ULPITLL_DAT4, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 92, "usbb1_ulpitll_dat4.nc"), /* [--OUT] usbb1_ulpitll_dat5.gpio_93 - BT_WAKE */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB1_ULPITLL_DAT5, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 93, "BT_WAKE"), /* [-----] usbb1_ulpitll_dat6.dmtimer10_pwm_evt - LED_BACKLIGHT_PWM */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB1_ULPITLL_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT | OMAP_PIN_OFF_OUTPUT_LOW, 94, "LED_BACKLIGHT_PWM"), /* [--OUT] usbb1_ulpitll_dat7.gpio_95 - LED_BACKLIGHT_RESET */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB1_ULPITLL_DAT7, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT | OMAP_PIN_OFF_OUTPUT_LOW, 95, "LED_BACKLIGHT_RESET"), /* [-N-C-] usbb1_hsic_data.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB1_HSIC_DATA, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 96, "usbb1_hsic_data.nc"), /* [-N-C-] usbb1_hsic_strobe.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB1_HSIC_STROBE, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 97, "usbb1_hsic_strobe.nc"), /* [IN---] sim_io.gpio_wk0 - DET_3.5 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, SIM_IO, OMAP_MUX_MODE3 | OMAP_PIN_INPUT | OMAP_PIN_OFF_WAKEUPENABLE, 0, "DET_3.5"), /* [-N-C-] sim_clk.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, SIM_CLK, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 1, "sim_clk.nc"), /* [--OUT] sim_reset.gpio_wk2 - CP_PMU_RST */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, SIM_RESET, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT | OMAP_PIN_OFF_OUTPUT_HIGH, 2, "CP_PMU_RST"), /* [IN---] sim_cd.gpio_wk3 - EXT_WAKEUP */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, SIM_CD, OMAP_MUX_MODE3 | OMAP_PIN_INPUT | OMAP_PIN_OFF_WAKEUPENABLE, 3, "EXT_WAKEUP"), /* [IN---] sim_pwrctrl.gpio_wk4 - EAR_SEND_END */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, SIM_PWRCTRL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT | OMAP_PIN_OFF_WAKEUPENABLE, 4, "EAR_SEND_END"), /* [IN---] usbc1_icusb_dp.gpio_98 - CHG_SDA_1.8V */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBC1_ICUSB_DP, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP, 98, "CHG_SDA_1.8V"), /* [IN---] usbc1_icusb_dm.gpio_99 - CHG_SCL_1.8V */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBC1_ICUSB_DM, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP, 99, "CHG_SCL_1.8V"), /* [-----] sdmmc1_clk.sdmmc1_clk - T_FLASH_CLK */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SDMMC1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN, 100, "T_FLASH_CLK"), /* [-----] sdmmc1_cmd.sdmmc1_cmd - T_FLASH_CMD */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SDMMC1_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 101, "T_FLASH_CMD"), /* [-----] sdmmc1_dat0.sdmmc1_dat0 - T_FLASH_D(0) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SDMMC1_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 102, "T_FLASH_D(0)"), /* [-----] sdmmc1_dat1.sdmmc1_dat1 - T_FLASH_D(1) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SDMMC1_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 103, "T_FLASH_D(1)"), /* [-----] sdmmc1_dat2.sdmmc1_dat2 - T_FLASH_D(2) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SDMMC1_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 104, "T_FLASH_D(2)"), /* [-----] sdmmc1_dat3.sdmmc1_dat3 - T_FLASH_D(3) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SDMMC1_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 105, "T_FLASH_D(3)"), /* [-N-C-] sdmmc1_dat4.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SDMMC1_DAT4, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 106, "sdmmc1_dat4.nc"), /* [-N-C-] sdmmc1_dat5.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SDMMC1_DAT5, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 107, "sdmmc1_dat5.nc"), /* [-N-C-] sdmmc1_dat6.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SDMMC1_DAT6, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 108, "sdmmc1_dat6.nc"), /* [-N-C-] sdmmc1_dat7.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SDMMC1_DAT7, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 109, "sdmmc1_dat7.nc"), /* [-N-C-] abe_mcbsp2_clkx.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, ABE_MCBSP2_CLKX, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 110, "abe_mcbsp2_clkx.nc"), /* [-N-C-] abe_mcbsp2_dr.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, ABE_MCBSP2_DR, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 111, "abe_mcbsp2_dr.nc"), /* [-N-C-] abe_mcbsp2_dx.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, ABE_MCBSP2_DX, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 112, "abe_mcbsp2_dx.nc"), /* [-N-C-] abe_mcbsp2_fsx.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, ABE_MCBSP2_FSX, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 113, "abe_mcbsp2_fsx.nc"), /* [-N-C-] abe_mcbsp1_clkx.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, ABE_MCBSP1_CLKX, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 114, "abe_mcbsp1_clkx.nc"), /* [-N-C-] abe_mcbsp1_dr.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, ABE_MCBSP1_DR, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 115, "abe_mcbsp1_dr.nc"), /* [-N-C-] abe_mcbsp1_dx.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, ABE_MCBSP1_DX, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 116, "abe_mcbsp1_dx.nc"), /* [-N-C-] abe_mcbsp1_fsx.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, ABE_MCBSP1_FSX, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 117, "abe_mcbsp1_fsx.nc"), /* [-----] abe_pdm_ul_data.abe_mcbsp3_dr - AP_I2S_DIN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, ABE_PDM_UL_DATA, OMAP_MUX_MODE1 | OMAP_PIN_INPUT, OMAP_MUXTBL_NO_GPIO, "AP_I2S_DIN"), /* [-----] abe_pdm_dl_data.abe_mcbsp3_dx - AP_I2S_DOUT */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, ABE_PDM_DL_DATA, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT, OMAP_MUXTBL_NO_GPIO, "AP_I2S_DOUT"), /* [-----] abe_pdm_frame.abe_mcbsp3_clkx - AP_I2S_CLK */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, ABE_PDM_FRAME, OMAP_MUX_MODE1 | OMAP_PIN_INPUT, OMAP_MUXTBL_NO_GPIO, "AP_I2S_CLK"), /* [-----] abe_pdm_lb_clk.abe_mcbsp3_fsx - AP_I2S_SYNC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, ABE_PDM_LB_CLK, OMAP_MUX_MODE1 | OMAP_PIN_INPUT, OMAP_MUXTBL_NO_GPIO, "AP_I2S_SYNC"), /* [-N-C-] abe_clks.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, ABE_CLKS, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 118, "abe_clks.nc"), /* [--OUT] abe_dmic_clk1.gpio_119 - PDA_ACTIVE */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, ABE_DMIC_CLK1, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT | OMAP_PIN_OFF_OUTPUT_LOW, 119, "PDA_ACTIVE"), /* [IN---] abe_dmic_din1.gpio_120 - PHONE_ACTIVE */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, ABE_DMIC_DIN1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT, 120, "PHONE_ACTIVE"), /* [IN---] abe_dmic_din2.gpio_121 - ACC_INT2 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, ABE_DMIC_DIN2, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 121, "ACC_INT2"), /* [-----] abe_dmic_din3.abe_dmic_din3 - ACC_INT */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, ABE_DMIC_DIN3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT, 122, "ACC_INT"), /* [-----] uart2_cts.uart2_cts - BT_UART_CTS */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, UART2_CTS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 123, "BT_UART_CTS"), /* [-----] uart2_rts.uart2_rts - BT_UART_RTS */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, UART2_RTS, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 124, "BT_UART_RTS"), /* [-----] uart2_rx.uart2_rx - BT_UART_RXD */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, UART2_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 125, "BT_UART_RXD"), /* [-----] uart2_tx.uart2_tx - BT_UART_TXD */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, UART2_TX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 126, "BT_UART_TXD"), /* [-N-C-] hdq_sio.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, HDQ_SIO, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 127, "hdq_sio.nc"), /* [-----] i2c1_scl.i2c1_scl - PHEONIX_I2C_SCL */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, I2C1_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, OMAP_MUXTBL_NO_GPIO, "PHEONIX_I2C_SCL"), /* [-----] i2c1_sda.i2c1_sda - PHEONIX_I2C_SDA */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, I2C1_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, OMAP_MUXTBL_NO_GPIO, "PHEONIX_I2C_SDA"), /* [-----] i2c2_scl.i2c2_scl - CAM_I2C_SCL */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, I2C2_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 128, "CAM_I2C_SCL"), /* [-----] i2c2_sda.i2c2_sda - CAM_I2C_SDA */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, I2C2_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 129, "CAM_I2C_SDA"), /* [-----] i2c3_scl.i2c3_scl - TSP_I2C_SCL_1.8V */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 130, "TSP_I2C_SCL_1.8V"), /* [-----] i2c3_sda.i2c3_sda - TSP_I2C_SDA_1.8V */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 131, "TSP_I2C_SDA_1.8V"), /* [-----] i2c4_scl.i2c4_scl - SENSOR_I2C_SCL */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, I2C4_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 132, "SENSOR_I2C_SCL"), /* [-----] i2c4_sda.i2c4_sda - SENSOR_I2C_SDA */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, I2C4_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 133, "SENSOR_I2C_SDA"), /* [-----] sr_scl.sr_scl - PMIC_I2C_SCL */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, SR_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, OMAP_MUXTBL_NO_GPIO, "PMIC_I2C_SCL"), /* [-----] sr_sda.sr_sda - PMIC_I2C_SDA */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, SR_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, OMAP_MUXTBL_NO_GPIO, "PMIC_I2C_SDA"), /* [-N-C-] mcspi1_clk.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, MCSPI1_CLK, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 134, "mcspi1_clk.nc"), /* [--OUT] mcspi1_somi.gpio_135 - LCD_EN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, MCSPI1_SOMI, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 135, "LCD_EN"), /* [IN---] mcspi1_simo.gpio_136 - LVDS_nSHDN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, MCSPI1_SIMO, OMAP_MUX_MODE3 | OMAP_PIN_INPUT, 136, "LVDS_nSHDN"), /* [-N-C-] mcspi1_cs0.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, MCSPI1_CS0, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 137, "mcspi1_cs0.nc"), /* [-----] mcspi1_cs1.uart1_rx - GPS_UART_RXD */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, MCSPI1_CS1, OMAP_MUX_MODE1 | OMAP_PIN_INPUT, 138, "GPS_UART_RXD"), /* [IN---] mcspi1_cs2.gpio_139 - GPS_UART_CTS */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, MCSPI1_CS2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP, 139, "GPS_UART_CTS"), /* [IN---] mcspi1_cs3.gpio_140 - GPS_UART_RTS */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, MCSPI1_CS3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP, 140, "GPS_UART_RTS"), /* [-----] uart3_cts_rctx.uart1_tx - GPS_UART_TXD */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, UART3_CTS_RCTX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT, 141, "GPS_UART_TXD"), /* [IN---] uart3_rts_sd.gpio_142 - TA_nCHG */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, UART3_RTS_SD, OMAP_MUX_MODE3 | OMAP_PIN_INPUT | OMAP_PIN_OFF_WAKEUPENABLE, 142, "TA_nCHG"), /* [-----] uart3_rx_irrx.safe_mode - AP_FLM_RXD(nc) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, UART3_RX_IRRX, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 143, "AP_FLM_RXD(nc)"), /* [-----] uart3_tx_irtx.safe_mode - AP_FLM_TXD(nc) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, UART3_TX_IRTX, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 144, "AP_FLM_TXD(nc)"), /* [-----] sdmmc5_clk.sdmmc5_clk - WLAN_SD_CLK */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SDMMC5_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN, 145, "WLAN_SD_CLK"), /* [-----] sdmmc5_cmd.sdmmc5_cmd - WLAN_SD_CMD */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SDMMC5_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 146, "WLAN_SD_CMD"), /* [-----] sdmmc5_dat0.sdmmc5_dat0 - WLAN_SD_D(0) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SDMMC5_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 147, "WLAN_SD_D(0)"), /* [-----] sdmmc5_dat1.sdmmc5_dat1 - WLAN_SD_D(1) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SDMMC5_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 148, "WLAN_SD_D(1)"), /* [-----] sdmmc5_dat2.sdmmc5_dat2 - WLAN_SD_D(2) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SDMMC5_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 149, "WLAN_SD_D(2)"), /* [-----] sdmmc5_dat3.sdmmc5_dat3 - WLAN_SD_D(3) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SDMMC5_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, 150, "WLAN_SD_D(3)"), /* [--OUT] mcspi4_clk.gpio_151 - OTG_EN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, MCSPI4_CLK, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 151, "OTG_EN"), /* [--OUT] mcspi4_simo.gpio_152 - IRDA_CONTROL */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, MCSPI4_SIMO, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 152, "IRDA_CONTROL"), /* [IN---] mcspi4_somi.gpio_153 - 2M_nRST */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, MCSPI4_SOMI, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLDOWN, 153, "2M_nRST"), /* [--OUT] mcspi4_cs0.gpio_154 - USB_SEL1 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, MCSPI4_CS0, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 154, "USB_SEL1"), /* [-----] uart4_rx.uart4_rx - AP_RXD */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, UART4_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT, 155, "AP_RXD"), /* [-----] uart4_tx.uart4_tx - AP_TXD */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, UART4_TX, OMAP_MUX_MODE0 | OMAP_PIN_OFF_OUTPUT_LOW, 156, "AP_TXD"), /* [IN---] usbb2_ulpitll_clk.gpio_157 - MSENSE_IRQ */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB2_ULPITLL_CLK, OMAP_MUX_MODE3 | OMAP_PIN_INPUT, 157, "MSENSE_IRQ"), /* [-----] usbb2_ulpitll_stp.dispc2_data23 - LCD_D(23) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB2_ULPITLL_STP, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 158, "LCD_D(23)"), /* [-----] usbb2_ulpitll_dir.dispc2_data22 - LCD_D(22) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB2_ULPITLL_DIR, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 159, "LCD_D(22)"), /* [-----] usbb2_ulpitll_nxt.dispc2_data21 - LCD_D(21) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB2_ULPITLL_NXT, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 160, "LCD_D(21)"), /* [-----] usbb2_ulpitll_dat0.dispc2_data20 - LCD_D(20) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB2_ULPITLL_DAT0, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 161, "LCD_D(20)"), /* [-----] usbb2_ulpitll_dat1.dispc2_data19 - LCD_D(19) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB2_ULPITLL_DAT1, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 162, "LCD_D(19)"), /* [-----] usbb2_ulpitll_dat2.dispc2_data18 - LCD_D(18) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB2_ULPITLL_DAT2, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 163, "LCD_D(18)"), /* [-----] usbb2_ulpitll_dat3.dispc2_data15 - LCD_D(15) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB2_ULPITLL_DAT3, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 164, "LCD_D(15)"), /* [-----] usbb2_ulpitll_dat4.dispc2_data14 - LCD_D(14) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB2_ULPITLL_DAT4, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 165, "LCD_D(14)"), /* [-----] usbb2_ulpitll_dat5.dispc2_data13 - LCD_D(13) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB2_ULPITLL_DAT5, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 166, "LCD_D(13)"), /* [-----] usbb2_ulpitll_dat6.dispc2_data12 - LCD_D(12) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB2_ULPITLL_DAT6, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 167, "LCD_D(12)"), /* [-----] usbb2_ulpitll_dat7.dispc2_data11 - LCD_D(11) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB2_ULPITLL_DAT7, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 168, "LCD_D(11)"), /* [IN---] usbb2_hsic_data.gpio_169 - V_ACCESSORY_OUT_5.0V */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB2_HSIC_DATA, OMAP_MUX_MODE3 | OMAP_PIN_INPUT, 169, "V_ACCESSORY_OUT_5.0V"), /* [IN---] usbb2_hsic_strobe.gpio_170 - MAG_INT */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBB2_HSIC_STROBE, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 170, "MAG_INT"), /* [--OUT] kpd_col3.gpio_171 - EAR_GND_SEL */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, KPD_COL3, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 171, "EAR_GND_SEL"), /* [--OUT] kpd_col4.gpio_172 - ACCESSORY_EN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, KPD_COL4, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 172, "ACCESSORY_EN"), /* [--OUT] kpd_col5.gpio_173 - GPS_PWR_EN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, KPD_COL5, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 173, "GPS_PWR_EN"), /* [IN---] kpd_col0.gpio_174 - VT_CAM_nRST */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, KPD_COL0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLDOWN, 174, "VT_CAM_nRST"), /* [-N-C-] kpd_col1.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, KPD_COL1, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 0, "kpd_col1.nc"), /* [-N-C-] kpd_col2.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, KPD_COL2, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 1, "kpd_col2.nc"), /* [-N-C-] kpd_row3.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, KPD_ROW3, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 175, "kpd_row3.nc"), /* [-----] kpd_row4.safe_mode - TP605 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, KPD_ROW4, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 176, "TP605"), /* [-N-C-] kpd_row5.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, KPD_ROW5, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 177, "kpd_row5.nc"), /* [--OUT] kpd_row0.gpio_178 - GPS_nRST */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, KPD_ROW0, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 178, "GPS_nRST"), /* [-----] kpd_row1.safe_mode - TP603 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, KPD_ROW1, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 2, "TP603"), /* [-----] kpd_row2.safe_mode - TP604 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, KPD_ROW2, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 3, "TP604"), /* [-N-C-] usba0_otg_ce.usba0_otg_ce - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBA0_OTG_CE, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN, OMAP_MUXTBL_NO_GPIO, "usba0_otg_ce.nc"), /* [-----] usba0_otg_dp.usba0_otg_dp - AP_D+ */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBA0_OTG_DP, OMAP_MUX_MODE0 | OMAP_PIN_INPUT, OMAP_MUXTBL_NO_GPIO, "AP_D+"), /* [-----] usba0_otg_dm.usba0_otg_dm - AP_D- */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, USBA0_OTG_DM, OMAP_MUX_MODE0 | OMAP_PIN_INPUT, OMAP_MUXTBL_NO_GPIO, "AP_D-"), /* [--OUT] fref_clk0_out.gpio_wk6 - SYS_DRM_MSEC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, FREF_CLK0_OUT, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 6, "SYS_DRM_MSEC"), /* [-----] fref_clk1_out.fref_clk1_out - 2M_MCLK */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, FREF_CLK1_OUT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT | OMAP_PIN_OFF_OUTPUT_LOW, 181, "2M_MCLK"), /* [-----] fref_clk2_out.fref_clk2_out - VT_CAM_MCLK */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, FREF_CLK2_OUT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT | OMAP_PIN_OFF_OUTPUT_LOW, 182, "VT_CAM_MCLK"), /* [IN---] fref_clk3_req.gpio_wk30 - VOL_DN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, FREF_CLK3_REQ, OMAP_MUX_MODE3 | OMAP_PIN_INPUT | OMAP_PIN_OFF_WAKEUPENABLE, 30, "VOL_DN"), /* [IN---] fref_clk3_out.gpio_wk31 - DOCK_INT */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, FREF_CLK3_OUT, OMAP_MUX_MODE3 | OMAP_PIN_INPUT | OMAP_PIN_OFF_WAKEUPENABLE, 31, "DOCK_INT"), /* [IN---] fref_clk4_req.gpio_wk7 - REMOTE_SENSE_IRQ */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, FREF_CLK4_REQ, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLDOWN, 7, "REMOTE_SENSE_IRQ"), /* [IN---] fref_clk4_out.gpio_wk8 - VOL_UP */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, FREF_CLK4_OUT, OMAP_MUX_MODE3 | OMAP_PIN_INPUT | OMAP_PIN_OFF_WAKEUPENABLE, 8, "VOL_UP"), /* [-----] sys_32k.sys_32k - SYS_32K */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, SYS_32K, OMAP_MUX_MODE0 | OMAP_PIN_INPUT, OMAP_MUXTBL_NO_GPIO, "SYS_32K"), /* [-----] sys_nrespwron.sys_nrespwron - SYS_NRESPWRON */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, SYS_NRESPWRON, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT, OMAP_MUXTBL_NO_GPIO, "SYS_NRESPWRON"), /* [-----] sys_nreswarm.sys_nreswarm - SYS_NRESWARM */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, SYS_NRESWARM, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT, OMAP_MUXTBL_NO_GPIO, "SYS_NRESWARM"), /* [-----] sys_pwr_req.sys_pwr_req - SYS_PWR_REQ */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, SYS_PWR_REQ, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT, OMAP_MUXTBL_NO_GPIO, "SYS_PWR_REQ"), /* [IN---] sys_pwron_reset_out.gpio_wk29 - BAT_REMOVAL */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, SYS_PWRON_RESET_OUT, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 29, "BAT_REMOVAL"), /* [-----] sys_nirq1.sys_nirq1 - SYS_nIRQ1 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SYS_NIRQ1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP | OMAP_PIN_OFF_WAKEUPENABLE, OMAP_MUXTBL_NO_GPIO, "SYS_nIRQ1"), /* [-N-C-] sys_nirq2.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SYS_NIRQ2, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 183, "sys_nirq2.nc"), /* [-----] sys_boot0.safe_mode - SYS_BOOT0 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SYS_BOOT0, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 184, "SYS_BOOT0"), /* [-----] sys_boot1.safe_mode - SYS_BOOT1 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SYS_BOOT1, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 185, "SYS_BOOT1"), /* [-----] sys_boot2.safe_mode - SYS_BOOT2 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SYS_BOOT2, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 186, "SYS_BOOT2"), /* [-----] sys_boot3.safe_mode - SYS_BOOT3 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SYS_BOOT3, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 187, "SYS_BOOT3"), /* [-----] sys_boot4.safe_mode - SYS_BOOT4 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SYS_BOOT4, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 188, "SYS_BOOT4"), /* [-----] sys_boot5.safe_mode - SYS_BOOT5 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, SYS_BOOT5, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 189, "SYS_BOOT5"), /* [IN---] sys_boot6.gpio_wk9 - SYS_BOOT6 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, SYS_BOOT6, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLDOWN, 9, "SYS_BOOT6"), /* [IN---] sys_boot7.gpio_wk10 - SYS_BOOT7 */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, SYS_BOOT7, OMAP_MUX_MODE3 | OMAP_PIN_INPUT_PULLUP, 10, "SYS_BOOT7"), /* [-----] jtag_ntrst.jtag_ntrst - AP_JTAG_nTRST */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, JTAG_NTRST, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN, OMAP_MUXTBL_NO_GPIO, "AP_JTAG_nTRST"), /* [-----] jtag_tck.jtag_tck - AP_JTAG_TCK */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, JTAG_TCK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN, OMAP_MUXTBL_NO_GPIO, "AP_JTAG_TCK"), /* [-----] jtag_rtck.jtag_rtck - AP_JTAG_RTCK */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, JTAG_RTCK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT, OMAP_MUXTBL_NO_GPIO, "AP_JTAG_RTCK"), /* [-----] jtag_tms_tmsc.jtag_tms_tmsc - AP_JTAG_TMS */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, JTAG_TMS_TMSC, OMAP_MUX_MODE0 | OMAP_PIN_INPUT, OMAP_MUXTBL_NO_GPIO, "AP_JTAG_TMS"), /* [-----] jtag_tdi.jtag_tdi - AP_JTAG_TDI */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, JTAG_TDI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLUP, OMAP_MUXTBL_NO_GPIO, "AP_JTAG_TDI"), /* [-----] jtag_tdo.jtag_tdo - AP_JTAG_TDO */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, JTAG_TDO, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT, OMAP_MUXTBL_NO_GPIO, "AP_JTAG_TDO"), /* [-----] fref_xtal_in.fref_xtal_in - FREF_XTAL_IN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, FREF_XTAL_IN, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT, OMAP_MUXTBL_NO_GPIO, "FREF_XTAL_IN"), /* [-----] fref_slicer_in.fref_slicer_in - FREF_38.4M_IN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, FREF_SLICER_IN, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT, 5, "FREF_38.4M_IN"), /* [-----] fref_clk_ioreq.fref_clk_ioreq - FREF_CLK_IOREQ */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_WKUP, FREF_CLK_IOREQ, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT, OMAP_MUXTBL_NO_GPIO, "FREF_CLK_IOREQ"), /* [-N-C-] dpm_emu0.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU0, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 11, "dpm_emu0.nc"), /* [-N-C-] dpm_emu1.safe_mode - NC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU1, OMAP_MUX_MODE7 | OMAP_PIN_INPUT_PULLDOWN, 12, "dpm_emu1.nc"), /* [--OUT] dpm_emu2.gpio_13 - TA_EN */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU2, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT, 13, "TA_EN"), /* [-----] dpm_emu3.dispc2_data10 - LCD_D(10) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU3, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 14, "LCD_D(10)"), /* [-----] dpm_emu4.dispc2_data9 - LCD_D(9) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU4, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 15, "LCD_D(9)"), /* [-----] dpm_emu5.dispc2_data16 - LCD_D(16) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU5, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 16, "LCD_D(16)"), /* [-----] dpm_emu6.dispc2_data17 - LCD_D(17) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU6, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 17, "LCD_D(17)"), /* [-----] dpm_emu7.dispc2_hsync - LCD_HSYNC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU7, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 18, "LCD_HSYNC"), /* [-----] dpm_emu8.dispc2_pclk - LCD_PCLK */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU8, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 19, "LCD_PCLK"), /* [-----] dpm_emu9.dispc2_vsync - LCD_VSYNC */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU9, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 20, "LCD_VSYNC"), /* [-----] dpm_emu10.dispc2_de - LCD_DE */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU10, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 21, "LCD_DE"), /* [-----] dpm_emu11.dispc2_data8 - LCD_D(8) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU11, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 22, "LCD_D(8)"), /* [-----] dpm_emu12.dispc2_data7 - LCD_D(7) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU12, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 23, "LCD_D(7)"), /* [-----] dpm_emu13.dispc2_data6 - LCD_D(6) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU13, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 24, "LCD_D(6)"), /* [-----] dpm_emu14.dispc2_data5 - LCD_D(5) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU14, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 25, "LCD_D(5)"), /* [-----] dpm_emu15.dispc2_data4 - LCD_D(4) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU15, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 26, "LCD_D(4)"), /* [-----] dpm_emu16.dispc2_data3 - LCD_D(3) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU16, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 27, "LCD_D(3)"), /* [-----] dpm_emu17.dispc2_data2 - LCD_D(2) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU17, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 28, "LCD_D(2)"), /* [-----] dpm_emu18.dispc2_data1 - LCD_D(1) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU18, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 190, "LCD_D(1)"), /* [-----] dpm_emu19.dispc2_data0 - LCD_D(0) */ OMAP4_MUXTBL(OMAP4_MUXTBL_DOMAIN_CORE, DPM_EMU19, OMAP_MUX_MODE5 | OMAP_PIN_OFF_OUTPUT_LOW, 191, "LCD_D(0)"), }; add_sec_muxtbl_to_list(SEC_MACHINE_ESPRESSO10, 0, muxtbl);