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path: root/drivers/net/tg3.c
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Diffstat (limited to 'drivers/net/tg3.c')
-rw-r--r--drivers/net/tg3.c407
1 files changed, 268 insertions, 139 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 6e6db95..3a74d21 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -68,8 +68,8 @@
#define DRV_MODULE_NAME "tg3"
#define PFX DRV_MODULE_NAME ": "
-#define DRV_MODULE_VERSION "3.104"
-#define DRV_MODULE_RELDATE "November 13, 2009"
+#define DRV_MODULE_VERSION "3.105"
+#define DRV_MODULE_RELDATE "December 2, 2009"
#define TG3_DEF_MAC_MODE 0
#define TG3_DEF_RX_MODE 0
@@ -4351,13 +4351,13 @@ static void tg3_tx(struct tg3_napi *tnapi)
struct netdev_queue *txq;
int index = tnapi - tp->napi;
- if (tp->tg3_flags2 & TG3_FLG2_USING_MSIX)
+ if (tp->tg3_flags3 & TG3_FLG3_ENABLE_TSS)
index--;
txq = netdev_get_tx_queue(tp->dev, index);
while (sw_idx != hw_idx) {
- struct tx_ring_info *ri = &tnapi->tx_buffers[sw_idx];
+ struct ring_info *ri = &tnapi->tx_buffers[sw_idx];
struct sk_buff *skb = ri->skb;
int i, tx_bug = 0;
@@ -4366,7 +4366,10 @@ static void tg3_tx(struct tg3_napi *tnapi)
return;
}
- skb_dma_unmap(&tp->pdev->dev, skb, DMA_TO_DEVICE);
+ pci_unmap_single(tp->pdev,
+ pci_unmap_addr(ri, mapping),
+ skb_headlen(skb),
+ PCI_DMA_TODEVICE);
ri->skb = NULL;
@@ -4376,6 +4379,11 @@ static void tg3_tx(struct tg3_napi *tnapi)
ri = &tnapi->tx_buffers[sw_idx];
if (unlikely(ri->skb != NULL || sw_idx == hw_idx))
tx_bug = 1;
+
+ pci_unmap_page(tp->pdev,
+ pci_unmap_addr(ri, mapping),
+ skb_shinfo(skb)->frags[i].size,
+ PCI_DMA_TODEVICE);
sw_idx = NEXT_TX(sw_idx);
}
@@ -4613,13 +4621,12 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget)
len = ((desc->idx_len & RXD_LEN_MASK) >> RXD_LEN_SHIFT) -
ETH_FCS_LEN;
- if (len > RX_COPY_THRESHOLD
- && tp->rx_offset == NET_IP_ALIGN
- /* rx_offset will likely not equal NET_IP_ALIGN
- * if this is a 5701 card running in PCI-X mode
- * [see tg3_get_invariants()]
- */
- ) {
+ if (len > RX_COPY_THRESHOLD &&
+ tp->rx_offset == NET_IP_ALIGN) {
+ /* rx_offset will likely not equal NET_IP_ALIGN
+ * if this is a 5701 card running in PCI-X mode
+ * [see tg3_get_invariants()]
+ */
int skb_size;
skb_size = tg3_alloc_rx_skb(tp, tpr, opaque_key,
@@ -5334,17 +5341,21 @@ static int tigon3_dma_hwbug_workaround(struct tg3_napi *tnapi,
} else {
/* New SKB is guaranteed to be linear. */
entry = *start;
- ret = skb_dma_map(&tp->pdev->dev, new_skb, DMA_TO_DEVICE);
- new_addr = skb_shinfo(new_skb)->dma_head;
+ new_addr = pci_map_single(tp->pdev, new_skb->data, new_skb->len,
+ PCI_DMA_TODEVICE);
+ /* Make sure the mapping succeeded */
+ if (pci_dma_mapping_error(tp->pdev, new_addr)) {
+ ret = -1;
+ dev_kfree_skb(new_skb);
+ new_skb = NULL;
/* Make sure new skb does not cross any 4G boundaries.
* Drop the packet if it does.
*/
- if (ret || ((tp->tg3_flags3 & TG3_FLG3_4G_DMA_BNDRY_BUG) &&
- tg3_4g_overflow_test(new_addr, new_skb->len))) {
- if (!ret)
- skb_dma_unmap(&tp->pdev->dev, new_skb,
- DMA_TO_DEVICE);
+ } else if ((tp->tg3_flags3 & TG3_FLG3_4G_DMA_BNDRY_BUG) &&
+ tg3_4g_overflow_test(new_addr, new_skb->len)) {
+ pci_unmap_single(tp->pdev, new_addr, new_skb->len,
+ PCI_DMA_TODEVICE);
ret = -1;
dev_kfree_skb(new_skb);
new_skb = NULL;
@@ -5358,15 +5369,28 @@ static int tigon3_dma_hwbug_workaround(struct tg3_napi *tnapi,
/* Now clean up the sw ring entries. */
i = 0;
while (entry != last_plus_one) {
+ int len;
+
if (i == 0)
- tnapi->tx_buffers[entry].skb = new_skb;
+ len = skb_headlen(skb);
else
+ len = skb_shinfo(skb)->frags[i-1].size;
+
+ pci_unmap_single(tp->pdev,
+ pci_unmap_addr(&tnapi->tx_buffers[entry],
+ mapping),
+ len, PCI_DMA_TODEVICE);
+ if (i == 0) {
+ tnapi->tx_buffers[entry].skb = new_skb;
+ pci_unmap_addr_set(&tnapi->tx_buffers[entry], mapping,
+ new_addr);
+ } else {
tnapi->tx_buffers[entry].skb = NULL;
+ }
entry = NEXT_TX(entry);
i++;
}
- skb_dma_unmap(&tp->pdev->dev, skb, DMA_TO_DEVICE);
dev_kfree_skb(skb);
return ret;
@@ -5403,14 +5427,15 @@ static netdev_tx_t tg3_start_xmit(struct sk_buff *skb,
{
struct tg3 *tp = netdev_priv(dev);
u32 len, entry, base_flags, mss;
- struct skb_shared_info *sp;
dma_addr_t mapping;
struct tg3_napi *tnapi;
struct netdev_queue *txq;
+ unsigned int i, last;
+
txq = netdev_get_tx_queue(dev, skb_get_queue_mapping(skb));
tnapi = &tp->napi[skb_get_queue_mapping(skb)];
- if (tp->tg3_flags2 & TG3_FLG2_USING_MSIX)
+ if (tp->tg3_flags3 & TG3_FLG3_ENABLE_TSS)
tnapi++;
/* We are running in BH disabled context with netif_tx_lock
@@ -5477,20 +5502,19 @@ static netdev_tx_t tg3_start_xmit(struct sk_buff *skb,
(vlan_tx_tag_get(skb) << 16));
#endif
- if (skb_dma_map(&tp->pdev->dev, skb, DMA_TO_DEVICE)) {
+ len = skb_headlen(skb);
+
+ /* Queue skb data, a.k.a. the main skb fragment. */
+ mapping = pci_map_single(tp->pdev, skb->data, len, PCI_DMA_TODEVICE);
+ if (pci_dma_mapping_error(tp->pdev, mapping)) {
dev_kfree_skb(skb);
goto out_unlock;
}
- sp = skb_shinfo(skb);
-
- mapping = sp->dma_head;
-
tnapi->tx_buffers[entry].skb = skb;
+ pci_unmap_addr_set(&tnapi->tx_buffers[entry], mapping, mapping);
- len = skb_headlen(skb);
-
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 &&
+ if ((tp->tg3_flags3 & TG3_FLG3_USE_JUMBO_BDFLAG) &&
!mss && skb->len > ETH_DATA_LEN)
base_flags |= TXD_FLAG_JMB_PKT;
@@ -5501,15 +5525,21 @@ static netdev_tx_t tg3_start_xmit(struct sk_buff *skb,
/* Now loop through additional data fragments, and queue them. */
if (skb_shinfo(skb)->nr_frags > 0) {
- unsigned int i, last;
-
last = skb_shinfo(skb)->nr_frags - 1;
for (i = 0; i <= last; i++) {
skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
len = frag->size;
- mapping = sp->dma_maps[i];
+ mapping = pci_map_page(tp->pdev,
+ frag->page,
+ frag->page_offset,
+ len, PCI_DMA_TODEVICE);
+ if (pci_dma_mapping_error(tp->pdev, mapping))
+ goto dma_error;
+
tnapi->tx_buffers[entry].skb = NULL;
+ pci_unmap_addr_set(&tnapi->tx_buffers[entry], mapping,
+ mapping);
tg3_set_txd(tnapi, entry, mapping, len,
base_flags, (i == last) | (mss << 1));
@@ -5532,6 +5562,27 @@ out_unlock:
mmiowb();
return NETDEV_TX_OK;
+
+dma_error:
+ last = i;
+ entry = tnapi->tx_prod;
+ tnapi->tx_buffers[entry].skb = NULL;
+ pci_unmap_single(tp->pdev,
+ pci_unmap_addr(&tnapi->tx_buffers[entry], mapping),
+ skb_headlen(skb),
+ PCI_DMA_TODEVICE);
+ for (i = 0; i <= last; i++) {
+ skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
+ entry = NEXT_TX(entry);
+
+ pci_unmap_page(tp->pdev,
+ pci_unmap_addr(&tnapi->tx_buffers[entry],
+ mapping),
+ frag->size, PCI_DMA_TODEVICE);
+ }
+
+ dev_kfree_skb(skb);
+ return NETDEV_TX_OK;
}
static netdev_tx_t tg3_start_xmit_dma_bug(struct sk_buff *,
@@ -5579,15 +5630,16 @@ static netdev_tx_t tg3_start_xmit_dma_bug(struct sk_buff *skb,
{
struct tg3 *tp = netdev_priv(dev);
u32 len, entry, base_flags, mss;
- struct skb_shared_info *sp;
int would_hit_hwbug;
dma_addr_t mapping;
struct tg3_napi *tnapi;
struct netdev_queue *txq;
+ unsigned int i, last;
+
txq = netdev_get_tx_queue(dev, skb_get_queue_mapping(skb));
tnapi = &tp->napi[skb_get_queue_mapping(skb)];
- if (tp->tg3_flags2 & TG3_FLG2_USING_MSIX)
+ if (tp->tg3_flags3 & TG3_FLG3_ENABLE_TSS)
tnapi++;
/* We are running in BH disabled context with netif_tx_lock
@@ -5674,25 +5726,23 @@ static netdev_tx_t tg3_start_xmit_dma_bug(struct sk_buff *skb,
(vlan_tx_tag_get(skb) << 16));
#endif
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 &&
+ if ((tp->tg3_flags3 & TG3_FLG3_USE_JUMBO_BDFLAG) &&
!mss && skb->len > ETH_DATA_LEN)
base_flags |= TXD_FLAG_JMB_PKT;
- if (skb_dma_map(&tp->pdev->dev, skb, DMA_TO_DEVICE)) {
+ len = skb_headlen(skb);
+
+ mapping = pci_map_single(tp->pdev, skb->data, len, PCI_DMA_TODEVICE);
+ if (pci_dma_mapping_error(tp->pdev, mapping)) {
dev_kfree_skb(skb);
goto out_unlock;
}
- sp = skb_shinfo(skb);
-
- mapping = sp->dma_head;
-
tnapi->tx_buffers[entry].skb = skb;
+ pci_unmap_addr_set(&tnapi->tx_buffers[entry], mapping, mapping);
would_hit_hwbug = 0;
- len = skb_headlen(skb);
-
if ((tp->tg3_flags3 & TG3_FLG3_SHORT_DMA_BUG) && len <= 8)
would_hit_hwbug = 1;
@@ -5714,16 +5764,21 @@ static netdev_tx_t tg3_start_xmit_dma_bug(struct sk_buff *skb,
/* Now loop through additional data fragments, and queue them. */
if (skb_shinfo(skb)->nr_frags > 0) {
- unsigned int i, last;
-
last = skb_shinfo(skb)->nr_frags - 1;
for (i = 0; i <= last; i++) {
skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
len = frag->size;
- mapping = sp->dma_maps[i];
+ mapping = pci_map_page(tp->pdev,
+ frag->page,
+ frag->page_offset,
+ len, PCI_DMA_TODEVICE);
tnapi->tx_buffers[entry].skb = NULL;
+ pci_unmap_addr_set(&tnapi->tx_buffers[entry], mapping,
+ mapping);
+ if (pci_dma_mapping_error(tp->pdev, mapping))
+ goto dma_error;
if ((tp->tg3_flags3 & TG3_FLG3_SHORT_DMA_BUG) &&
len <= 8)
@@ -5779,6 +5834,27 @@ out_unlock:
mmiowb();
return NETDEV_TX_OK;
+
+dma_error:
+ last = i;
+ entry = tnapi->tx_prod;
+ tnapi->tx_buffers[entry].skb = NULL;
+ pci_unmap_single(tp->pdev,
+ pci_unmap_addr(&tnapi->tx_buffers[entry], mapping),
+ skb_headlen(skb),
+ PCI_DMA_TODEVICE);
+ for (i = 0; i <= last; i++) {
+ skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
+ entry = NEXT_TX(entry);
+
+ pci_unmap_page(tp->pdev,
+ pci_unmap_addr(&tnapi->tx_buffers[entry],
+ mapping),
+ frag->size, PCI_DMA_TODEVICE);
+ }
+
+ dev_kfree_skb(skb);
+ return NETDEV_TX_OK;
}
static inline void tg3_set_mtu(struct net_device *dev, struct tg3 *tp,
@@ -6046,8 +6122,9 @@ static void tg3_free_rings(struct tg3 *tp)
continue;
for (i = 0; i < TG3_TX_RING_SIZE; ) {
- struct tx_ring_info *txp;
+ struct ring_info *txp;
struct sk_buff *skb;
+ unsigned int k;
txp = &tnapi->tx_buffers[i];
skb = txp->skb;
@@ -6057,11 +6134,22 @@ static void tg3_free_rings(struct tg3 *tp)
continue;
}
- skb_dma_unmap(&tp->pdev->dev, skb, DMA_TO_DEVICE);
-
+ pci_unmap_single(tp->pdev,
+ pci_unmap_addr(txp, mapping),
+ skb_headlen(skb),
+ PCI_DMA_TODEVICE);
txp->skb = NULL;
- i += skb_shinfo(skb)->nr_frags + 1;
+ i++;
+
+ for (k = 0; k < skb_shinfo(skb)->nr_frags; k++) {
+ txp = &tnapi->tx_buffers[i & (TG3_TX_RING_SIZE - 1)];
+ pci_unmap_page(tp->pdev,
+ pci_unmap_addr(txp, mapping),
+ skb_shinfo(skb)->frags[k].size,
+ PCI_DMA_TODEVICE);
+ i++;
+ }
dev_kfree_skb_any(skb);
}
@@ -6190,6 +6278,24 @@ static int tg3_alloc_consistent(struct tg3 *tp)
memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE);
sblk = tnapi->hw_status;
+ /* If multivector TSS is enabled, vector 0 does not handle
+ * tx interrupts. Don't allocate any resources for it.
+ */
+ if ((!i && !(tp->tg3_flags3 & TG3_FLG3_ENABLE_TSS)) ||
+ (i && (tp->tg3_flags3 & TG3_FLG3_ENABLE_TSS))) {
+ tnapi->tx_buffers = kzalloc(sizeof(struct ring_info) *
+ TG3_TX_RING_SIZE,
+ GFP_KERNEL);
+ if (!tnapi->tx_buffers)
+ goto err_out;
+
+ tnapi->tx_ring = pci_alloc_consistent(tp->pdev,
+ TG3_TX_RING_BYTES,
+ &tnapi->tx_desc_mapping);
+ if (!tnapi->tx_ring)
+ goto err_out;
+ }
+
/*
* When RSS is enabled, the status block format changes
* slightly. The "rx_jumbo_consumer", "reserved",
@@ -6230,17 +6336,6 @@ static int tg3_alloc_consistent(struct tg3 *tp)
goto err_out;
memset(tnapi->rx_rcb, 0, TG3_RX_RCB_RING_BYTES(tp));
-
- tnapi->tx_buffers = kzalloc(sizeof(struct tx_ring_info) *
- TG3_TX_RING_SIZE, GFP_KERNEL);
- if (!tnapi->tx_buffers)
- goto err_out;
-
- tnapi->tx_ring = pci_alloc_consistent(tp->pdev,
- TG3_TX_RING_BYTES,
- &tnapi->tx_desc_mapping);
- if (!tnapi->tx_ring)
- goto err_out;
}
return 0;
@@ -6876,7 +6971,8 @@ static int tg3_chip_reset(struct tg3 *tp)
if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) &&
tp->pci_chip_rev_id != CHIPREV_ID_5750_A0 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
- GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717) {
+ GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
+ GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) {
val = tr32(0x7c00);
tw32(0x7c00, val | (1 << 25));
@@ -7228,19 +7324,21 @@ static void __tg3_set_coalesce(struct tg3 *tp, struct ethtool_coalesce *ec)
{
int i;
- if (!(tp->tg3_flags2 & TG3_FLG2_USING_MSIX)) {
+ if (!(tp->tg3_flags3 & TG3_FLG3_ENABLE_TSS)) {
tw32(HOSTCC_TXCOL_TICKS, ec->tx_coalesce_usecs);
tw32(HOSTCC_TXMAX_FRAMES, ec->tx_max_coalesced_frames);
tw32(HOSTCC_TXCOAL_MAXF_INT, ec->tx_max_coalesced_frames_irq);
-
- tw32(HOSTCC_RXCOL_TICKS, ec->rx_coalesce_usecs);
- tw32(HOSTCC_RXMAX_FRAMES, ec->rx_max_coalesced_frames);
- tw32(HOSTCC_RXCOAL_MAXF_INT, ec->rx_max_coalesced_frames_irq);
} else {
tw32(HOSTCC_TXCOL_TICKS, 0);
tw32(HOSTCC_TXMAX_FRAMES, 0);
tw32(HOSTCC_TXCOAL_MAXF_INT, 0);
+ }
+ if (!(tp->tg3_flags2 & TG3_FLG2_USING_MSIX)) {
+ tw32(HOSTCC_RXCOL_TICKS, ec->rx_coalesce_usecs);
+ tw32(HOSTCC_RXMAX_FRAMES, ec->rx_max_coalesced_frames);
+ tw32(HOSTCC_RXCOAL_MAXF_INT, ec->rx_max_coalesced_frames_irq);
+ } else {
tw32(HOSTCC_RXCOL_TICKS, 0);
tw32(HOSTCC_RXMAX_FRAMES, 0);
tw32(HOSTCC_RXCOAL_MAXF_INT, 0);
@@ -7263,25 +7361,31 @@ static void __tg3_set_coalesce(struct tg3 *tp, struct ethtool_coalesce *ec)
reg = HOSTCC_RXCOL_TICKS_VEC1 + i * 0x18;
tw32(reg, ec->rx_coalesce_usecs);
- reg = HOSTCC_TXCOL_TICKS_VEC1 + i * 0x18;
- tw32(reg, ec->tx_coalesce_usecs);
reg = HOSTCC_RXMAX_FRAMES_VEC1 + i * 0x18;
tw32(reg, ec->rx_max_coalesced_frames);
- reg = HOSTCC_TXMAX_FRAMES_VEC1 + i * 0x18;
- tw32(reg, ec->tx_max_coalesced_frames);
reg = HOSTCC_RXCOAL_MAXF_INT_VEC1 + i * 0x18;
tw32(reg, ec->rx_max_coalesced_frames_irq);
- reg = HOSTCC_TXCOAL_MAXF_INT_VEC1 + i * 0x18;
- tw32(reg, ec->tx_max_coalesced_frames_irq);
+
+ if (tp->tg3_flags3 & TG3_FLG3_ENABLE_TSS) {
+ reg = HOSTCC_TXCOL_TICKS_VEC1 + i * 0x18;
+ tw32(reg, ec->tx_coalesce_usecs);
+ reg = HOSTCC_TXMAX_FRAMES_VEC1 + i * 0x18;
+ tw32(reg, ec->tx_max_coalesced_frames);
+ reg = HOSTCC_TXCOAL_MAXF_INT_VEC1 + i * 0x18;
+ tw32(reg, ec->tx_max_coalesced_frames_irq);
+ }
}
for (; i < tp->irq_max - 1; i++) {
tw32(HOSTCC_RXCOL_TICKS_VEC1 + i * 0x18, 0);
- tw32(HOSTCC_TXCOL_TICKS_VEC1 + i * 0x18, 0);
tw32(HOSTCC_RXMAX_FRAMES_VEC1 + i * 0x18, 0);
- tw32(HOSTCC_TXMAX_FRAMES_VEC1 + i * 0x18, 0);
tw32(HOSTCC_RXCOAL_MAXF_INT_VEC1 + i * 0x18, 0);
- tw32(HOSTCC_TXCOAL_MAXF_INT_VEC1 + i * 0x18, 0);
+
+ if (tp->tg3_flags3 & TG3_FLG3_ENABLE_TSS) {
+ tw32(HOSTCC_TXCOL_TICKS_VEC1 + i * 0x18, 0);
+ tw32(HOSTCC_TXMAX_FRAMES_VEC1 + i * 0x18, 0);
+ tw32(HOSTCC_TXCOAL_MAXF_INT_VEC1 + i * 0x18, 0);
+ }
}
}
@@ -7295,6 +7399,8 @@ static void tg3_rings_reset(struct tg3 *tp)
/* Disable all transmit rings but the first. */
if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 16;
+ else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
+ limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE * 2;
else
limit = NIC_SRAM_SEND_RCB + TG3_BDINFO_SIZE;
@@ -7309,7 +7415,8 @@ static void tg3_rings_reset(struct tg3 *tp)
limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 17;
else if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 16;
- else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755)
+ else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE * 4;
else
limit = NIC_SRAM_RCV_RET_RCB + TG3_BDINFO_SIZE;
@@ -7382,17 +7489,19 @@ static void tg3_rings_reset(struct tg3 *tp)
/* Clear status block in ram. */
memset(tnapi->hw_status, 0, TG3_HW_STATUS_SIZE);
- tg3_set_bdinfo(tp, txrcb, tnapi->tx_desc_mapping,
- (TG3_TX_RING_SIZE <<
- BDINFO_FLAGS_MAXLEN_SHIFT),
- NIC_SRAM_TX_BUFFER_DESC);
+ if (tnapi->tx_ring) {
+ tg3_set_bdinfo(tp, txrcb, tnapi->tx_desc_mapping,
+ (TG3_TX_RING_SIZE <<
+ BDINFO_FLAGS_MAXLEN_SHIFT),
+ NIC_SRAM_TX_BUFFER_DESC);
+ txrcb += TG3_BDINFO_SIZE;
+ }
tg3_set_bdinfo(tp, rxrcb, tnapi->rx_rcb_mapping,
(TG3_RX_RCB_RING_SIZE(tp) <<
BDINFO_FLAGS_MAXLEN_SHIFT), 0);
stblk += 8;
- txrcb += TG3_BDINFO_SIZE;
rxrcb += TG3_BDINFO_SIZE;
}
}
@@ -7504,7 +7613,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
if (err)
return err;
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) {
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
val = tr32(TG3PCI_DMA_RW_CTRL) &
~DMA_RWCTRL_DIS_CACHE_ALIGNMENT;
tw32(TG3PCI_DMA_RW_CTRL, val | tp->dma_rwctrl);
@@ -7665,7 +7775,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
BDINFO_FLAGS_DISABLED);
}
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
val = (RX_STD_MAX_SIZE_5705 << BDINFO_FLAGS_MAXLEN_SHIFT) |
(RX_STD_MAX_SIZE << 2);
else
@@ -7682,7 +7793,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
tp->rx_jumbo_pending : 0;
tw32_rx_mbox(TG3_RX_JMB_PROD_IDX_REG, tpr->rx_jmb_prod_idx);
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) {
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
tw32(STD_REPLENISH_LWM, 32);
tw32(JMB_REPLENISH_LWM, 16);
}
@@ -7935,7 +8047,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
if (tp->tg3_flags2 & TG3_FLG2_HW_TSO)
tw32(SNDDATAI_MODE, SNDDATAI_MODE_ENABLE | 0x8);
val = SNDBDI_MODE_ENABLE | SNDBDI_MODE_ATTN_ENABLE;
- if (tp->tg3_flags2 & TG3_FLG2_USING_MSIX)
+ if (tp->tg3_flags3 & TG3_FLG3_ENABLE_TSS)
val |= SNDBDI_MODE_MULTI_TXQ_EN;
tw32(SNDBDI_MODE, val);
tw32(SNDBDS_MODE, SNDBDS_MODE_ENABLE | SNDBDS_MODE_ATTN_ENABLE);
@@ -8359,7 +8471,8 @@ static int tg3_test_interrupt(struct tg3 *tp)
* Turn off MSI one shot mode. Otherwise this test has no
* observable way to know whether the interrupt was delivered.
*/
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 &&
+ if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) &&
(tp->tg3_flags2 & TG3_FLG2_USING_MSI)) {
val = tr32(MSGINT_MODE) | MSGINT_MODE_ONE_SHOT_DISABLE;
tw32(MSGINT_MODE, val);
@@ -8402,7 +8515,8 @@ static int tg3_test_interrupt(struct tg3 *tp)
if (intr_ok) {
/* Reenable MSI one shot mode. */
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 &&
+ if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) &&
(tp->tg3_flags2 & TG3_FLG2_USING_MSI)) {
val = tr32(MSGINT_MODE) & ~MSGINT_MODE_ONE_SHOT_DISABLE;
tw32(MSGINT_MODE, val);
@@ -8543,7 +8657,11 @@ static bool tg3_enable_msix(struct tg3 *tp)
for (i = 0; i < tp->irq_max; i++)
tp->napi[i].irq_vec = msix_ent[i].vector;
- tp->dev->real_num_tx_queues = tp->irq_cnt - 1;
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) {
+ tp->tg3_flags3 |= TG3_FLG3_ENABLE_TSS;
+ tp->dev->real_num_tx_queues = tp->irq_cnt - 1;
+ } else
+ tp->dev->real_num_tx_queues = 1;
return true;
}
@@ -8694,6 +8812,7 @@ static int tg3_open(struct net_device *dev)
}
if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
+ GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765 &&
(tp->tg3_flags2 & TG3_FLG2_USING_MSI) &&
(tp->tg3_flags2 & TG3_FLG2_1SHOT_MSI)) {
u32 val = tr32(PCIE_TRANSACTION_CFG);
@@ -10637,7 +10756,8 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
for (i = 14; i < tx_len; i++)
tx_data[i] = (u8) (i & 0xff);
- if (skb_dma_map(&tp->pdev->dev, skb, DMA_TO_DEVICE)) {
+ map = pci_map_single(tp->pdev, skb->data, tx_len, PCI_DMA_TODEVICE);
+ if (pci_dma_mapping_error(tp->pdev, map)) {
dev_kfree_skb(skb);
return -EIO;
}
@@ -10651,8 +10771,7 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
num_pkts = 0;
- tg3_set_txd(tnapi, tnapi->tx_prod,
- skb_shinfo(skb)->dma_head, tx_len, 0, 1);
+ tg3_set_txd(tnapi, tnapi->tx_prod, map, tx_len, 0, 1);
tnapi->tx_prod++;
num_pkts++;
@@ -10676,7 +10795,7 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
break;
}
- skb_dma_unmap(&tp->pdev->dev, skb, DMA_TO_DEVICE);
+ pci_unmap_single(tp->pdev, map, tx_len, PCI_DMA_TODEVICE);
dev_kfree_skb(skb);
if (tx_idx != tnapi->tx_prod)
@@ -11588,7 +11707,8 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
tg3_get_5761_nvram_info(tp);
else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
tg3_get_5906_nvram_info(tp);
- else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780)
+ else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
tg3_get_57780_nvram_info(tp);
else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
tg3_get_5717_nvram_info(tp);
@@ -12313,7 +12433,7 @@ skip_phy_reset:
static void __devinit tg3_read_partno(struct tg3 *tp)
{
- unsigned char vpd_data[256]; /* in little-endian format */
+ unsigned char vpd_data[TG3_NVM_VPD_LEN]; /* in little-endian format */
unsigned int i;
u32 magic;
@@ -12322,48 +12442,37 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
goto out_not_found;
if (magic == TG3_EEPROM_MAGIC) {
- for (i = 0; i < 256; i += 4) {
+ for (i = 0; i < TG3_NVM_VPD_LEN; i += 4) {
u32 tmp;
/* The data is in little-endian format in NVRAM.
* Use the big-endian read routines to preserve
* the byte order as it exists in NVRAM.
*/
- if (tg3_nvram_read_be32(tp, 0x100 + i, &tmp))
+ if (tg3_nvram_read_be32(tp, TG3_NVM_VPD_OFF + i, &tmp))
goto out_not_found;
memcpy(&vpd_data[i], &tmp, sizeof(tmp));
}
} else {
- int vpd_cap;
-
- vpd_cap = pci_find_capability(tp->pdev, PCI_CAP_ID_VPD);
- for (i = 0; i < 256; i += 4) {
- u32 tmp, j = 0;
- __le32 v;
- u16 tmp16;
-
- pci_write_config_word(tp->pdev, vpd_cap + PCI_VPD_ADDR,
- i);
- while (j++ < 100) {
- pci_read_config_word(tp->pdev, vpd_cap +
- PCI_VPD_ADDR, &tmp16);
- if (tmp16 & 0x8000)
- break;
- msleep(1);
- }
- if (!(tmp16 & 0x8000))
+ ssize_t cnt;
+ unsigned int pos = 0, i = 0;
+
+ for (; pos < TG3_NVM_VPD_LEN && i < 3; i++, pos += cnt) {
+ cnt = pci_read_vpd(tp->pdev, pos,
+ TG3_NVM_VPD_LEN - pos,
+ &vpd_data[pos]);
+ if (cnt == -ETIMEDOUT || -EINTR)
+ cnt = 0;
+ else if (cnt < 0)
goto out_not_found;
-
- pci_read_config_dword(tp->pdev, vpd_cap + PCI_VPD_DATA,
- &tmp);
- v = cpu_to_le32(tmp);
- memcpy(&vpd_data[i], &v, sizeof(v));
}
+ if (pos != TG3_NVM_VPD_LEN)
+ goto out_not_found;
}
/* Now parse and find the part number. */
- for (i = 0; i < 254; ) {
+ for (i = 0; i < TG3_NVM_VPD_LEN - 2; ) {
unsigned char val = vpd_data[i];
unsigned int block_end;
@@ -12382,7 +12491,7 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
(vpd_data[i + 2] << 8)));
i += 3;
- if (block_end > 256)
+ if (block_end > TG3_NVM_VPD_LEN)
goto out_not_found;
while (i < (block_end - 2)) {
@@ -12391,7 +12500,8 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
int partno_len = vpd_data[i + 2];
i += 3;
- if (partno_len > 24 || (partno_len + i) > 256)
+ if (partno_len > TG3_BPN_SIZE ||
+ (partno_len + i) > TG3_NVM_VPD_LEN)
goto out_not_found;
memcpy(tp->board_part_number,
@@ -12422,6 +12532,8 @@ out_not_found:
else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 &&
tp->pdev->device == TG3PCI_DEVICE_TIGON3_57788)
strcpy(tp->board_part_number, "BCM57788");
+ else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
+ strcpy(tp->board_part_number, "BCM57765");
else
strcpy(tp->board_part_number, "none");
}
@@ -12711,6 +12823,15 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
pci_read_config_dword(tp->pdev,
TG3PCI_GEN2_PRODID_ASICREV,
&prod_id_asic_rev);
+ else if (tp->pdev->device == TG3PCI_DEVICE_TIGON3_57781 ||
+ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57785 ||
+ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57761 ||
+ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57765 ||
+ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57791 ||
+ tp->pdev->device == TG3PCI_DEVICE_TIGON3_57795)
+ pci_read_config_dword(tp->pdev,
+ TG3PCI_GEN15_PRODID_ASICREV,
+ &prod_id_asic_rev);
else
pci_read_config_dword(tp->pdev, TG3PCI_PRODID_ASICREV,
&prod_id_asic_rev);
@@ -12864,7 +12985,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
tp->tg3_flags3 |= TG3_FLG3_5755_PLUS;
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
@@ -12891,7 +13013,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
}
/* Determine TSO capabilities */
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
tp->tg3_flags2 |= TG3_FLG2_HW_TSO_3;
else if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
@@ -12927,7 +13050,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
tp->tg3_flags2 |= TG3_FLG2_1SHOT_MSI;
}
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) {
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
tp->tg3_flags |= TG3_FLAG_SUPPORT_MSIX;
tp->irq_max = TG3_IRQ_MAX_VECS;
}
@@ -12941,9 +13065,13 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
tp->tg3_flags3 |= TG3_FLG3_40BIT_DMA_LIMIT_BUG;
}
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
+ tp->tg3_flags3 |= TG3_FLG3_USE_JUMBO_BDFLAG;
+
if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ||
(tp->tg3_flags2 & TG3_FLG2_5780_CLASS) ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
+ (tp->tg3_flags3 & TG3_FLG3_USE_JUMBO_BDFLAG))
tp->tg3_flags |= TG3_FLAG_JUMBO_CAPABLE;
pci_read_config_dword(tp->pdev, TG3PCI_PCISTATE,
@@ -13136,7 +13264,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780 ||
- GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
tp->tg3_flags |= TG3_FLAG_CPMU_PRESENT;
/* Set up tp->grc_local_ctrl before calling tg3_set_power_state().
@@ -13215,7 +13344,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
!(tp->tg3_flags3 & TG3_FLG3_PHY_IS_FET) &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5785 &&
GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57780 &&
- GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717) {
+ GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
+ GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) {
if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 ||
@@ -13539,7 +13669,8 @@ static u32 __devinit tg3_calc_dma_bndry(struct tg3 *tp, u32 val)
#endif
#endif
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717) {
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) {
val = goal ? 0 : DMA_RWCTRL_DIS_CACHE_ALIGNMENT;
goto out;
}
@@ -13751,7 +13882,8 @@ static int __devinit tg3_test_dma(struct tg3 *tp)
tp->dma_rwctrl = tg3_calc_dma_bndry(tp, tp->dma_rwctrl);
- if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717)
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765)
goto out;
if (tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) {
@@ -13944,7 +14076,8 @@ static void __devinit tg3_init_link_config(struct tg3 *tp)
static void __devinit tg3_init_bufmgr_config(struct tg3 *tp)
{
if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS &&
- GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717) {
+ GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5717 &&
+ GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_57765) {
tp->bufmgr_config.mbuf_read_dma_low_water =
DEFAULT_MB_RDMA_LOW_WATER_5705;
tp->bufmgr_config.mbuf_mac_rx_low_water =
@@ -14349,7 +14482,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
if (err) {
printk(KERN_ERR PFX "Could not obtain valid ethernet address, "
"aborting.\n");
- goto err_out_fw;
+ goto err_out_iounmap;
}
if (tp->tg3_flags3 & TG3_FLG3_ENABLE_APE) {
@@ -14358,7 +14491,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
printk(KERN_ERR PFX "Cannot map APE registers, "
"aborting.\n");
err = -ENOMEM;
- goto err_out_fw;
+ goto err_out_iounmap;
}
tg3_ape_lock_init(tp);
@@ -14489,10 +14622,6 @@ err_out_apeunmap:
tp->aperegs = NULL;
}
-err_out_fw:
- if (tp->fw)
- release_firmware(tp->fw);
-
err_out_iounmap:
if (tp->regs) {
iounmap(tp->regs);
generated by cgit v1.1 at 2025-08-22 06:30:10 +0000