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* ARM: PXA SoCs: irq_data conversion.Lennert Buytenhek2011-01-131-1/+3
| | | | Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
* Merge branch 'next-spi' of git://git.secretlab.ca/git/linux-2.6Linus Torvalds2011-01-071-186/+0
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next-spi' of git://git.secretlab.ca/git/linux-2.6: (77 commits) spi/omap: Fix DMA API usage in OMAP MCSPI driver spi/imx: correct the test on platform_get_irq() return value spi/topcliff: Typo fix threhold to threshold spi/dw_spi Typo change diable to disable. spi/fsl_espi: change the read behaviour of the SPIRF spi/mpc52xx-psc-spi: move probe/remove to proper sections spi/dw_spi: add DMA support spi/dw_spi: change to EXPORT_SYMBOL_GPL for exported APIs spi/dw_spi: Fix too short timeout in spi polling loop spi/pl022: convert running variable spi/pl022: convert busy flag to a bool spi/pl022: pass the returned sglen to the DMA engine spi/pl022: map the buffers on the DMA engine spi/topcliff_pch: Fix data transfer issue spi/imx: remove autodetection spi/pxa2xx: pass of_node to spi device and set a parent device spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes. spi/pxa2xx: Add chipselect support for Sodaville spi/pxa2xx: Consider CE4100's FIFO depth spi/pxa2xx: Add CE4100 support ...
| * Merge branch 'spi' of git://git.linutronix.de/users/bigeasy/soda into spi/nextGrant Likely2010-12-291-186/+0
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'spi' of git://git.linutronix.de/users/bigeasy/soda into spi/next spi/pxa2xx: register driver properly spi/pxa2xx: add support for shared IRQ handler spi/pxa2xx: Use define for SSSR_TFL_MASK instead of plain numbers arm/pxa2xx: reorgazine SSP and SPI header files spi/pxa2xx: Add CE4100 support spi/pxa2xx: Consider CE4100's FIFO depth spi/pxa2xx: Add chipselect support for Sodaville spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes. spi/pxa2xx: pass of_node to spi device and set a parent device
| | * arm/pxa2xx: reorgazine SSP and SPI header filesSebastian Andrzej Siewior2010-12-011-187/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PXA-SPI driver relies on some files / defines which are arm specific and are within the ARM tree. The CE4100 SoC which is x86 has also the SPI core. This patch moves the ssp and spi files from arm/mach-pxa and plat-pxa to include/linux where the CE4100 can access them. This move got verified by building the following defconfigs: cm_x2xx_defconfig corgi_defconfig em_x270_defconfig ezx_defconfig imote2_defconfig pxa3xx_defconfig spitz_defconfig zeus_defconfig raumfeld_defconfig magician_defconfig Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
| | * spi/pxa2xx: Use define for SSSR_TFL_MASK instead of plain numbersSebastian Andrzej Siewior2010-12-011-1/+2
| | | | | | | | | | | | | | | Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
* | | ARM: pxa: support pxa95xHaojian Zhuang2010-12-181-2/+2
|/ / | | | | | | | | | | | | | | The core of PXA955 is PJ4. Add new PJ4 support. And add new macro CONFIG_PXA95x. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* | mmc: sdhci: 8-bit bus width changesPhilip Rakity2010-11-221-0/+3
|/ | | | | | | | | | | | | | | | | | | | | | We now: * check for a v3 controller before setting 8-bit bus width * offer a callback for platform code to switch to 8-bit mode, which allows non-v3 controllers to support it * rely on mmc->caps |= MMC_CAP_8_BIT_DATA; in platform code to specify that the board designers have indeed brought out all the pins for 8-bit to the slot. We were previously relying only on whether the *controller* supported 8-bit, which doesn't tell us anything about the pin configuration in the board design. This fixes the MMC card regression reported by Maxim Levitsky here: http://thread.gmane.org/gmane.linux.kernel.mmc/4336 by no longer assuming that 8-bit works by default. Signed-off-by: Philip Rakity <prakity@marvell.com> Tested-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* Merge git://git.infradead.org/mtd-2.6Linus Torvalds2010-10-301-9/+9
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.infradead.org/mtd-2.6: (82 commits) mtd: fix build error in m25p80.c mtd: Remove redundant mutex from mtd_blkdevs.c MTD: Fix wrong check register_blkdev return value Revert "mtd: cleanup Kconfig dependencies" mtd: cfi_cmdset_0002: make sector erase command variable mtd: cfi_cmdset_0002: add CFI detection for SST 38VF640x chips mtd: cfi_util: add support for switching SST 39VF640xB chips into QRY mode mtd: cfi_cmdset_0001: use defined value of P_ID_INTEL_PERFORMANCE instead of hardcoded one block2mtd: dubious assignment P4080/mtd: Fix the freescale lbc issue with 36bit mode P4080/eLBC: Make Freescale elbc interrupt common to elbc devices mtd: phram: use KBUILD_MODNAME mtd: OneNAND: S5PC110: Fix double call suspend & resume function mtd: nand: fix MTD_MODE_RAW writes jffs2: use kmemdup mtd: sm_ftl: cosmetic, use bool when possible mtd: r852: remove useless pci powerup/down from suspend/resume routines mtd: blktrans: fix a race vs kthread_stop mtd: blktrans: kill BKL mtd: allow to unload the mtdtrans module if its block devices aren't open ... Fix up trivial whitespace-introduced conflict in drivers/mtd/mtdchar.c
| * Merge branch 'master' of ↵David Woodhouse2010-10-301-0/+69
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git Conflicts: drivers/mtd/mtd_blkdevs.c Merge Grant's device-tree bits so that we can apply the subsequent fixes. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: pxa3xx_nand: condense the flash definitionLei Wen2010-10-241-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding a new flash definition would need less code. Keep the platform passing flash definition method. If one flash is both defined in platform data and builtin table, driver would select the one from platform data first. By this way, platform could select the timing most suit for itself, not need to follow the common settings. Signed-off-by: Lei Wen <leiwen@marvell.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* | | mmc: add new sdhci-pxa driver for Marvell SoCsZhangfei Gao2010-10-251-0/+32
| |/ |/| | | | | | | | | | | | | Support Marvell PXA168/PXA910/MMP2 SD Host Controller. Signed-off-by: Zhangfei Gao <zhangfei.gao@marvell.com> Acked-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* | ARM: pxa27x_keypad: added wakeup event handler for keypad interruptsMark F. Brown2010-10-091-0/+10
| | | | | | | | | | | | | | mach-mmp needs to clear wake event in order to clear the keypad interrupt Signed-off-by: Mark F. Brown <mark.brown314@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* | ARM: pxa: moved pxa27x_keypad.h to platform pxa directoryMark F. Brown2010-10-091-0/+59
|/ | | | | | | | mach-mmp utilizes pxa27x_keypad code so we need to move header to platform pxa directory. Signed-off-by: Mark F. Brown <mark.brown314@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: add namespace on sspHaojian Zhuang2010-05-111-6/+6
| | | | | | | | In order to prevent code ambiguous, add namespace on functions in ssp driver. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] mmp: update mfp settingHaojian Zhuang2010-05-111-0/+7
| | | | | | | Update mfp setting for mmp2. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] mmp: support ssp in pxa168Haojian Zhuang2010-05-111-0/+1
| | | | | | | Support ssp devices in PXA168. PXA168 could reuse the code of PXA SSP. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: simplify ifdef in ssp.hHaojian Zhuang2010-05-111-26/+15
| | | | | | | | | Try to keep minimum ifdef in ssp.h. Some of the definitions are valid only to specific SoCs, and device drivers should be responsible to take care of these difference. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: move ssp into common plat-pxaHaojian Zhuang2010-05-111-0/+196
| | | | | | Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* pxa3xx_nand: move pxa3xx_nand.h common into plat directoryHaojian Zhuang2009-12-011-0/+63
| | | | | | | | | Since the same nand controller is shared between ARCH_PXA and ARCH_MMP. Move the pxa3xx_nand.h from mach directory to plat directoy. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Cc: David Woodhouse <david.woodhouse@intel.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: fix incorrect mfp_to_gpio() conversionEric Miao2009-11-131-1/+1
| | | | | | | Since MFP_PIN_GPIO* now includes 128-255, mfp_to_gpio() is no longer valid for those additional pins, fix it. Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: support mfp of pxa935Haojian Zhuang2009-09-101-0/+68
| | | | | | | Add and initialize the mfp setting of pxa935 chip. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: add MFP_PULL_FLOATDaniel Mack2009-09-101-2/+3
| | | | | | | | | | | There is currently an uncovered case for MFP configuration on PXAs which is selected by setting the PULL_SEL bit but none of the PULL{UP,DOWN}_EN bits. This case is needed to explicitly let pins float, even if the selected alternate function would default to a configuration with a pull resistor enabled. Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: move mach/i2c.h to plat/i2c.hEric Miao2009-06-051-0/+82
| | | | | Signed-off-by: Paul Shen <paul.shen@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
* [ARM] pxa: add base support for Marvell PXA910Eric Miao2009-03-231-0/+30
| | | | | Signed-off-by: Bin Yang <bin.yang@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
* [ARM] pxa: move common MFP handling code into plat-pxaEric Miao2009-03-231-0/+369
| | | | Signed-off-by: Eric Miao <eric.miao@marvell.com>
* [ARM] pxa: move common GPIO handling code into plat-pxaEric Miao2009-03-231-0/+62
| | | | | | | | | | | | | | | | | | | | | | 1. add common GPIO handling code into [arch/arm/plat-pxa] 2. common code in <mach/gpio.h> moved into <plat/gpio.h>, new processors should implement its own <mach/gpio.h>, provide the following required definitions and '#include <plat/gpio.h>' in the end: - GPIO_REGS_VIRT for mapped virtual address of the GPIO registers' physical I/O memory - macros of GPLR(), GPSR(), GPDR() for constant optimization for functions gpio_{set,get}_value() (so that bit-bang code can still have tolerable performance) - NR_BUILTIN_GPIO for the number of onchip GPIO - definitions of __gpio_is_inverted() and __gpio_is_occupied(), they can be either macros or inlined functions Signed-off-by: Eric Miao <eric.miao@marvell.com>
* [ARM] pxa: introduce plat-pxa for PXA common code and add DMA supportEric Miao2009-03-231-0/+85
1. introduce folder of 'arch/arm/plat-pxa' for common code across different PXA processor families 2. initially moved DMA code into plat-pxa 3. common code in <mach/dma.h> moved into <plat/dma.h>, new processors should implement its own <mach/dma.h>, provide the following required definitions and '#include <plat/dma.h>' in the end: - DMAC_REGS_VIRT for mapped virtual address of the DMA registers' physical I/O memory Signed-off-by: Eric Miao <eric.miao@marvell.com>
generated by cgit v1.1 at 2024-12-24 05:09:54 +0000