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* ARM: PXA SoCs: irq_data conversion.Lennert Buytenhek2011-01-132-15/+17
| | | | Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
* Merge branch 'next-spi' of git://git.secretlab.ca/git/linux-2.6Linus Torvalds2011-01-072-187/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next-spi' of git://git.secretlab.ca/git/linux-2.6: (77 commits) spi/omap: Fix DMA API usage in OMAP MCSPI driver spi/imx: correct the test on platform_get_irq() return value spi/topcliff: Typo fix threhold to threshold spi/dw_spi Typo change diable to disable. spi/fsl_espi: change the read behaviour of the SPIRF spi/mpc52xx-psc-spi: move probe/remove to proper sections spi/dw_spi: add DMA support spi/dw_spi: change to EXPORT_SYMBOL_GPL for exported APIs spi/dw_spi: Fix too short timeout in spi polling loop spi/pl022: convert running variable spi/pl022: convert busy flag to a bool spi/pl022: pass the returned sglen to the DMA engine spi/pl022: map the buffers on the DMA engine spi/topcliff_pch: Fix data transfer issue spi/imx: remove autodetection spi/pxa2xx: pass of_node to spi device and set a parent device spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes. spi/pxa2xx: Add chipselect support for Sodaville spi/pxa2xx: Consider CE4100's FIFO depth spi/pxa2xx: Add CE4100 support ...
| * Merge branch 'spi' of git://git.linutronix.de/users/bigeasy/soda into spi/nextGrant Likely2010-12-292-187/+1
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'spi' of git://git.linutronix.de/users/bigeasy/soda into spi/next spi/pxa2xx: register driver properly spi/pxa2xx: add support for shared IRQ handler spi/pxa2xx: Use define for SSSR_TFL_MASK instead of plain numbers arm/pxa2xx: reorgazine SSP and SPI header files spi/pxa2xx: Add CE4100 support spi/pxa2xx: Consider CE4100's FIFO depth spi/pxa2xx: Add chipselect support for Sodaville spi/pxa2xx: Modify RX-Tresh instead of busy-loop for the remaining RX bytes. spi/pxa2xx: pass of_node to spi device and set a parent device
| | * arm/pxa2xx: reorgazine SSP and SPI header filesSebastian Andrzej Siewior2010-12-012-188/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The PXA-SPI driver relies on some files / defines which are arm specific and are within the ARM tree. The CE4100 SoC which is x86 has also the SPI core. This patch moves the ssp and spi files from arm/mach-pxa and plat-pxa to include/linux where the CE4100 can access them. This move got verified by building the following defconfigs: cm_x2xx_defconfig corgi_defconfig em_x270_defconfig ezx_defconfig imote2_defconfig pxa3xx_defconfig spitz_defconfig zeus_defconfig raumfeld_defconfig magician_defconfig Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
| | * spi/pxa2xx: Use define for SSSR_TFL_MASK instead of plain numbersSebastian Andrzej Siewior2010-12-011-1/+2
| | | | | | | | | | | | | | | Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
* | | ARM: pxa: support pxa95xHaojian Zhuang2010-12-182-2/+3
|/ / | | | | | | | | | | | | | | The core of PXA955 is PJ4. Add new PJ4 support. And add new macro CONFIG_PXA95x. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* | mmc: sdhci: 8-bit bus width changesPhilip Rakity2010-11-221-0/+3
|/ | | | | | | | | | | | | | | | | | | | | | We now: * check for a v3 controller before setting 8-bit bus width * offer a callback for platform code to switch to 8-bit mode, which allows non-v3 controllers to support it * rely on mmc->caps |= MMC_CAP_8_BIT_DATA; in platform code to specify that the board designers have indeed brought out all the pins for 8-bit to the slot. We were previously relying only on whether the *controller* supported 8-bit, which doesn't tell us anything about the pin configuration in the board design. This fixes the MMC card regression reported by Maxim Levitsky here: http://thread.gmane.org/gmane.linux.kernel.mmc/4336 by no longer assuming that 8-bit works by default. Signed-off-by: Philip Rakity <prakity@marvell.com> Tested-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* Merge git://git.infradead.org/mtd-2.6Linus Torvalds2010-10-301-9/+9
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * git://git.infradead.org/mtd-2.6: (82 commits) mtd: fix build error in m25p80.c mtd: Remove redundant mutex from mtd_blkdevs.c MTD: Fix wrong check register_blkdev return value Revert "mtd: cleanup Kconfig dependencies" mtd: cfi_cmdset_0002: make sector erase command variable mtd: cfi_cmdset_0002: add CFI detection for SST 38VF640x chips mtd: cfi_util: add support for switching SST 39VF640xB chips into QRY mode mtd: cfi_cmdset_0001: use defined value of P_ID_INTEL_PERFORMANCE instead of hardcoded one block2mtd: dubious assignment P4080/mtd: Fix the freescale lbc issue with 36bit mode P4080/eLBC: Make Freescale elbc interrupt common to elbc devices mtd: phram: use KBUILD_MODNAME mtd: OneNAND: S5PC110: Fix double call suspend & resume function mtd: nand: fix MTD_MODE_RAW writes jffs2: use kmemdup mtd: sm_ftl: cosmetic, use bool when possible mtd: r852: remove useless pci powerup/down from suspend/resume routines mtd: blktrans: fix a race vs kthread_stop mtd: blktrans: kill BKL mtd: allow to unload the mtdtrans module if its block devices aren't open ... Fix up trivial whitespace-introduced conflict in drivers/mtd/mtdchar.c
| * Merge branch 'master' of ↵David Woodhouse2010-10-301-0/+69
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git Conflicts: drivers/mtd/mtd_blkdevs.c Merge Grant's device-tree bits so that we can apply the subsequent fixes. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
| * | mtd: pxa3xx_nand: condense the flash definitionLei Wen2010-10-241-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adding a new flash definition would need less code. Keep the platform passing flash definition method. If one flash is both defined in platform data and builtin table, driver would select the one from platform data first. By this way, platform could select the timing most suit for itself, not need to follow the common settings. Signed-off-by: Lei Wen <leiwen@marvell.com> Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Acked-by: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
* | | mmc: add new sdhci-pxa driver for Marvell SoCsZhangfei Gao2010-10-251-0/+32
| |/ |/| | | | | | | | | | | | | Support Marvell PXA168/PXA910/MMP2 SD Host Controller. Signed-off-by: Zhangfei Gao <zhangfei.gao@marvell.com> Acked-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Chris Ball <cjb@laptop.org>
* | ARM: pxa27x_keypad: added wakeup event handler for keypad interruptsMark F. Brown2010-10-091-0/+10
| | | | | | | | | | | | | | mach-mmp needs to clear wake event in order to clear the keypad interrupt Signed-off-by: Mark F. Brown <mark.brown314@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* | ARM: pxa: moved pxa27x_keypad.h to platform pxa directoryMark F. Brown2010-10-091-0/+59
|/ | | | | | | | mach-mmp utilizes pxa27x_keypad code so we need to move header to platform pxa directory. Signed-off-by: Mark F. Brown <mark.brown314@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* ARM: pxa: Make id const in pwm_probe()Uwe Kleine-König2010-08-301-1/+1
| | | | | | | | | | This fixes the compiler warning: arch/arm/plat-pxa/pwm.c: In function 'pwm_probe': arch/arm/plat-pxa/pwm.c:179: warning: initialization discards qualifiers from pointer target type Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: move pmu device back into mach-pxa/Eric Miao2010-08-052-34/+0
| | | | | | | | | Not tested and enabled on MMP at this moment, and since the IRQ is different from mach-pxa, I'd prefer to move the PMU device back into mach-pxa/. Will introduce the PMU device to MMP once it's enabled and tested. Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] mmp: fix build failure due to IRQ_PMU depends on ARCH_PXAJonathan Cameron2010-06-141-1/+2
| | | | | | | | | PMU is not tested and enabled on MMP architecture at this moment, the device IRQ number, IRQ_PMU depends on ARCH_PXA. Build PMU only for ARCH_PXA. Signed-off-by: Jonathan Cameron <jic23@cam.ac.uk> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* Merge branch 'devel-stable' into develRussell King2010-05-178-1/+427
|\ | | | | | | | | | | | | Conflicts: arch/arm/Kconfig arch/arm/include/asm/system.h arch/arm/mm/Kconfig
| * [ARM] pxa: add namespace on sspHaojian Zhuang2010-05-112-17/+17
| | | | | | | | | | | | | | | | In order to prevent code ambiguous, add namespace on functions in ssp driver. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| * [ARM] mmp: update mfp settingHaojian Zhuang2010-05-111-0/+7
| | | | | | | | | | | | | | Update mfp setting for mmp2. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| * [ARM] pxa: allow MFP_LPM_INPUT to be explicitly specifiedEric Miao2010-05-111-0/+1
| | | | | | | | Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| * [ARM] pxa: use resource_size() in ssp.cJulia Lawall2010-05-111-4/+4
| | | | | | | | | | Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| * [ARM] pxa: avoid NULL dereferencing in error handling of ssp.cJulia Lawall2010-05-111-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The assignments of res to the results of the two calls to platform_get_resource make it impossible to use res in the error handling code in the arguments to release_mem_region. The semantic match that finds the former problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @r exists@ expression E, E1; identifier f; statement S1,S3; iterator iter; @@ if ((E == NULL && ...) || ...) { ... when != false ((E == NULL && ...) || ...) when != true ((E != NULL && ...) || ...) when != iter(E,...) S1 when != E = E1 ( sizeof(E->f) | * E->f ) ... when any return ...; } else S3 // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| * [ARM] mmp: support ssp in pxa168Haojian Zhuang2010-05-112-0/+2
| | | | | | | | | | | | | | Support ssp devices in PXA168. PXA168 could reuse the code of PXA SSP. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| * [ARM] pxa: simplify ifdef in ssp.hHaojian Zhuang2010-05-111-26/+15
| | | | | | | | | | | | | | | | | | Try to keep minimum ifdef in ssp.h. Some of the definitions are valid only to specific SoCs, and device drivers should be responsible to take care of these difference. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| * [ARM] pxa: move ssp into common plat-pxaHaojian Zhuang2010-05-114-0/+425
| | | | | | | | | | | | Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
| * arch/arm/plat-pxa/dma.c: correct NULL testJulia Lawall2010-05-011-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Test the just-allocated value for NULL rather than some other value. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression x,y; statement S; @@ x = \(kmalloc\|kcalloc\|kzalloc\)(...); ( if ((x) == NULL) S | if ( - y + x == NULL) S ) // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Cc: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| * include cleanup: Update gfp.h and slab.h includes to prepare for breaking ↵Tejun Heo2010-03-302-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
* | ARM: 6049/1: ARM: pxa: register PMU IRQs during board initialisationWill Deacon2010-04-292-1/+34
|/ | | | | | | | | This patch adds an initcall for the pxa platforms so that they register their PMU IRQs with the PMU framework in the Kernel. Cc: Eric Miao <eric.y.miao@gmail.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* [ARM] pxa: use resource_size() in pwm.cH Hartley Sweeten2009-12-291-4/+4
| | | | | | | Use resource_size for {request/release}_mem_region and ioremap. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* pxa3xx_nand: move pxa3xx_nand.h common into plat directoryHaojian Zhuang2009-12-011-0/+63
| | | | | | | | | Since the same nand controller is shared between ARCH_PXA and ARCH_MMP. Move the pxa3xx_nand.h from mach directory to plat directoy. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Cc: David Woodhouse <david.woodhouse@intel.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: ensure mfp is in correct range in mfp_{read,write}Roel Kluin2009-11-171-2/+2
| | | | | | | Ensure we do not read/write outside array boundaries with a negative index. Signed-off-by: Roel Kluin <roel.kluin@gmail.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: fix incorrect mfp_to_gpio() conversionEric Miao2009-11-131-1/+1
| | | | | | | Since MFP_PIN_GPIO* now includes 128-255, mfp_to_gpio() is no longer valid for those additional pins, fix it. Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa/dma: add debugfs entriesRobert Jarzmik2009-09-101-1/+248
| | | | | | | | | | | | | Add some debug information for PXA DMA : - descriptors queued - channels state - global state -- Since V1: reverted to old register access (no more dma_readl() or dma_writel()). Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa/dma: optimize irq handler loopRobert Jarzmik2009-09-101-14/+15
| | | | | | | | | | | Reduce loop for dma irq handler callbacks to the minimum required. Since V1: included suggestion from Nicolas Pitre to improve even further the loop. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa/dma: cosmetic move of EXPORT_SYMBOL under their functionsRobert Jarzmik2009-09-101-3/+2
| | | | | Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: support mfp of pxa935Haojian Zhuang2009-09-101-0/+68
| | | | | | | Add and initialize the mfp setting of pxa935 chip. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: add MFP_PULL_FLOATDaniel Mack2009-09-102-2/+6
| | | | | | | | | | | There is currently an uncovered case for MFP configuration on PXAs which is selected by setting the PULL_SEL bit but none of the PULL{UP,DOWN}_EN bits. This case is needed to explicitly let pins float, even if the selected alternate function would default to a configuration with a pull resistor enabled. Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: use kzalloc() in pxa_init_gpio_chip()Daniel Mack2009-07-031-7/+2
| | | | | | | | | | | | | | | | | | | | | | | As slab is available early now, use kzalloc() rather than alloc_bootmem_low() in pxa_init_gpio_chip(). This removes the following boot time warning: <4>------------[ cut here ]------------ <4>WARNING: at mm/bootmem.c:535 alloc_arch_preferred_bootmem+0x2c/0x54() <d>Modules linked in: [<c0029430>] (unwind_backtrace+0x0/0xdc) from [<c0036f64>] (warn_slowpath_common+0x4c/0x80) [<c0036f64>] (warn_slowpath_common+0x4c/0x80) from [<c000ede0>] (alloc_arch_preferred_bootmem+0x2c/0x54) [<c000ede0>] (alloc_arch_preferred_bootmem+0x2c/0x54) from [<c000f2e4>] (___alloc_bootmem_nopanic+0x34/0xd0) [<c000f2e4>] (___alloc_bootmem_nopanic+0x34/0xd0) from [<c000f6e4>] (___alloc_bootmem+0xc/0x34) [<c000f6e4>] (___alloc_bootmem+0xc/0x34) from [<c000cb20>] (pxa_init_gpio+0x48/0x228) [<c000cb20>] (pxa_init_gpio+0x48/0x228) from [<c0009794>] (init_IRQ+0x34/0x44) [<c0009794>] (init_IRQ+0x34/0x44) from [<c00089d4>] (start_kernel+0x144/0x264) [<c00089d4>] (start_kernel+0x144/0x264) from [<a0008034>] (0xa0008034) <4>---[ end trace 1b75b31a2719ed1c ]--- Signed-off-by: Daniel Mack <daniel@caiaq.de> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
* [ARM] pxa: add PWM devices support for pxa168/910Eric Miao2009-06-051-0/+2
| | | | | Signed-off-by: Mingwei Wang <mingwei.wang@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
* [ARM] pxa: move pwm.c to common plat-pxa directoryEric Miao2009-06-052-0/+303
| | | | Signed-off-by: Eric Miao <eric.miao@marvell.com>
* [ARM] pxa: move mach/i2c.h to plat/i2c.hEric Miao2009-06-051-0/+82
| | | | | Signed-off-by: Paul Shen <paul.shen@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
* [ARM] pxa: fix issue of muxed GPIO irq_chip functions touching non-muxed GPIOsEric Miao2009-04-271-4/+19
| | | | | | | | | | pxa_gpio_irq_type() and pxa_unmask_muxed_gpio() will touch non-muxed GPIOs (0 and 1 on PXA2xx/PXA3xx) bits in GRERx and GFERx, which is incorrect. Actually, only those bits should get updated if the corresponding bits are set in c->irq_mask as well. Fix this by updating only those relevant bits. Reported-and-tested-by: Daniel Ribeiro <drwyrm@gmail.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
* [ARM] pxa: build arch/arm/plat-pxa/mfp.c only when PXA3xx or ARCH_MMP definedEric Miao2009-03-261-1/+3
| | | | | | | | | arch/arm/plat-pxa/mfp.c is not intended to be use by PXA25x/PXA27x, make it explicit here only for use by PXA3xx or ARCH_MMP. Reported-by: Guennadi Liakhovestski <g.liakhovestski@gmx.de> Reported-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Eric Miao <eric.miao@marvell.com>
* [ARM] pxa: add base support for Marvell PXA910Eric Miao2009-03-231-0/+30
| | | | | Signed-off-by: Bin Yang <bin.yang@marvell.com> Signed-off-by: Eric Miao <eric.miao@marvell.com>
* [ARM] pxa: move common MFP handling code into plat-pxaEric Miao2009-03-233-1/+648
| | | | Signed-off-by: Eric Miao <eric.miao@marvell.com>
* [ARM] pxa: move common GPIO handling code into plat-pxaEric Miao2009-03-233-0/+400
| | | | | | | | | | | | | | | | | | | | | | 1. add common GPIO handling code into [arch/arm/plat-pxa] 2. common code in <mach/gpio.h> moved into <plat/gpio.h>, new processors should implement its own <mach/gpio.h>, provide the following required definitions and '#include <plat/gpio.h>' in the end: - GPIO_REGS_VIRT for mapped virtual address of the GPIO registers' physical I/O memory - macros of GPLR(), GPSR(), GPDR() for constant optimization for functions gpio_{set,get}_value() (so that bit-bang code can still have tolerable performance) - NR_BUILTIN_GPIO for the number of onchip GPIO - definitions of __gpio_is_inverted() and __gpio_is_occupied(), they can be either macros or inlined functions Signed-off-by: Eric Miao <eric.miao@marvell.com>
* [ARM] pxa: introduce plat-pxa for PXA common code and add DMA supportEric Miao2009-03-234-0/+238
1. introduce folder of 'arch/arm/plat-pxa' for common code across different PXA processor families 2. initially moved DMA code into plat-pxa 3. common code in <mach/dma.h> moved into <plat/dma.h>, new processors should implement its own <mach/dma.h>, provide the following required definitions and '#include <plat/dma.h>' in the end: - DMAC_REGS_VIRT for mapped virtual address of the DMA registers' physical I/O memory Signed-off-by: Eric Miao <eric.miao@marvell.com>
generated by cgit v1.1 at 2024-12-27 18:12:53 +0000