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Diffstat (limited to 'arch/arm/mach-omap2/id.c')
-rw-r--r--arch/arm/mach-omap2/id.c66
1 files changed, 63 insertions, 3 deletions
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index 2537090..a90630d 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -32,6 +32,7 @@ static struct omap_chip_id omap_chip;
static unsigned int omap_revision;
u32 omap3_features;
+u32 omap4_features;
unsigned int omap_rev(void)
{
@@ -88,6 +89,8 @@ EXPORT_SYMBOL(omap_type);
#define OMAP_TAP_DIE_ID_44XX_1 0x0208
#define OMAP_TAP_DIE_ID_44XX_2 0x020c
#define OMAP_TAP_DIE_ID_44XX_3 0x0210
+#define OMAP_TAP_PROD_ID_44XX_0 0x0214
+#define OMAP_TAP_PROD_ID_44XX_1 0x0218
#define read_tap_reg(reg) __raw_readl(tap_base + (reg))
@@ -126,6 +129,16 @@ void omap_get_die_id(struct omap_die_id *odi)
odi->id_3 = read_tap_reg(OMAP_TAP_DIE_ID_3);
}
+void omap_get_production_id(struct omap_die_id *odi)
+{
+ if (cpu_is_omap44xx()) {
+ odi->id_0 = read_tap_reg(OMAP_TAP_PROD_ID_44XX_0);
+ odi->id_1 = read_tap_reg(OMAP_TAP_PROD_ID_44XX_1);
+ odi->id_2 = 0;
+ odi->id_3 = 0;
+ }
+}
+
static void __init omap24xx_check_revision(void)
{
int i, j;
@@ -212,6 +225,34 @@ static void __init omap3_check_features(void)
*/
}
+static void __init omap4_check_features(void)
+{
+ u32 si_type;
+
+ omap4_features = 0;
+
+ if (cpu_is_omap443x())
+ omap4_features |= OMAP4_HAS_MPU_1GHZ;
+
+
+ if (cpu_is_omap446x()) {
+ si_type =
+ read_tap_reg(OMAP4_CTRL_MODULE_CORE_STD_FUSE_PROD_ID_1);
+ switch ((si_type & (3 << 16)) >> 16) {
+ case 2:
+ /* High performance device */
+ omap4_features |= OMAP4_HAS_MPU_1_5GHZ;
+ omap4_features |= OMAP4_HAS_MPU_1_2GHZ;
+ break;
+ case 1:
+ default:
+ /* Standard device */
+ omap4_features |= OMAP4_HAS_MPU_1_2GHZ;
+ break;
+ }
+ }
+}
+
static void __init ti816x_check_features(void)
{
omap3_features = OMAP3_HAS_NEON;
@@ -331,8 +372,13 @@ static void __init omap3_check_revision(void)
static void __init omap4_check_revision(void)
{
u32 idcode;
- u16 hawkeye;
u8 rev;
+ /*
+ * NOTE: OMAP4460+ uses ramp system for identification and hawkeye
+ * variable is reused for the same. Since the values are unique
+ * we continue to use the current system
+ */
+ u16 hawkeye;
/*
* The IC rev detection is done with hawkeye and rev.
@@ -344,10 +390,10 @@ static void __init omap4_check_revision(void)
rev = (idcode >> 28) & 0xf;
/*
- * Few initial ES2.0 samples IDCODE is same as ES1.0
+ * Few initial 4430 ES2.0 samples IDCODE is same as ES1.0
* Use ARM register to detect the correct ES version
*/
- if (!rev) {
+ if (!rev && (hawkeye != 0xb94e)) {
idcode = read_cpuid(CPUID_ID);
rev = (idcode & 0xf) - 1;
}
@@ -377,6 +423,19 @@ static void __init omap4_check_revision(void)
omap_chip.oc |= CHIP_IS_OMAP4430ES2_2;
}
break;
+ case 0xb94e:
+ switch (rev) {
+ case 0:
+ omap_revision = OMAP4460_REV_ES1_0;
+ omap_chip.oc |= CHIP_IS_OMAP4460ES1_0;
+ break;
+ case 2:
+ default:
+ omap_revision = OMAP4460_REV_ES1_1;
+ omap_chip.oc |= CHIP_IS_OMAP4460ES1_1;
+ break;
+ }
+ break;
default:
/* Unknown default to latest silicon rev as default */
omap_revision = OMAP4430_REV_ES2_2;
@@ -518,6 +577,7 @@ void __init omap2_check_revision(void)
return;
} else if (cpu_is_omap44xx()) {
omap4_check_revision();
+ omap4_check_features();
return;
} else {
pr_err("OMAP revision unknown, please fix!\n");