diff options
Diffstat (limited to 'arch/arm/mach-omap2/omap_l3_noc.c')
| -rw-r--r-- | arch/arm/mach-omap2/omap_l3_noc.c | 52 |
1 files changed, 50 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c index 7b9f190..9d152de 100644 --- a/arch/arm/mach-omap2/omap_l3_noc.c +++ b/arch/arm/mach-omap2/omap_l3_noc.c @@ -29,6 +29,29 @@ #include "omap_l3_noc.h" +#define NUM_OF_L3_MASTERS ARRAY_SIZE(l3_masters) + +static void l3_dump_targ_context(u32 baseaddr) +{ + pr_err("COREREG : 0x%08x\n", readl(baseaddr + L3_COREREG)); + pr_err("VERSIONREG : 0x%08x\n", readl(baseaddr + L3_VERSIONREG)); + pr_err("MAINCTLREG : 0x%08x\n", readl(baseaddr + L3_MAINCTLREG)); + pr_err("NTTPADDR_0 : 0x%08x\n", readl(baseaddr + L3_NTTPADDR_0)); + pr_err("SVRTSTDLVL : 0x%08x\n", readl(baseaddr + L3_SVRTSTDLVL)); + pr_err("SVRTCUSTOMLVL: 0x%08x\n", readl(baseaddr + L3_SVRTCUSTOMLVL)); + pr_err("MAIN : 0x%08x\n", readl(baseaddr + L3_MAIN)); + pr_err("HDR : 0x%08x\n", readl(baseaddr + L3_HDR)); + pr_err("MSTADDR : 0x%08x\n", readl(baseaddr + L3_MSTADDR)); + pr_err("SLVADDR : 0x%08x\n", readl(baseaddr + L3_SLVADDR)); + pr_err("INFO : 0x%08x\n", readl(baseaddr + L3_INFO)); + pr_err("SLVOFSLSB : 0x%08x\n", readl(baseaddr + L3_SLVOFSLSB)); + pr_err("SLVOFSMSB : 0x%08x\n", readl(baseaddr + L3_SLVOFSMSB)); + pr_err("CUSTOMINFO_INFO : 0x%08x\n", readl(baseaddr + L3_CUSTOMINFO_INFO)); + pr_err("CUSTOMINFO_MSTADDR: 0x%08x\n", readl(baseaddr + L3_CUSTOMINFO_MSTADDR)); + pr_err("CUSTOMINFO_OPCODE : 0x%08x\n", readl(baseaddr + L3_CUSTOMINFO_OPCODE)); + pr_err("ADDRSPACESIZELOG : 0x%08x\n", readl(baseaddr + L3_ADDRSPACESIZELOG)); +} + /* * Interrupt Handler for L3 error detection. * 1) Identify the L3 clockdomain partition to which the error belongs to. @@ -56,10 +79,10 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) { struct omap4_l3 *l3 = _l3; - int inttype, i, j; + int inttype, i, j, k; int err_src = 0; u32 std_err_main_addr, std_err_main, err_reg; - u32 base, slave_addr, clear; + u32 base, slave_addr, clear, regoffset, masterid; char *source_name; /* Get the Type of interrupt */ @@ -88,11 +111,16 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) case STANDARD_ERROR: source_name = l3_targ_stderrlog_main_name[i][err_src]; + regoffset = targ_reg_offset[i][err_src]; slave_addr = std_err_main_addr + L3_SLAVE_ADDRESS_OFFSET; + WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n", source_name, readl(slave_addr)); + + l3_dump_targ_context(base + regoffset); + /* clear the std error log*/ clear = std_err_main | CLEAR_STDERR_LOG; writel(clear, std_err_main_addr); @@ -101,9 +129,29 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3) case CUSTOM_ERROR: source_name = l3_targ_stderrlog_main_name[i][err_src]; + regoffset = targ_reg_offset[i][err_src]; WARN(true, "CUSTOM SRESP error with SOURCE:%s\n", source_name); + + masterid = readl(base + regoffset + + L3_CUSTOMINFO_MSTADDR); + + for (k = 0; + k < NUM_OF_L3_MASTERS; + k++) { + if (masterid == l3_masters[k].id) { + pr_err("Master 0x%x %10s\n", + masterid, + l3_masters[k].name); + pr_err("%s OPCODE 0x%08x\n", + source_name, + readl(base + regoffset + + L3_CUSTOMINFO_OPCODE)); + break; + } + } + /* clear the std error log*/ clear = std_err_main | CLEAR_STDERR_LOG; writel(clear, std_err_main_addr); |