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* Revert "OMAP4470 LPDDR interface configuration update for 466MHz"Volodymyr Mieshkov2014-10-011-1/+1
| | | | | | | | This reverts commit 60dbf389a4408580f9200918a60d96a6eebf3919. The patch is moved to the xloader. Change-Id: I9bab396d290c339ef148a63bc33b04588e6f54e3 Signed-off-by: Volodymyr Mieshkov <volodymyr.mieshkov@ti.com>
* OMAP4470 LPDDR interface configuration update for 466MHzVolodymyr Mieshkov2014-10-011-1/+1
| | | | | | | | | | | | | | | | | | | Some instability with OMAP4470 when running the DDR at 466MHz is discovered. This instability is resolved with updated LPDDR settings: - DLL delay should be set to 461ps: DDR_PHY_CTRL_1_SHDW[11:4] = 0x37 - Read latency should be set to 0xB: DDR_PHY_CTRL_1_SHDW[3:0] = 0xB - Slew Rate should be set to “FASTEST” and Impedance Control to “Drv12”: CONTROL_LPDDR2IOx_2[LPDDR2IO1_GR10_SR] = 0 CONTROL_LPDDR2IOx_2[LPDDR2IO1_GR10_I] = 7 where x=[1-2] Change-Id: Ifa47a7ccae437225db5838039e528c04250a911d Signed-off-by: Volodymyr Mieshkov <volodymyr.mieshkov@ti.com>
* ARM: omap4: emif: use device level self refresh timingDan Murphy2014-10-011-4/+5
| | | | | | | | | | | | Use a single self refresh time param for the entire device. Increase selfrefresh time to 262144 cycles from 2048. Change-Id: Ie6ab6c36a19418cde3a22c7a2ddbe0db1986af02 Signed-off-by: Dan Murphy <dmurphy@ti.com> Conflicts: arch/arm/mach-omap2/lpddr2_elpida_data.c
* OMAP4470: Memory timings fix for LPDDR2 466 MHzMykola Oleksiienko2014-10-011-2/+2
| | | | | | | | Fixed memory timings for LPDDR2 466MHz according to hardware recommendations. Change-Id: I07e821c8fafc1b559b61a443083fc9c1acddc87a Signed-off-by: Mykola Oleksiienko <x0174904@ti.com>
* OMAP4: EMIF: Add 4Gb memory Configuration dataTaras Kondratiuk2014-10-011-0/+14
| | | | | | | | | Elpida EDB8164B3PF is going to be used on OMAP boards. Unlike the previous memory this one has two pieces of 4Gb, so a new configuration stucture should be added. Change-Id: I98cf8fd2689c21ef7b076aceaf4ed6f7a1b6b0b1 Signed-off-by: Taras Kondratiuk <taras@ti.com>
* OMAP4: EMIF: Added timings for 466MHz elpida lpddr2 memoryVitaly Chernooky2014-10-011-1/+25
| | | | | | | | OMAP4470 support 466MHz DDR2 memory. This patch add timings from datasheet for EDB8164B3PF. Change-Id: Ief7520719a2d7ec3dc9c93a3ecbfcef7cf64507c Signed-off-by: Vitaly Chernooky <vitaly.chernooky@ti.com>
* OMAP4: EMIF: Add optimized timings for Elpida memoryAneesh V2011-06-291-0/+111
Add Elpida optimized timing. Elpida memory is used in TI development platforms and many others which depend on recommended peripheral sets. [girishsg@ti.com: Helped in fixing comments] Signed-off-by: Girish S G <girishsg@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
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