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* OMAP4: PM: restore the trim settings on OFFNishanth Menon2011-09-061-0/+2
| | | | | | | | S/w programmed trim overrides are lost in OFF mode. so reconfigure the trim settings. Change-Id: I03f1b5669b2b69992e08a71045acc307dd5def4d Signed-off-by: Nishanth Menon <nm@ti.com>
* OMAP4: PM: PMIC: register the LP timingNishanth Menon2011-09-061-2/+26
| | | | | | | | | | | Provide a mechanism for PMIC files to report their rampup and ramp down times from low power modes to OMAP's PM infrastructure. As part of this change provide initial values for TWL6030 and TPS6236x PMICs. Change-Id: Ica1911dd914cde251ed6f424a3f4dce28a11b504 Signed-off-by: Nishanth Menon <nm@ti.com>
* OMAP2+: PM: provide mechanism to describe overall behavior of osc and PMIC.Nishanth Menon2011-09-061-0/+14
| | | | | | | | | | | | | | | | We currently have mechanisms in place to describe the PMIC per rail, however we also need to configure the system for situations such as OFF mode, where, oscillator switch off and on time, and similar durations for PMIC also tends to play a major factor. Introduce a few apis to OMAP2's pm framework to use these. OMAP1 does'nt seem to need this at the moment, hence not a OMAP generic framework. The set functions are meant to be used by initialization code. The OMAP specific implementation would need to use this ofcourse. Change-Id: I374c638477ee5625a38a7ce49e755c2239e52cc8 Signed-off-by: Nishanth Menon <nm@ti.com>
* OMAP4: pm-debug: Add device OFF counterSantosh Shilimkar2011-08-291-0/+1
| | | | | | | | | | | | | This patch adds a debug-fs counter so that users can check the number of device-off transitions using pm debugfs $cat /proc/sys/debug/pm_debug/count ... DEVICE-OFF:5 ... Change-Id: I2f7ea13a02ae2e753aa257158739f0a7e46fa93d Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* OMAP4: PM: Add device-off supportSantosh Shilimkar2011-08-291-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds device off support to OMAP4 device type. Because of a ROMCODE bug on GP devices, GIC and WAKEUPGEN are not saved. Hence HLOS should save these on it's own, this patch saves registers for these blocks in the kernel. Restore is automated. Even with this workaround, the device off mode can't be fully supported on 443x GP devices(446x devices have the fix implemented). This patch adds OFF mode support for 443x GP devices in case this is fixed in future silicon revisions. OFF mode is disabled by default, however, there are two ways to enable OFF mode: a) In the board file, call omap_pm_enable_off_mode b) Enable OFF mode using the debugfs entry echo "1">/sys/kernel/debug/pm_debug/enable_off_mode (conversely echo '0' will disable it as well). Since, for achieving device OFF state, many of the power domains need to be in OSWR states, this state is tied with enabling CONFIG_OMAP_ALLOW_OSWR in the .config Change-Id: I8e0d7a797956c7fbb47bf7116f03e12c8f6e340e Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
* OMAP2+: PM: use off_mode_enabled as the global off mode flagNishanth Menon2011-08-291-2/+0
| | | | | | | | | pm-interface already provides off_mode_enabled which when exposed allows all platforms to depend on it instead of using PM_DEBUG controlled enable_off_mode variable Change-Id: I28795cf35ca59037ff0a2c788a12d20e9d3fa55f Signed-off-by: Nishanth Menon <nm@ti.com>
* ARM: omap4: Increase chip id size to 32 bitsColin Cross2011-08-161-7/+7
| | | | | | | | The new flag required for 4460 ES1.1 will pass the 16 bit size of omap_chip_id.oc. Change-Id: Ie2bd9a18224dd3872b902ca5743d2b2d50ab86b4 Signed-off-by: Colin Cross <ccross@android.com>
* OMAP2+: Ensure that PM inits are done before allowing DVFSNishanth Menon2011-07-291-0/+18
| | | | | | | | | | Ensure that PM initializations are all ready before we proceed. This allows drivers such as gfx, cpufreq which are ready earlier than pm to not not attempt to use the scaling infrastructure before it is ready. Signed-off-by: Nishanth Menon <nm@ti.com>
* OMAP4: PM: add option to save registers before suspend.Axel Haslam2011-07-231-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds 3 pm_debug options to save PRCM register values just before a low power suspend is attempted and view it afterwards. This is especially useful when JTAG is not available for debugging. New debugfs entries: pm_debug/saved_reg_addr: Physical start address pm_debug/saved_reg_num: Number of registers to save pm_debug/saved_reg_show: Dump the saved registers For example, to capture L4PER_CM2 before suspend: echo 0x4A009400 > /sys/kernel/debug/pm_debug/saved_reg_addr echo 50 > /sys/kernel/debug/pm_debug/saved_reg_num [SUSPEND & RESUME] cat /sys/kernel/debug/pm_debug/saved_reg_show This is enabled along with CONFIG_PM_ADVANCED_DEBUG. Acked-by: Todd Poynor <toddpoynor@google.com> Acked-by: Colin Cross <ccross@google.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Axel Haslam <axelhaslam@ti.com>
* OMAP4: PM: allow sleep to know if called inline of suspendAxel Haslam2011-07-231-1/+2
| | | | | | | | | | omap4_enter_sleep has no differentiation between idle and suspend at the moment. by introducing suspend differentiation, we can now selectively do operations in subsequent patches such as selective disable/enable of SmartReflex etc. Acked-by: Nishanth Menon <nm@ti.com> Signed-off-by: Axel Haslam <axelhaslam@ti.com>
* OMAP4: PM: remove hacks that were needed for serialNishanth Menon2011-07-141-1/+0
| | | | | | | Since runtime PM is active for serial, we dont need the hacks we added in PM layer for handling runtime PM. Signed-off-by: Nishanth Menon <nm@ti.com>
* OMAP2+: PMIC: fix build issues with pmic_updateNishanth Menon2011-07-061-1/+1
| | | | | | | | | | | | | | Fixes two things: a) ability to build with TPS disabled - fails with: arch/arm/mach-omap2/pm.h fails at inline defn, "nt" instead of "int" b) build warning: arch/arm/mach-omap2/omap_pmic.c: In function 'omap_pmic_update': arch/arm/mach-omap2/omap_pmic.c:84:4: warning: too many arguments for format arch/arm/mach-omap2/omap_pmic.c:97:1: warning: control reaches end of non-void function Reported-by: Colin Cross <ccross@google.com> Acked-by: Colin Cross <ccross@google.com> Signed-off-by: Nishanth Menon <nm@ti.com>
* OMAP2+: PMIC: add ability to modify the mapNishanth Menon2011-06-291-0/+15
| | | | | | | | This allows temporary maps to be setup and updated. This allows platforms to modify the pre-existing default maps as needed. Acked-by: Colin Cross <ccross@google.com> Signed-off-by: Nishanth Menon <nm@ti.com>
*-. Merge branches 'omap-pm/devel/hotplug', 'omap-pm/devel/dvfs' and ↵Nishanth Menon2011-06-131-4/+48
|\ \ | | | | | | | | | | | | | | | | | | | | | 'omap-pm/devel/cpuidle' into omap-pm-integration Conflicts: arch/arm/mach-omap2/Kconfig arch/arm/mach-omap2/powerdomains3xxx_data.c
| | * omap4: enable cpuidle support for CORE RET.Avinash.H.M2011-06-131-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the cpuidle initialization routines for omap4. Define the C states and attempt CORE RET. The low level code is shared between suspend resume and cpuidle. Signed-off-by: Avinash.H.M <avinashhm@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com>
| | * OMAP4: PM: Add suppport for IO wakeupRajendra Nayak2011-06-131-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for IO wakeup infrasturcture [Todd: avoided multiple pwrdms_setup] Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Todd Poynor <toddpoynor@google.com>
| | * OMAP4: cpuidle: Basic CPUidle supportRajendra Nayak2011-06-131-0/+1
| |/ |/| | | | | | | | | | | | | | | | | | | The patch adds a basic CPUidle driver for OMAP4. Just one C state is registered for CPU0 which does a WFI. CPU1 is left with defualt idle and the low power state for it is managed via cpu-hotplug. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: Kevin Hilman <khilman@ti.com>
| * OMAP2+ PM: Add support for TPS62361Vishwanath BS2011-06-131-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | TPS62361 is a new PMIC used with OMAP4460 on SDP4430 platform to supply MPU VDD. Rest of the VDDs continue to be supplied via TWL6030. As part of this, the following have been moved to common location in voltage.h OMAP4_VP_CONFIG_ERROROFFSET, OMAP4_VP_VSTEPMIN_VSTEPMIN, OMAP4_VP_VSTEPMAX_VSTEPMAX, OMAP4_VP_VLIMITTO_TIMEOUT_US [nm@ti.com: cleaned up TPS to handle board variations] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com>
| * OMAP3+: PM: introduce a central pmic controlNishanth Menon2011-06-131-6/+29
|/ | | | | | | | | | | | | | | | | Since we are starting to use multiple PMICs in various combinations, use the existing .omap_chip = OMAP_CHIP_INIT() to mark the structures we are interested in using per OMAP device we are currently running on. This mapping is based on the default device recommendations from TI. Boards using custom PMICs now have an opportunity to register their own custom mapping. With this we no longer need omap4_twl_init and omap3_twl_int instead we introduce a registration mechanism which is PMIC generic and move twl implementation to use the same. This allows for future OMAP4460 support where there is a mixture of PMIC combinations used. Signed-off-by: Nishanth Menon <nm@ti.com>
* OMAP3: cpuidle: change the power domains modes determination logicJean Pihet2011-05-201-4/+0
| | | | | | | | | | | | | | The achievable power modes of the power domains in cpuidle depends on the system wide 'enable_off_mode' knob in debugfs. Upon changing enable_off_mode, do not change the C-states 'valid' field but instead dynamically restrict the power modes when entering idle. The C-states 'valid' field is just used to enable/disable some C-states at init and shall not be changed later on. Signed-off-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* OMAP3: clean-up mach specific cpuidle data structuresJean Pihet2011-05-201-4/+9
| | | | | | | | | | | | - sleep_latency and wake_latency are not used, replace them by exit_latency which is used by cpuidle. exit_latency simply is the sum of sleep_latency and wake_latency, - replace threshold by target_residency, - changed the OMAP3 specific cpuidle code accordingly, - changed the OMAP3 board code accordingly. Signed-off-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
* Merge branch 'omap-for-linus' of ↵Linus Torvalds2011-03-171-0/+1
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6 * 'omap-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6: (258 commits) omap: zoom: host should not pull up wl1271's irq line arm: plat-omap: iommu: fix request_mem_region() error path OMAP2+: Common CPU DIE ID reading code reads wrong registers for OMAP4430 omap4: mux: Remove duplicate mux modes omap: iovmm: don't check 'da' to set IOVMF_DA_FIXED flag omap: iovmm: disallow mapping NULL address when IOVMF_DA_ANON is set omap2+: mux: Fix compile when CONFIG_OMAP_MUX is not selected omap4: board-omap4panda: Initialise the serial pads omap3: board-3430sdp: Initialise the serial pads omap4: board-4430sdp: Initialise the serial pads omap2+: mux: Add macro for configuring static with omap_hwmod_mux_init omap2+: mux: Remove the use of IDLE flag omap2+: Add separate list for dynamic pads to mux perf: add OMAP support for the new power events OMAP4: Add IVA OPP enteries. OMAP4: Update Voltage Rail Values for MPU, IVA and CORE OMAP4: Enable 800 MHz and 1 GHz MPU-OPP OMAP3+: OPP: Replace voltage values with Macros OMAP3: wdtimer: Fix CORE idle transition Watchdog: omap_wdt: add fine grain runtime-pm ... Fix up various conflicts in - arch/arm/mach-omap2/board-omap3evm.c - arch/arm/mach-omap2/clock3xxx_data.c - arch/arm/mach-omap2/usb-musb.c - arch/arm/plat-omap/include/plat/usb.h - drivers/usb/musb/musb_core.h
| * OMAP3: PM: Set/clear T2 bit for Smartreflex on TWLThara Gopinath2011-03-091-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Voltage control on TWL can be done using VMODE/I2C1/I2C_SR. Since almost all platforms use I2C_SR on omap3, omap3_twl_init by default expects that OMAP's I2C_SR is plugged in to TWL's I2C and calls omap3_twl_set_sr_bit. On platforms where I2C_SR is not connected, the board files are expected to call omap3_twl_set_sr_bit(false) to ensure that I2C_SR path is not set for voltage control and prevent the default behavior of omap3_twl_init. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Shweta Gulati <shweta.gulati@ti.com> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Kevin Hilman <khilman@ti.com>
* | ARM: 6649/1: omap: use fncpy to copy the PM code functions to SRAMJean Pihet2011-02-041-1/+1
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | The new fncpy API is better suited* for copying some code to SRAM at runtime. This patch changes the ad-hoc code to the more generic fncpy API. *: 1. fncpy ensures that the thumb mode bit is propagated, 2. fncpy provides the security of type safety between the original function and the sram function pointer. Tested OK on OMAP3 in low power modes (RET/OFF) using omap2plus_defconfig with !CONFIG_THUMB2_KERNEL. Compile tested on OMAP1/2 using omap1_defconfig. Boot tested on OMAP1 & OMAP2 Tested OK with suspend/resume on OMAP2420/n810 Boots fine on osk5912 and n800 Signed-off-by: Jean Pihet <j-pihet@ti.com> Acked-by: Kevin Hilman <khilman@ti.com> Acked-by: Tony Lindgren <tony@atomide.com> Reviewed-by: Dave Martin <dave.martin@linaro.org> Tested-by: Kevin Hilman <khilman@ti.com> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
* OMAP4: Register voltage PMIC parameters with the voltage layerThara Gopinath2010-12-221-0/+5
| | | | | | | | | | | | TWL6030 is the power IC used along with OMAP4 in OMAP4 SDPs, blaze boards and panda boards. This patch registers the OMAP4 PMIC specific information with the voltage layer. This also involves implementing a different formula for voltage to vsel and vsel to voltage calculations from TWL4030. Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: Register TWL4030 pmic info with the voltage driver.Thara Gopinath2010-12-221-0/+9
| | | | | | | | | | | | | This patch registers the TWL4030 PMIC specific informtion with the voltage driver. Failing this patch the voltage driver is unware of the formula to use for vsel to voltage and vice versa conversion and lot of other PMIC dependent parameters. This file is based on the arch/arm/plat-omap opp_twl_tpl.c file by Paul Walmsley. The original file is replaced by this file. Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: Adding smartreflex device file.Thara Gopinath2010-12-221-0/+14
| | | | | | | | | | | | | | | This patch adds support for device registration of various smartreflex module present in the system. This patch introduces the platform data for smartreflex devices which include the efused n-target vaules, a parameter to indicate whether smartreflex autocompensation needs to be enabled on init or not. An API omap_enable_smartreflex_on_init is provided for the board files to enable smartreflex autocompensation during system boot up. Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP2+: powerdomain: move header file from plat-omap to mach-omap2Paul Walmsley2010-12-211-1/+1
| | | | | | | | | | | | | | | | | | | | The OMAP powerdomain code and data is all OMAP2+-specific. This seems unlikely to change any time soon. Move plat-omap/include/plat/powerdomain.h to mach-omap2/powerdomain.h. The primary point of doing this is to remove the temptation for unrelated upper-layer code to access powerdomain code and data directly. As part of this process, remove the references to powerdomain data from the GPIO "driver" and the OMAP PM no-op layer, both in plat-omap. Change the DSPBridge code to point to the new location for the powerdomain headers. The DSPBridge code should not be including the powerdomain headers; these should be removed. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Omar Ramirez Luna <omar.ramirez@ti.com> Cc: Felipe Contreras <felipe.contreras@gmail.com> Cc: Greg Kroah-Hartman <greg@kroah.com>
* Merge branch 'pm-opp' of ↵Tony Lindgren2010-12-211-0/+14
|\ | | | | | | ssh://master.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap-pm into omap-for-linus
| * omap4: opp: add OPP table dataNishanth Menon2010-12-211-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds OPP tables for OMAP4. New file has been added to keep the OMAP4 opp tables and the registration of these tables with the generic opp framework by OMAP SoC OPP interface. Based on: http://dev.omapzoom.org/?p=santosh/kernel-omap4-base.git;a=blob;f=arch/arm/mach-omap2/opp44xx_data.c;h=252e3d0cb6050a64f390b9311c1c4977d74f762a;hb=refs/heads/omap4_next Signed-off-by: Thara Gopinath <thara@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
| * omap: opp: add OMAP3 OPP table data and common initNishanth Menon2010-12-211-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | Add OPP data for OMAP34xx and OMAP36xx and initialization functions to populate OPP tables based on current SoC. introduce an OMAP generic opp initialization routine which OMAP3 and OMAP4+ SoCs can use to register their OPP definitions. Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | OMAP3: remove unused code from the ASM sleep codeJean Pihet2010-12-211-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove unused code: - macros, - variables, - unused semaphore locking API. This API shall be added back when needed, - infinite loops for debug. Tested on N900 and Beagleboard with full RET and OFF modes, using cpuidle and suspend. Signed-off-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Tested-by: Nishanth Menon<nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | OMAP3630: PM: Erratum i583: disable coreoff if < ES1.2Eduardo Valentin2010-12-211-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Limitation i583: Self_Refresh Exit issue after OFF mode Issue: When device is waking up from OFF mode, then SDRC state machine sends inappropriate sequence violating JEDEC standards. Impact: OMAP3630 < ES1.2 is impacted as follows depending on the platform: CS0: for 38.4MHz as internal sysclk, DDR content seen to be stable, while for all other sysclk frequencies, varied levels of instability seen based on varied parameters. CS1: impacted This patch takes option #3 as recommended by the Silicon erratum: Avoid core power domain transitioning to OFF mode. Power consumption impact is expected in this case. To do this, we route core OFF requests to RET request on the impacted revisions of silicon. Acked-by: Jean Pihet <j-pihet@ti.com> [nm@ti.com: rebased the code to 2.6.37-rc2- short circuit code changed a bit] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Eduardo Valentin <eduardo.valentin@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | OMAP3: PM: make omap3_cpuidle_update_states independent of enable_off_modeNishanth Menon2010-12-211-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently omap3_cpuidle_update_states makes whole sale decision on which C states to update based on enable_off_mode variable Instead, achieve the same functionality by independently providing mpu and core deepest states the system is allowed to achieve and update the idle states accordingly. Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Jean Pihet <j-pihet@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> [khilman: fixed additional user of this API in OMAP CPUidle driver] Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | OMAP3630: PM: Disable L2 cache while invalidating L2 cachePeter 'p2' De Schrijver2010-12-211-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While coming out of MPU OSWR/OFF states, L2 controller is reseted. The reset behavior is implementation specific as per ARMv7 TRM and hence $L2 needs to be invalidated before it's use. Since the AUXCTRL register is also reconfigured, disable L2 cache before invalidating it and re-enables it afterwards. This is as per Cortex-A8 ARM documentation. Currently this is identified as being needed on OMAP3630 as the disable/enable is done from "public side" while, on OMAP3430, this is done in the "secure side". Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [nm@ti.com: ported to 2.6.37-rc2, added hooks to enable the logic only on 3630] Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Eduardo Valentin <eduardo.valentin@nokia.com> Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | OMAP3630: PM: Erratum i608: disable RTANishanth Menon2010-12-211-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Erratum id: i608 RTA (Retention Till Access) feature is not supported and leads to device stability issues when enabled. This impacts modules with embedded memories on OMAP3630 Workaround is to disable RTA on boot and coming out of core off. For disabling RTA coming out of off mode, we do this by overriding the restore pointer for 3630 as the first point of entry before caches are touched and is common for GP and HS devices. To disable earlier than this could be possible by modifying the PPA for HS devices, but not for GP devices. Cc: Kevin Hilman <khilman@deeprootsystems.com> Cc: Tony Lindgren <tony@atomide.com> Acked-by: Jean Pihet <j-pihet@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> [ambresh@ti.com: co-developer] Signed-off-by: Ambresh K <ambresh@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* | OMAP3: pm: introduce errata handlingNishanth Menon2010-12-211-0/+7
|/ | | | | | | | | Introduce errata handling for OMAP3. This patch introduces errata variable and stub for initialization which will be filled up by follow-on patches. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP: PM: Fix build when CONFIG_PM_DEBUG isn't setLoïc Minier2010-10-011-3/+4
| | | | | | | | | | | | | | | | Since 6cdee91257bee23a46dc869ca62469b67cba2c7e the references to enable_off_mode and sleep_while_idle can't be resolved when CONFIG_PM_DEBUG isn't set: arch/arm/mach-omap2/built-in.o: In function `omap_uart_restore_context': arch/arm/mach-omap2/serial.c:253: undefined reference to `enable_off_mode' arch/arm/mach-omap2/built-in.o: In function `omap3_can_sleep': arch/arm/mach-omap2/pm34xx.c:479: undefined reference to `sleep_while_idle' Simply #define these in pm.h just like omap2_pm_debug. Signed-off-by: Loïc Minier <loic.minier@linaro.org> [khilman: moved down into existing #ifdef section] Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* omap: pm: Move set_pwrdm_state routine to common pm.cSantosh Shilimkar2010-09-231-1/+1
| | | | | | | | | The set_pwrdm_state() is needed on omap4 as well so move this routine to common pm.c file so that it's available for omap3/4 Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* omap: pm-debug: Move common debug code to pm-debug.cSantosh Shilimkar2010-09-231-0/+2
| | | | | | | | | This patch moves omap2_pm_wakeup_on_timer() and pm debug entries form pm34xx.c to pm-debug.c and export it, so that it is available to other OMAPs Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: Add milliseconds interface to suspend wakeup timerAri Kauppi2010-05-121-0/+1
| | | | | | | | | | | Millisecond resolution is possible and there are use cases for it (automatic testing). Seconds-based interface is preserved for compatibility. Signed-off-by: Ari Kauppi <Ext-Ari.Kauppi@nokia.com> Reviewed-by: Phil Carmody <ext-phil.2.carmody@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: cpuidle: Add valid field into C-state parameter passingKalle Jokiniemi2010-02-231-0/+1
| | | | | | | | | | | | | | | Different boards benefit differently from the available seven C-states for cpu idle. In most cases, only few, properly spaced (in terms of consumption and latency) C-states are required to make the power management optimal. Hence we need a possibility to pass which C-states are actually used for each board. So added the valid field to cpuidle_params and added support to 3430sdp, which uses the paramenter passing. Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: cpuidle: configure latencies/thresholds from board fileKevin Hilman2010-02-231-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | The CPUidle C state latencies and thresholds are dependent on various board specific details. This patch makes it possible to configure these values from the respective board files. omap3_pm_init_cpuidle() can now be optionally called from board files to pass board specific cpuidle parameters. If the board files do not use this function to pass the params default values are used which might cause higher consumption dur to wrong state selection by the governor. This patch only updates the 3430sdp board files to use omap3_pm_init_cpuidle(). From Kalle, in addition to original patch from Rajendra: Building without CONFIG_CPU_IDLE or CONFIG_PM causes build to fail if cpu idle parameters are tried to pass using omap3_pm_init_cpuidle function. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: cpuidle: Update statistics for correct stateSanjeev Premi2010-02-231-0/+4
| | | | | | | | | | | | | | | | | | | When 'enable_off_mode' is 0, the target power state for MPU and CORE was locally changed to PWRDM_POWER_RET but, the statistics are updated for idle state originally selected by the governor. This patch 'invalidates' the idle states that lead either of MPU or Core to PWRDM_POWER_OFF state when 'enable_off_mode' is '0'. The states are valid once 'enable_off_mode' is set to '1'. Added function next_valid_state() to check if current state is valid; else get the next valid state. It is called from omap3_enter_idle_bm(). Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM debug: fix build error when !CONFIG_DEBUG_FSManjunatha GK2010-01-201-2/+6
| | | | | | | | | | | | | | | | | | | | | The PM debug code fails to build on when CONFIG_DEBUG_FS is not enabled. Build error log: arch/arm/mach-omap2/built-in.o: In function `omap_sram_idle': arch/arm/mach-omap2/pm34xx.c:449: undefined reference to `pm_dbg_regset_save' arch/arm/mach-omap2/pm34xx.c:460: undefined reference to `pm_dbg_regset_save' arch/arm/mach-omap2/built-in.o: In function `configure_vc': arch/arm/mach-omap2/pm34xx.c:1237: undefined reference to `pm_dbg_regset_init' arch/arm/mach-omap2/pm34xx.c:1238: undefined reference to `pm_dbg_regset_init' make: *** [.tmp_vmlinux1] Error 1 This patch fixes the above errors. Kernel booting is tested on omap zoom2 and zoom3 boards. Signed-off-by: Manjunatha GK <manjugk@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: CPUidle: fix init sequencingKalle Jokiniemi2009-11-111-0/+1
| | | | | | | | | | Previously omap3_idle_init() was called in device_init, while omap_pm_init() is called at late_initcall. This causes the cpu idle driver to call omap_sram_idle before it is properly initialized. This patch fixes the issue by moving omap3_idle_init into omap3_pm_init. Signed-off-by: Kalle Jokiniemi <ext-kalle.jokiniemi@nokia.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: CPUidle: support retention and off-mode C-statesRajendra Nayak2009-11-111-0/+2
| | | | | | | | This patch adds support and enables state C4(MPU RET + CORE RET) and MPU OFF states (C3 and C5.) Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM: CPUidle: base driver and support for C1-C2Rajendra Nayak2009-11-111-0/+1
| | | | | | | | Basic CPUidle driver for OMAP3 with deepest sleep state supported being MPU CSWR. Signed-off-by: Rajendra Nayak <rnayak@ti.com> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* PM debug: allow configurable wakeup from suspend on OMAP GPtimerKevin Hilman2009-11-111-0/+3
| | | | | | | | | | | Using debugfs, export a configurable wakeup timer to be used to wakeup system from suspend. If a non-zero value is written to /debug/pm_debug/wakeup_timer_seconds, A timer wakeup event will wake the system and resume after the configured number of seconds. Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
* OMAP3: PM debug: allow runtime toggle of PM featuresKevin Hilman2009-11-111-0/+4
| | | | | | | | | | | | | | | | | | | | | Allow enable/disable of low-power states during idle. To enable low-power idle: echo 1 > /debug/pm_debug/sleep_while_idle to disable: echo 0 > /debug/pm_debug/sleep_while_idle Also allow enable/disable of OFF-mode. To enable: echo 1 > /debug/pm_debug/enable_off_mode to disable: echo 0 > /debug/pm_debug/enable_off_mode Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
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